^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * An I2C driver for the Epson RX8581 RTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Martyn Welch <martyn.welch@ge.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Based on: rtc-pcf8563.c (An I2C driver for the Philips PCF8563 RTC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright 2005-06 Tower Technologies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/log2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define RX8581_REG_SC 0x00 /* Second in BCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define RX8581_REG_MN 0x01 /* Minute in BCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define RX8581_REG_HR 0x02 /* Hour in BCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define RX8581_REG_DW 0x03 /* Day of Week */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define RX8581_REG_DM 0x04 /* Day of Month in BCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define RX8581_REG_MO 0x05 /* Month in BCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define RX8581_REG_YR 0x06 /* Year in BCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define RX8581_REG_RAM 0x07 /* RAM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define RX8581_REG_AMN 0x08 /* Alarm Min in BCD*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define RX8581_REG_AHR 0x09 /* Alarm Hour in BCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define RX8581_REG_ADM 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define RX8581_REG_ADW 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define RX8581_REG_TMR0 0x0B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define RX8581_REG_TMR1 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define RX8581_REG_EXT 0x0D /* Extension Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define RX8581_REG_FLAG 0x0E /* Flag Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define RX8581_REG_CTRL 0x0F /* Control Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* Flag Register bit definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define RX8581_FLAG_UF 0x20 /* Update */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define RX8581_FLAG_TF 0x10 /* Timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define RX8581_FLAG_AF 0x08 /* Alarm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define RX8581_FLAG_VLF 0x02 /* Voltage Low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* Control Register bit definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define RX8581_CTRL_UIE 0x20 /* Update Interrupt Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define RX8581_CTRL_TIE 0x10 /* Timer Interrupt Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define RX8581_CTRL_AIE 0x08 /* Alarm Interrupt Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define RX8581_CTRL_STOP 0x02 /* STOP bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define RX8581_CTRL_RESET 0x01 /* RESET bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define RX8571_USER_RAM 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define RX8571_NVRAM_SIZE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct rx8581 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct rx85x1_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct regmap_config regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) unsigned int num_nvram;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * In the routines that deal directly with the rx8581 hardware, we use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static int rx8581_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) unsigned char date[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) unsigned int data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct rx8581 *rx8581 = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* First we ensure that the "update flag" is not set, we read the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * time and date then re-read the "update flag". If the update flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * has been set, we know that the time has changed during the read so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * we repeat the whole process again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) err = regmap_read(rx8581->regmap, RX8581_REG_FLAG, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (data & RX8581_FLAG_VLF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) dev_warn(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) "low voltage detected, date/time is not reliable.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* If update flag set, clear it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (data & RX8581_FLAG_UF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) err = regmap_write(rx8581->regmap, RX8581_REG_FLAG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) data & ~RX8581_FLAG_UF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* Now read time and date */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) err = regmap_bulk_read(rx8581->regmap, RX8581_REG_SC, date,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) sizeof(date));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* Check flag register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) err = regmap_read(rx8581->regmap, RX8581_REG_FLAG, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) } while (data & RX8581_FLAG_UF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) dev_dbg(dev, "%s: raw data is sec=%02x, min=%02x, hr=%02x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) "wday=%02x, mday=%02x, mon=%02x, year=%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) date[0], date[1], date[2], date[3], date[4], date[5], date[6]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) tm->tm_sec = bcd2bin(date[RX8581_REG_SC] & 0x7F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) tm->tm_min = bcd2bin(date[RX8581_REG_MN] & 0x7F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) tm->tm_hour = bcd2bin(date[RX8581_REG_HR] & 0x3F); /* rtc hr 0-23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) tm->tm_wday = ilog2(date[RX8581_REG_DW] & 0x7F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) tm->tm_mday = bcd2bin(date[RX8581_REG_DM] & 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) tm->tm_mon = bcd2bin(date[RX8581_REG_MO] & 0x1F) - 1; /* rtc mn 1-12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) tm->tm_year = bcd2bin(date[RX8581_REG_YR]) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) "mday=%d, mon=%d, year=%d, wday=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) tm->tm_sec, tm->tm_min, tm->tm_hour,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static int rx8581_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) unsigned char buf[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct rx8581 *rx8581 = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) dev_dbg(dev, "%s: secs=%d, mins=%d, hours=%d, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) "mday=%d, mon=%d, year=%d, wday=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) tm->tm_sec, tm->tm_min, tm->tm_hour,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* hours, minutes and seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) buf[RX8581_REG_SC] = bin2bcd(tm->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) buf[RX8581_REG_MN] = bin2bcd(tm->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) buf[RX8581_REG_HR] = bin2bcd(tm->tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) buf[RX8581_REG_DM] = bin2bcd(tm->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /* month, 1 - 12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) buf[RX8581_REG_MO] = bin2bcd(tm->tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /* year and century */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) buf[RX8581_REG_YR] = bin2bcd(tm->tm_year - 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) buf[RX8581_REG_DW] = (0x1 << tm->tm_wday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /* Stop the clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) err = regmap_update_bits(rx8581->regmap, RX8581_REG_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) RX8581_CTRL_STOP, RX8581_CTRL_STOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* write register's data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) err = regmap_bulk_write(rx8581->regmap, RX8581_REG_SC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) buf, sizeof(buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) /* get VLF and clear it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) err = regmap_update_bits(rx8581->regmap, RX8581_REG_FLAG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) RX8581_FLAG_VLF, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /* Restart the clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return regmap_update_bits(rx8581->regmap, RX8581_REG_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) RX8581_CTRL_STOP, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static const struct rtc_class_ops rx8581_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .read_time = rx8581_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .set_time = rx8581_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static int rx8571_nvram_read(void *priv, unsigned int offset, void *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) size_t bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) struct rx8581 *rx8581 = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return regmap_bulk_read(rx8581->regmap, RX8571_USER_RAM + offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) val, bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static int rx8571_nvram_write(void *priv, unsigned int offset, void *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) size_t bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct rx8581 *rx8581 = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return regmap_bulk_write(rx8581->regmap, RX8571_USER_RAM + offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) val, bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static int rx85x1_nvram_read(void *priv, unsigned int offset, void *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) size_t bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) struct rx8581 *rx8581 = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) unsigned int tmp_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) ret = regmap_read(rx8581->regmap, RX8581_REG_RAM, &tmp_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) (*(unsigned char *)val) = (unsigned char) tmp_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static int rx85x1_nvram_write(void *priv, unsigned int offset, void *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) size_t bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) struct rx8581 *rx8581 = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) unsigned char tmp_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) tmp_val = *((unsigned char *)val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) return regmap_write(rx8581->regmap, RX8581_REG_RAM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) (unsigned int)tmp_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static const struct rx85x1_config rx8581_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .regmap = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .max_register = 0xf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .num_nvram = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static const struct rx85x1_config rx8571_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .regmap = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .max_register = 0x1f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .num_nvram = 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static int rx8581_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) struct rx8581 *rx8581;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) const struct rx85x1_config *config = &rx8581_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) const void *data = of_device_get_match_data(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static struct nvmem_config nvmem_cfg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .name = "rx85x1-",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .word_size = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .stride = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .size = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .reg_read = rx85x1_nvram_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .reg_write = rx85x1_nvram_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .name = "rx8571-",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .word_size = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .stride = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .size = RX8571_NVRAM_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .reg_read = rx8571_nvram_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .reg_write = rx8571_nvram_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) dev_dbg(&client->dev, "%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) config = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) rx8581 = devm_kzalloc(&client->dev, sizeof(struct rx8581), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) if (!rx8581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) i2c_set_clientdata(client, rx8581);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) rx8581->regmap = devm_regmap_init_i2c(client, &config->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) if (IS_ERR(rx8581->regmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return PTR_ERR(rx8581->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) rx8581->rtc = devm_rtc_allocate_device(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) if (IS_ERR(rx8581->rtc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) return PTR_ERR(rx8581->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) rx8581->rtc->ops = &rx8581_rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) rx8581->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) rx8581->rtc->range_max = RTC_TIMESTAMP_END_2099;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) rx8581->rtc->start_secs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) rx8581->rtc->set_start_time = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) ret = rtc_register_device(rx8581->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) for (i = 0; i < config->num_nvram; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) nvmem_cfg[i].priv = rx8581;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) rtc_nvmem_register(rx8581->rtc, &nvmem_cfg[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static const struct i2c_device_id rx8581_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) { "rx8581", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) MODULE_DEVICE_TABLE(i2c, rx8581_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) static const struct of_device_id rx8581_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) { .compatible = "epson,rx8571", .data = &rx8571_config },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) { .compatible = "epson,rx8581", .data = &rx8581_config },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) MODULE_DEVICE_TABLE(of, rx8581_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static struct i2c_driver rx8581_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) .name = "rtc-rx8581",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) .of_match_table = of_match_ptr(rx8581_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .probe = rx8581_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .id_table = rx8581_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) module_i2c_driver(rx8581_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) MODULE_DESCRIPTION("Epson RX-8571/RX-8581 RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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