^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for Epson's RTC module RX-8025 SA/NB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2009 Wolfgang Grandegger <wg@grandegger.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2005 by Digi International Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Modified by fengjh at rising.com.cn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * <lm-sensors@lm-sensors.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * 2006.11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Code cleanup by Sergei Poselenov, <sposelenov@emcraft.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Converted to new style by Wolfgang Grandegger <wg@grandegger.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * Alarm and periodic interrupt added by Dmitry Rakhchev <rda@emcraft.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* Register definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define RX8025_REG_SEC 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define RX8025_REG_MIN 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define RX8025_REG_HOUR 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define RX8025_REG_WDAY 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define RX8025_REG_MDAY 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define RX8025_REG_MONTH 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define RX8025_REG_YEAR 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define RX8025_REG_DIGOFF 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define RX8025_REG_ALWMIN 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define RX8025_REG_ALWHOUR 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define RX8025_REG_ALWWDAY 0x0a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define RX8025_REG_ALDMIN 0x0b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define RX8025_REG_ALDHOUR 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* 0x0d is reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define RX8025_REG_CTRL1 0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define RX8025_REG_CTRL2 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define RX8025_BIT_CTRL1_CT (7 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* 1 Hz periodic level irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define RX8025_BIT_CTRL1_CT_1HZ 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define RX8025_BIT_CTRL1_TEST BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define RX8025_BIT_CTRL1_1224 BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define RX8025_BIT_CTRL1_DALE BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define RX8025_BIT_CTRL1_WALE BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define RX8025_BIT_CTRL2_DAFG BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define RX8025_BIT_CTRL2_WAFG BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define RX8025_BIT_CTRL2_CTFG BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define RX8025_BIT_CTRL2_PON BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define RX8025_BIT_CTRL2_XST BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define RX8025_BIT_CTRL2_VDET BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* Clock precision adjustment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define RX8025_ADJ_RESOLUTION 3050 /* in ppb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define RX8025_ADJ_DATA_MAX 62
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define RX8025_ADJ_DATA_MIN -62
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static const struct i2c_device_id rx8025_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) { "rx8025", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) MODULE_DEVICE_TABLE(i2c, rx8025_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct rx8025_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) u8 ctrl1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static s32 rx8025_read_reg(const struct i2c_client *client, u8 number)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return i2c_smbus_read_byte_data(client, number << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static int rx8025_read_regs(const struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) u8 number, u8 length, u8 *values)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) int ret = i2c_smbus_read_i2c_block_data(client, number << 4, length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) values);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (ret != length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return ret < 0 ? ret : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static s32 rx8025_write_reg(const struct i2c_client *client, u8 number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return i2c_smbus_write_byte_data(client, number << 4, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static s32 rx8025_write_regs(const struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) u8 number, u8 length, const u8 *values)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return i2c_smbus_write_i2c_block_data(client, number << 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) length, values);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int rx8025_check_validity(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) int ctrl2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) ctrl2 = rx8025_read_reg(client, RX8025_REG_CTRL2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (ctrl2 < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return ctrl2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (ctrl2 & RX8025_BIT_CTRL2_VDET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) dev_warn(dev, "power voltage drop detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (ctrl2 & RX8025_BIT_CTRL2_PON) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) dev_warn(dev, "power-on reset detected, date is invalid\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (!(ctrl2 & RX8025_BIT_CTRL2_XST)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) dev_warn(dev, "crystal stopped, date is invalid\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int rx8025_reset_validity(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) int ctrl2 = rx8025_read_reg(client, RX8025_REG_CTRL2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (ctrl2 < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return ctrl2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ctrl2 &= ~(RX8025_BIT_CTRL2_PON | RX8025_BIT_CTRL2_VDET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return rx8025_write_reg(client, RX8025_REG_CTRL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) ctrl2 | RX8025_BIT_CTRL2_XST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static irqreturn_t rx8025_handle_irq(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct i2c_client *client = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct rx8025_data *rx8025 = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct mutex *lock = &rx8025->rtc->ops_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) mutex_lock(lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) status = rx8025_read_reg(client, RX8025_REG_CTRL2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (!(status & RX8025_BIT_CTRL2_XST))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) dev_warn(&client->dev, "Oscillation stop was detected,"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) "you may have to readjust the clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (status & RX8025_BIT_CTRL2_CTFG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /* periodic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) status &= ~RX8025_BIT_CTRL2_CTFG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) rtc_update_irq(rx8025->rtc, 1, RTC_PF | RTC_IRQF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (status & RX8025_BIT_CTRL2_DAFG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /* alarm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) status &= RX8025_BIT_CTRL2_DAFG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (rx8025_write_reg(client, RX8025_REG_CTRL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) rx8025->ctrl1 & ~RX8025_BIT_CTRL1_DALE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) rtc_update_irq(rx8025->rtc, 1, RTC_AF | RTC_IRQF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) mutex_unlock(lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static int rx8025_get_time(struct device *dev, struct rtc_time *dt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) struct rx8025_data *rx8025 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) u8 date[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) err = rx8025_check_validity(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) err = rx8025_read_regs(client, RX8025_REG_SEC, 7, date);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) dev_dbg(dev, "%s: read %7ph\n", __func__, date);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) dt->tm_sec = bcd2bin(date[RX8025_REG_SEC] & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) dt->tm_min = bcd2bin(date[RX8025_REG_MIN] & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (rx8025->ctrl1 & RX8025_BIT_CTRL1_1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) dt->tm_hour = bcd2bin(date[RX8025_REG_HOUR] & 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) dt->tm_hour = bcd2bin(date[RX8025_REG_HOUR] & 0x1f) % 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) + (date[RX8025_REG_HOUR] & 0x20 ? 12 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) dt->tm_mday = bcd2bin(date[RX8025_REG_MDAY] & 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) dt->tm_mon = bcd2bin(date[RX8025_REG_MONTH] & 0x1f) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) dt->tm_year = bcd2bin(date[RX8025_REG_YEAR]) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) dev_dbg(dev, "%s: date %ptRr\n", __func__, dt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static int rx8025_set_time(struct device *dev, struct rtc_time *dt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) struct rx8025_data *rx8025 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) u8 date[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if ((dt->tm_year < 100) || (dt->tm_year > 199))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * Here the read-only bits are written as "0". I'm not sure if that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) * is sound.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) date[RX8025_REG_SEC] = bin2bcd(dt->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) date[RX8025_REG_MIN] = bin2bcd(dt->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (rx8025->ctrl1 & RX8025_BIT_CTRL1_1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) date[RX8025_REG_HOUR] = bin2bcd(dt->tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) date[RX8025_REG_HOUR] = (dt->tm_hour >= 12 ? 0x20 : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) | bin2bcd((dt->tm_hour + 11) % 12 + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) date[RX8025_REG_WDAY] = bin2bcd(dt->tm_wday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) date[RX8025_REG_MDAY] = bin2bcd(dt->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) date[RX8025_REG_MONTH] = bin2bcd(dt->tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) date[RX8025_REG_YEAR] = bin2bcd(dt->tm_year - 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) dev_dbg(dev, "%s: write %7ph\n", __func__, date);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) ret = rx8025_write_regs(client, RX8025_REG_SEC, 7, date);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return rx8025_reset_validity(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static int rx8025_init_client(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) struct rx8025_data *rx8025 = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) u8 ctrl[2], ctrl2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) int need_clear = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) err = rx8025_read_regs(client, RX8025_REG_CTRL1, 2, ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) /* Keep test bit zero ! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) rx8025->ctrl1 = ctrl[0] & ~RX8025_BIT_CTRL1_TEST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (ctrl[1] & (RX8025_BIT_CTRL2_DAFG | RX8025_BIT_CTRL2_WAFG)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) dev_warn(&client->dev, "Alarm was detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) need_clear = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (ctrl[1] & RX8025_BIT_CTRL2_CTFG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) need_clear = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (need_clear) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) ctrl2 = ctrl[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) ctrl2 &= ~(RX8025_BIT_CTRL2_CTFG | RX8025_BIT_CTRL2_WAFG |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) RX8025_BIT_CTRL2_DAFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) err = rx8025_write_reg(client, RX8025_REG_CTRL2, ctrl2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) /* Alarm support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static int rx8025_read_alarm(struct device *dev, struct rtc_wkalrm *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) struct rx8025_data *rx8025 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) u8 ald[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) int ctrl2, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) if (client->irq <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) err = rx8025_read_regs(client, RX8025_REG_ALDMIN, 2, ald);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) ctrl2 = rx8025_read_reg(client, RX8025_REG_CTRL2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) if (ctrl2 < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) return ctrl2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) dev_dbg(dev, "%s: read alarm 0x%02x 0x%02x ctrl2 %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) __func__, ald[0], ald[1], ctrl2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) /* Hardware alarms precision is 1 minute! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) t->time.tm_sec = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) t->time.tm_min = bcd2bin(ald[0] & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) if (rx8025->ctrl1 & RX8025_BIT_CTRL1_1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) t->time.tm_hour = bcd2bin(ald[1] & 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) t->time.tm_hour = bcd2bin(ald[1] & 0x1f) % 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) + (ald[1] & 0x20 ? 12 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) dev_dbg(dev, "%s: date: %ptRr\n", __func__, &t->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) t->enabled = !!(rx8025->ctrl1 & RX8025_BIT_CTRL1_DALE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) t->pending = (ctrl2 & RX8025_BIT_CTRL2_DAFG) && t->enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static int rx8025_set_alarm(struct device *dev, struct rtc_wkalrm *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) struct rx8025_data *rx8025 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) u8 ald[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) if (client->irq <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * Hardware alarm precision is 1 minute!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) * round up to nearest minute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (t->time.tm_sec) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) time64_t alarm_time = rtc_tm_to_time64(&t->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) alarm_time += 60 - t->time.tm_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) rtc_time64_to_tm(alarm_time, &t->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) ald[0] = bin2bcd(t->time.tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) if (rx8025->ctrl1 & RX8025_BIT_CTRL1_1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) ald[1] = bin2bcd(t->time.tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) ald[1] = (t->time.tm_hour >= 12 ? 0x20 : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) | bin2bcd((t->time.tm_hour + 11) % 12 + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) dev_dbg(dev, "%s: write 0x%02x 0x%02x\n", __func__, ald[0], ald[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) if (rx8025->ctrl1 & RX8025_BIT_CTRL1_DALE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) rx8025->ctrl1 &= ~RX8025_BIT_CTRL1_DALE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) err = rx8025_write_reg(client, RX8025_REG_CTRL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) rx8025->ctrl1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) err = rx8025_write_regs(client, RX8025_REG_ALDMIN, 2, ald);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (t->enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) rx8025->ctrl1 |= RX8025_BIT_CTRL1_DALE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) err = rx8025_write_reg(client, RX8025_REG_CTRL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) rx8025->ctrl1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static int rx8025_alarm_irq_enable(struct device *dev, unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) struct rx8025_data *rx8025 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) u8 ctrl1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) ctrl1 = rx8025->ctrl1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) ctrl1 |= RX8025_BIT_CTRL1_DALE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) ctrl1 &= ~RX8025_BIT_CTRL1_DALE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (ctrl1 != rx8025->ctrl1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) rx8025->ctrl1 = ctrl1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) err = rx8025_write_reg(client, RX8025_REG_CTRL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) rx8025->ctrl1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static const struct rtc_class_ops rx8025_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) .read_time = rx8025_get_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) .set_time = rx8025_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .read_alarm = rx8025_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .set_alarm = rx8025_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .alarm_irq_enable = rx8025_alarm_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) * Clock precision adjustment support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * According to the RX8025 SA/NB application manual the frequency and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) * temperature characteristics can be approximated using the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) * equation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) * df = a * (ut - t)**2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * df: Frequency deviation in any temperature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) * a : Coefficient = (-35 +-5) * 10**-9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) * ut: Ultimate temperature in degree = +25 +-5 degree
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) * t : Any temperature in degree
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * Note that the clock adjustment in ppb must be entered (which is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) * the negative value of the deviation).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static int rx8025_get_clock_adjust(struct device *dev, int *adj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) int digoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) digoff = rx8025_read_reg(client, RX8025_REG_DIGOFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) if (digoff < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) return digoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) *adj = digoff >= 64 ? digoff - 128 : digoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) if (*adj > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) (*adj)--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) *adj *= -RX8025_ADJ_RESOLUTION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) static int rx8025_set_clock_adjust(struct device *dev, int adj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) u8 digoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) adj /= -RX8025_ADJ_RESOLUTION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) if (adj > RX8025_ADJ_DATA_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) adj = RX8025_ADJ_DATA_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) else if (adj < RX8025_ADJ_DATA_MIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) adj = RX8025_ADJ_DATA_MIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) else if (adj > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) adj++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) else if (adj < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) adj += 128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) digoff = adj;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) err = rx8025_write_reg(client, RX8025_REG_DIGOFF, digoff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) dev_dbg(dev, "%s: write 0x%02x\n", __func__, digoff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) static ssize_t rx8025_sysfs_show_clock_adjust(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) int err, adj;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) err = rx8025_get_clock_adjust(dev, &adj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) return sprintf(buf, "%d\n", adj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) static ssize_t rx8025_sysfs_store_clock_adjust(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) int adj, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) if (sscanf(buf, "%i", &adj) != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) err = rx8025_set_clock_adjust(dev, adj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) return err ? err : count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) static DEVICE_ATTR(clock_adjust_ppb, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) rx8025_sysfs_show_clock_adjust,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) rx8025_sysfs_store_clock_adjust);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) static int rx8025_sysfs_register(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) return device_create_file(dev, &dev_attr_clock_adjust_ppb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) static void rx8025_sysfs_unregister(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) device_remove_file(dev, &dev_attr_clock_adjust_ppb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) static int rx8025_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) struct rx8025_data *rx8025;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) | I2C_FUNC_SMBUS_I2C_BLOCK)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) dev_err(&adapter->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) "doesn't support required functionality\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) rx8025 = devm_kzalloc(&client->dev, sizeof(*rx8025), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) if (!rx8025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) i2c_set_clientdata(client, rx8025);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) err = rx8025_init_client(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) rx8025->rtc = devm_rtc_device_register(&client->dev, client->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) &rx8025_rtc_ops, THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) if (IS_ERR(rx8025->rtc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) dev_err(&client->dev, "unable to register the class device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) return PTR_ERR(rx8025->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) if (client->irq > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) dev_info(&client->dev, "IRQ %d supplied\n", client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) err = devm_request_threaded_irq(&client->dev, client->irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) rx8025_handle_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) "rx8025", client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) dev_err(&client->dev, "unable to request IRQ, alarms disabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) client->irq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) rx8025->rtc->max_user_freq = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) /* the rx8025 alarm only supports a minute accuracy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) rx8025->rtc->uie_unsupported = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) err = rx8025_sysfs_register(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) static int rx8025_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) rx8025_sysfs_unregister(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) static struct i2c_driver rx8025_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) .name = "rtc-rx8025",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) .probe = rx8025_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) .remove = rx8025_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) .id_table = rx8025_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) module_i2c_driver(rx8025_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) MODULE_DESCRIPTION("RX-8025 SA/NB RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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