Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Driver for the Epson RTC module RX-8010 SJ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright(C) Timesys Corporation 2015
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright(C) General Electric Company 2015
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define RX8010_SEC		0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define RX8010_MIN		0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define RX8010_HOUR		0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define RX8010_WDAY		0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define RX8010_MDAY		0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define RX8010_MONTH		0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define RX8010_YEAR		0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define RX8010_RESV17		0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define RX8010_ALMIN		0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define RX8010_ALHOUR		0x19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define RX8010_ALWDAY		0x1A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define RX8010_TCOUNT0		0x1B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define RX8010_TCOUNT1		0x1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define RX8010_EXT		0x1D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define RX8010_FLAG		0x1E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define RX8010_CTRL		0x1F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) /* 0x20 to 0x2F are user registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define RX8010_RESV30		0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define RX8010_RESV31		0x31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define RX8010_IRQ		0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define RX8010_EXT_WADA		BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define RX8010_FLAG_VLF		BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define RX8010_FLAG_AF		BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define RX8010_FLAG_TF		BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define RX8010_FLAG_UF		BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define RX8010_CTRL_AIE		BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define RX8010_CTRL_UIE		BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define RX8010_CTRL_STOP	BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define RX8010_CTRL_TEST	BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define RX8010_ALARM_AE		BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static const struct i2c_device_id rx8010_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	{ "rx8010", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) MODULE_DEVICE_TABLE(i2c, rx8010_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static const struct of_device_id rx8010_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	{ .compatible = "epson,rx8010" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) MODULE_DEVICE_TABLE(of, rx8010_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) struct rx8010_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	struct regmap *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	u8 ctrlreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) static irqreturn_t rx8010_irq_1_handler(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	struct i2c_client *client = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	struct rx8010_data *rx8010 = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	int flagreg, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	mutex_lock(&rx8010->rtc->ops_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	err = regmap_read(rx8010->regs, RX8010_FLAG, &flagreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		mutex_unlock(&rx8010->rtc->ops_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	if (flagreg & RX8010_FLAG_VLF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		dev_warn(&client->dev, "Frequency stop detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	if (flagreg & RX8010_FLAG_TF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		flagreg &= ~RX8010_FLAG_TF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		rtc_update_irq(rx8010->rtc, 1, RTC_PF | RTC_IRQF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	if (flagreg & RX8010_FLAG_AF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		flagreg &= ~RX8010_FLAG_AF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		rtc_update_irq(rx8010->rtc, 1, RTC_AF | RTC_IRQF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	if (flagreg & RX8010_FLAG_UF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		flagreg &= ~RX8010_FLAG_UF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		rtc_update_irq(rx8010->rtc, 1, RTC_UF | RTC_IRQF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	err = regmap_write(rx8010->regs, RX8010_FLAG, flagreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	mutex_unlock(&rx8010->rtc->ops_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	return err ? IRQ_NONE : IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int rx8010_get_time(struct device *dev, struct rtc_time *dt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	struct rx8010_data *rx8010 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	u8 date[RX8010_YEAR - RX8010_SEC + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	int flagreg, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	err = regmap_read(rx8010->regs, RX8010_FLAG, &flagreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	if (flagreg & RX8010_FLAG_VLF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		dev_warn(dev, "Frequency stop detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	err = regmap_bulk_read(rx8010->regs, RX8010_SEC, date, sizeof(date));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	dt->tm_sec = bcd2bin(date[RX8010_SEC - RX8010_SEC] & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	dt->tm_min = bcd2bin(date[RX8010_MIN - RX8010_SEC] & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	dt->tm_hour = bcd2bin(date[RX8010_HOUR - RX8010_SEC] & 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	dt->tm_mday = bcd2bin(date[RX8010_MDAY - RX8010_SEC] & 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	dt->tm_mon = bcd2bin(date[RX8010_MONTH - RX8010_SEC] & 0x1f) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	dt->tm_year = bcd2bin(date[RX8010_YEAR - RX8010_SEC]) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	dt->tm_wday = ffs(date[RX8010_WDAY - RX8010_SEC] & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static int rx8010_set_time(struct device *dev, struct rtc_time *dt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	struct rx8010_data *rx8010 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	u8 date[RX8010_YEAR - RX8010_SEC + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	/* set STOP bit before changing clock/calendar */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	err = regmap_set_bits(rx8010->regs, RX8010_CTRL, RX8010_CTRL_STOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	date[RX8010_SEC - RX8010_SEC] = bin2bcd(dt->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	date[RX8010_MIN - RX8010_SEC] = bin2bcd(dt->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	date[RX8010_HOUR - RX8010_SEC] = bin2bcd(dt->tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	date[RX8010_MDAY - RX8010_SEC] = bin2bcd(dt->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	date[RX8010_MONTH - RX8010_SEC] = bin2bcd(dt->tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	date[RX8010_YEAR - RX8010_SEC] = bin2bcd(dt->tm_year - 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	date[RX8010_WDAY - RX8010_SEC] = bin2bcd(1 << dt->tm_wday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	err = regmap_bulk_write(rx8010->regs, RX8010_SEC, date, sizeof(date));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	/* clear STOP bit after changing clock/calendar */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	err = regmap_clear_bits(rx8010->regs, RX8010_CTRL, RX8010_CTRL_STOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	err = regmap_clear_bits(rx8010->regs, RX8010_FLAG, RX8010_FLAG_VLF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static int rx8010_init(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	struct rx8010_data *rx8010 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	u8 ctrl[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	int need_clear = 0, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	/* Initialize reserved registers as specified in datasheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	err = regmap_write(rx8010->regs, RX8010_RESV17, 0xD8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	err = regmap_write(rx8010->regs, RX8010_RESV30, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	err = regmap_write(rx8010->regs, RX8010_RESV31, 0x08);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	err = regmap_write(rx8010->regs, RX8010_IRQ, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	err = regmap_bulk_read(rx8010->regs, RX8010_FLAG, ctrl, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	if (ctrl[0] & RX8010_FLAG_VLF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		dev_warn(dev, "Frequency stop was detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	if (ctrl[0] & RX8010_FLAG_AF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		dev_warn(dev, "Alarm was detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		need_clear = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	if (ctrl[0] & RX8010_FLAG_TF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		need_clear = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	if (ctrl[0] & RX8010_FLAG_UF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		need_clear = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	if (need_clear) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		ctrl[0] &= ~(RX8010_FLAG_AF | RX8010_FLAG_TF | RX8010_FLAG_UF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		err = regmap_write(rx8010->regs, RX8010_FLAG, ctrl[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	rx8010->ctrlreg = (ctrl[1] & ~RX8010_CTRL_TEST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static int rx8010_read_alarm(struct device *dev, struct rtc_wkalrm *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	struct rx8010_data *rx8010 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	u8 alarmvals[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	int flagreg, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	err = regmap_bulk_read(rx8010->regs, RX8010_ALMIN, alarmvals, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	err = regmap_read(rx8010->regs, RX8010_FLAG, &flagreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	t->time.tm_sec = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	t->time.tm_min = bcd2bin(alarmvals[0] & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	t->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	if (!(alarmvals[2] & RX8010_ALARM_AE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		t->time.tm_mday = bcd2bin(alarmvals[2] & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	t->enabled = !!(rx8010->ctrlreg & RX8010_CTRL_AIE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	t->pending = (flagreg & RX8010_FLAG_AF) && t->enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static int rx8010_set_alarm(struct device *dev, struct rtc_wkalrm *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	struct rx8010_data *rx8010 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	u8 alarmvals[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	if (rx8010->ctrlreg & (RX8010_CTRL_AIE | RX8010_CTRL_UIE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		rx8010->ctrlreg &= ~(RX8010_CTRL_AIE | RX8010_CTRL_UIE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		err = regmap_write(rx8010->regs, RX8010_CTRL, rx8010->ctrlreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	err = regmap_clear_bits(rx8010->regs, RX8010_FLAG, RX8010_FLAG_AF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	alarmvals[0] = bin2bcd(t->time.tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	alarmvals[1] = bin2bcd(t->time.tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	alarmvals[2] = bin2bcd(t->time.tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	err = regmap_bulk_write(rx8010->regs, RX8010_ALMIN, alarmvals, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	err = regmap_clear_bits(rx8010->regs, RX8010_EXT, RX8010_EXT_WADA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	if (alarmvals[2] == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		alarmvals[2] |= RX8010_ALARM_AE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	err = regmap_write(rx8010->regs, RX8010_ALWDAY, alarmvals[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	if (t->enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		if (rx8010->rtc->uie_rtctimer.enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 			rx8010->ctrlreg |= RX8010_CTRL_UIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		if (rx8010->rtc->aie_timer.enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 			rx8010->ctrlreg |=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 				(RX8010_CTRL_AIE | RX8010_CTRL_UIE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		err = regmap_write(rx8010->regs, RX8010_CTRL, rx8010->ctrlreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static int rx8010_alarm_irq_enable(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 				   unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	struct rx8010_data *rx8010 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	u8 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	ctrl = rx8010->ctrlreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	if (enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		if (rx8010->rtc->uie_rtctimer.enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 			ctrl |= RX8010_CTRL_UIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		if (rx8010->rtc->aie_timer.enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 			ctrl |= (RX8010_CTRL_AIE | RX8010_CTRL_UIE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 		if (!rx8010->rtc->uie_rtctimer.enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 			ctrl &= ~RX8010_CTRL_UIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		if (!rx8010->rtc->aie_timer.enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 			ctrl &= ~RX8010_CTRL_AIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	err = regmap_clear_bits(rx8010->regs, RX8010_FLAG, RX8010_FLAG_AF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	if (ctrl != rx8010->ctrlreg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		rx8010->ctrlreg = ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		err = regmap_write(rx8010->regs, RX8010_CTRL, rx8010->ctrlreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static int rx8010_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	struct rx8010_data *rx8010 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	int tmp, flagreg, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	case RTC_VL_READ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 		err = regmap_read(rx8010->regs, RX8010_FLAG, &flagreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 		tmp = flagreg & RX8010_FLAG_VLF ? RTC_VL_DATA_INVALID : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 		return put_user(tmp, (unsigned int __user *)arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		return -ENOIOCTLCMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static const struct rtc_class_ops rx8010_rtc_ops_default = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	.read_time = rx8010_get_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	.set_time = rx8010_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	.ioctl = rx8010_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static const struct rtc_class_ops rx8010_rtc_ops_alarm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	.read_time = rx8010_get_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	.set_time = rx8010_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	.ioctl = rx8010_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	.read_alarm = rx8010_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	.set_alarm = rx8010_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	.alarm_irq_enable = rx8010_alarm_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static const struct regmap_config rx8010_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	.name = "rx8010-rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) static int rx8010_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	struct rx8010_data *rx8010;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	rx8010 = devm_kzalloc(dev, sizeof(*rx8010), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	if (!rx8010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	i2c_set_clientdata(client, rx8010);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	rx8010->regs = devm_regmap_init_i2c(client, &rx8010_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	if (IS_ERR(rx8010->regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 		return PTR_ERR(rx8010->regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	err = rx8010_init(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	rx8010->rtc = devm_rtc_allocate_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	if (IS_ERR(rx8010->rtc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 		return PTR_ERR(rx8010->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	if (client->irq > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 		dev_info(dev, "IRQ %d supplied\n", client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 		err = devm_request_threaded_irq(dev, client->irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 						rx8010_irq_1_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 						IRQF_TRIGGER_LOW | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 						"rx8010", client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 		if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 			dev_err(dev, "unable to request IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 		rx8010->rtc->ops = &rx8010_rtc_ops_alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 		rx8010->rtc->ops = &rx8010_rtc_ops_default;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	rx8010->rtc->max_user_freq = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	rx8010->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	rx8010->rtc->range_max = RTC_TIMESTAMP_END_2099;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	return rtc_register_device(rx8010->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) static struct i2c_driver rx8010_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 		.name = "rtc-rx8010",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 		.of_match_table = of_match_ptr(rx8010_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	.probe_new	= rx8010_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	.id_table	= rx8010_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) module_i2c_driver(rx8010_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) MODULE_AUTHOR("Akshay Bhat <akshay.bhat@timesys.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) MODULE_DESCRIPTION("Epson RX8010SJ RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) MODULE_LICENSE("GPL v2");