^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for the Epson RTC module RX-6110 SA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright(C) 2015 Pengutronix, Steffen Trumtrar <kernel@pengutronix.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright(C) SEIKO EPSON CORPORATION 2013. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* RX-6110 Register definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define RX6110_REG_SEC 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define RX6110_REG_MIN 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define RX6110_REG_HOUR 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define RX6110_REG_WDAY 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define RX6110_REG_MDAY 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define RX6110_REG_MONTH 0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define RX6110_REG_YEAR 0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define RX6110_REG_RES1 0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define RX6110_REG_ALMIN 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define RX6110_REG_ALHOUR 0x19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define RX6110_REG_ALWDAY 0x1A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define RX6110_REG_TCOUNT0 0x1B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define RX6110_REG_TCOUNT1 0x1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define RX6110_REG_EXT 0x1D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define RX6110_REG_FLAG 0x1E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define RX6110_REG_CTRL 0x1F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define RX6110_REG_USER0 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define RX6110_REG_USER1 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define RX6110_REG_USER2 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define RX6110_REG_USER3 0x23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define RX6110_REG_USER4 0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define RX6110_REG_USER5 0x25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define RX6110_REG_USER6 0x26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define RX6110_REG_USER7 0x27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define RX6110_REG_USER8 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define RX6110_REG_USER9 0x29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define RX6110_REG_USERA 0x2A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define RX6110_REG_USERB 0x2B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define RX6110_REG_USERC 0x2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define RX6110_REG_USERD 0x2D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define RX6110_REG_USERE 0x2E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define RX6110_REG_USERF 0x2F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define RX6110_REG_RES2 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define RX6110_REG_RES3 0x31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define RX6110_REG_IRQ 0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define RX6110_BIT_ALARM_EN BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* Extension Register (1Dh) bit positions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define RX6110_BIT_EXT_TSEL0 BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define RX6110_BIT_EXT_TSEL1 BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define RX6110_BIT_EXT_TSEL2 BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define RX6110_BIT_EXT_WADA BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define RX6110_BIT_EXT_TE BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define RX6110_BIT_EXT_USEL BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define RX6110_BIT_EXT_FSEL0 BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define RX6110_BIT_EXT_FSEL1 BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* Flag Register (1Eh) bit positions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define RX6110_BIT_FLAG_VLF BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define RX6110_BIT_FLAG_AF BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define RX6110_BIT_FLAG_TF BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define RX6110_BIT_FLAG_UF BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* Control Register (1Fh) bit positions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define RX6110_BIT_CTRL_TBKE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define RX6110_BIT_CTRL_TBKON BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define RX6110_BIT_CTRL_TSTP BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define RX6110_BIT_CTRL_AIE BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define RX6110_BIT_CTRL_TIE BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define RX6110_BIT_CTRL_UIE BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define RX6110_BIT_CTRL_STOP BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define RX6110_BIT_CTRL_TEST BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) RTC_SEC = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) RTC_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) RTC_HOUR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) RTC_WDAY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) RTC_MDAY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) RTC_MONTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) RTC_YEAR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) RTC_NR_TIME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define RX6110_DRIVER_NAME "rx6110"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct rx6110_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * rx6110_rtc_tm_to_data - convert rtc_time to native time encoding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * @tm: holds date and time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * @data: holds the encoding in rx6110 native form
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static int rx6110_rtc_tm_to_data(struct rtc_time *tm, u8 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) pr_debug("%s: date %ptRr\n", __func__, tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * The year in the RTC is a value between 0 and 99.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * Assume that this represents the current century
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * and disregard all other values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (tm->tm_year < 100 || tm->tm_year >= 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) data[RTC_SEC] = bin2bcd(tm->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) data[RTC_MIN] = bin2bcd(tm->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) data[RTC_HOUR] = bin2bcd(tm->tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) data[RTC_WDAY] = BIT(bin2bcd(tm->tm_wday));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) data[RTC_MDAY] = bin2bcd(tm->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) data[RTC_MONTH] = bin2bcd(tm->tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) data[RTC_YEAR] = bin2bcd(tm->tm_year % 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * rx6110_data_to_rtc_tm - convert native time encoding to rtc_time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * @data: holds the encoding in rx6110 native form
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * @tm: holds date and time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int rx6110_data_to_rtc_tm(u8 *data, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) tm->tm_sec = bcd2bin(data[RTC_SEC] & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) tm->tm_min = bcd2bin(data[RTC_MIN] & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* only 24-hour clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) tm->tm_wday = ffs(data[RTC_WDAY] & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) tm->tm_mday = bcd2bin(data[RTC_MDAY] & 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) tm->tm_mon = bcd2bin(data[RTC_MONTH] & 0x1f) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) tm->tm_year = bcd2bin(data[RTC_YEAR]) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) pr_debug("%s: date %ptRr\n", __func__, tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * The year in the RTC is a value between 0 and 99.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * Assume that this represents the current century
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * and disregard all other values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (tm->tm_year < 100 || tm->tm_year >= 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * rx6110_set_time - set the current time in the rx6110 registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * @dev: the rtc device in use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * @tm: holds date and time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * BUG: The HW assumes every year that is a multiple of 4 to be a leap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * year. Next time this is wrong is 2100, which will not be a leap year
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * Note: If STOP is not set/cleared, the clock will start when the seconds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * register is written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static int rx6110_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct rx6110_data *rx6110 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) u8 data[RTC_NR_TIME];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) ret = rx6110_rtc_tm_to_data(tm, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /* set STOP bit before changing clock/calendar */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) ret = regmap_update_bits(rx6110->regmap, RX6110_REG_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) RX6110_BIT_CTRL_STOP, RX6110_BIT_CTRL_STOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) ret = regmap_bulk_write(rx6110->regmap, RX6110_REG_SEC, data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) RTC_NR_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /* The time in the RTC is valid. Be sure to have VLF cleared. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) ret = regmap_update_bits(rx6110->regmap, RX6110_REG_FLAG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) RX6110_BIT_FLAG_VLF, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* clear STOP bit after changing clock/calendar */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) ret = regmap_update_bits(rx6110->regmap, RX6110_REG_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) RX6110_BIT_CTRL_STOP, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * rx6110_get_time - get the current time from the rx6110 registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * @dev: the rtc device in use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * @tm: holds date and time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static int rx6110_get_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct rx6110_data *rx6110 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) u8 data[RTC_NR_TIME];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) ret = regmap_read(rx6110->regmap, RX6110_REG_FLAG, &flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /* check for VLF Flag (set at power-on) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if ((flags & RX6110_BIT_FLAG_VLF)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) dev_warn(dev, "Voltage low, data is invalid.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* read registers to date */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) ret = regmap_bulk_read(rx6110->regmap, RX6110_REG_SEC, data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) RTC_NR_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) ret = rx6110_data_to_rtc_tm(data, tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) dev_dbg(dev, "%s: date %ptRr\n", __func__, tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static const struct reg_sequence rx6110_default_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) { RX6110_REG_RES1, 0xB8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) { RX6110_REG_RES2, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) { RX6110_REG_RES3, 0x10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) { RX6110_REG_IRQ, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) { RX6110_REG_ALMIN, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) { RX6110_REG_ALHOUR, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) { RX6110_REG_ALWDAY, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * rx6110_init - initialize the rx6110 registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * @rx6110: pointer to the rx6110 struct in use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static int rx6110_init(struct rx6110_data *rx6110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) struct rtc_device *rtc = rx6110->rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) ret = regmap_update_bits(rx6110->regmap, RX6110_REG_EXT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) RX6110_BIT_EXT_TE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) ret = regmap_register_patch(rx6110->regmap, rx6110_default_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ARRAY_SIZE(rx6110_default_regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) ret = regmap_read(rx6110->regmap, RX6110_REG_FLAG, &flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /* check for VLF Flag (set at power-on) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) if ((flags & RX6110_BIT_FLAG_VLF))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) dev_warn(&rtc->dev, "Voltage low, data loss detected.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /* check for Alarm Flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (flags & RX6110_BIT_FLAG_AF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) dev_warn(&rtc->dev, "An alarm may have been missed.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) /* check for Periodic Timer Flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (flags & RX6110_BIT_FLAG_TF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) dev_warn(&rtc->dev, "Periodic timer was detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /* check for Update Timer Flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (flags & RX6110_BIT_FLAG_UF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) dev_warn(&rtc->dev, "Update timer was detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /* clear all flags BUT VLF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) ret = regmap_update_bits(rx6110->regmap, RX6110_REG_FLAG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) RX6110_BIT_FLAG_AF |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) RX6110_BIT_FLAG_UF |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) RX6110_BIT_FLAG_TF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static const struct rtc_class_ops rx6110_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) .read_time = rx6110_get_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .set_time = rx6110_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) static struct regmap_config regmap_spi_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .max_register = RX6110_REG_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .read_flag_mask = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * rx6110_probe - initialize rtc driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * @spi: pointer to spi device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static int rx6110_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) struct rx6110_data *rx6110;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) if ((spi->bits_per_word && spi->bits_per_word != 8) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) (spi->max_speed_hz > 2000000) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) (spi->mode != (SPI_CS_HIGH | SPI_CPOL | SPI_CPHA))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) dev_warn(&spi->dev, "SPI settings: bits_per_word: %d, max_speed_hz: %d, mode: %xh\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) spi->bits_per_word, spi->max_speed_hz, spi->mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) dev_warn(&spi->dev, "driving device in an unsupported mode");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) rx6110 = devm_kzalloc(&spi->dev, sizeof(*rx6110), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (!rx6110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) rx6110->regmap = devm_regmap_init_spi(spi, ®map_spi_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) if (IS_ERR(rx6110->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) dev_err(&spi->dev, "regmap init failed for rtc rx6110\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return PTR_ERR(rx6110->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) spi_set_drvdata(spi, rx6110);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) rx6110->rtc = devm_rtc_device_register(&spi->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) RX6110_DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) &rx6110_rtc_ops, THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (IS_ERR(rx6110->rtc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return PTR_ERR(rx6110->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) err = rx6110_init(rx6110);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) rx6110->rtc->max_user_freq = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) static const struct spi_device_id rx6110_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) { "rx6110", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) MODULE_DEVICE_TABLE(spi, rx6110_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static const struct of_device_id rx6110_spi_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) { .compatible = "epson,rx6110" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) MODULE_DEVICE_TABLE(of, rx6110_spi_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) static struct spi_driver rx6110_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) .name = RX6110_DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .of_match_table = of_match_ptr(rx6110_spi_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) .probe = rx6110_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) .id_table = rx6110_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) module_spi_driver(rx6110_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) MODULE_AUTHOR("Val Krutov <val.krutov@erd.epson.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) MODULE_DESCRIPTION("RX-6110 SA RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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