^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * RTC driver for Rockchip RK808
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Chris Zhong <zyw@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Author: Zhang Qing <zhangqing@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mfd/rk808.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* RTC_CTRL_REG bitfields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define BIT_RTC_CTRL_REG_STOP_RTC_M BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* RK808 has a shadowed register for saving a "frozen" RTC time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * When user setting "GET_TIME" to 1, the time will save in this shadowed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * register. If set "READSEL" to 1, user read rtc time register, actually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * get the time of that moment. If we need the real time, clr this bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define BIT_RTC_CTRL_REG_RTC_GET_TIME BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define BIT_RTC_CTRL_REG_RTC_READSEL_M BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define RTC_STATUS_MASK 0xFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define SECONDS_REG_MSK 0x7F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define MINUTES_REG_MAK 0x7F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define HOURS_REG_MSK 0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define DAYS_REG_MSK 0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define MONTHS_REG_MSK 0x1F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define YEARS_REG_MSK 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define WEEKS_REG_MSK 0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define RTC_NEED_TRANSITIONS BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define NUM_TIME_REGS (RK808_WEEKS_REG - RK808_SECONDS_REG + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define NUM_ALARM_REGS (RK808_ALARM_YEARS_REG - RK808_ALARM_SECONDS_REG + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct rk_rtc_compat_reg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) unsigned int ctrl_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) unsigned int status_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) unsigned int alarm_seconds_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) unsigned int int_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) unsigned int seconds_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct rk808_rtc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct rk808 *rk808;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct rk_rtc_compat_reg *creg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) unsigned int flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * The Rockchip calendar used by the RK808 counts November with 31 days. We use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * these translation functions to convert its dates to/from the Gregorian
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * calendar used by the rest of the world. We arbitrarily define Jan 1st, 2016
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * as the day when both calendars were in sync, and treat all other dates
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * relative to that.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * NOTE: Other system software (e.g. firmware) that reads the same hardware must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * implement this exact same conversion algorithm, with the same anchor date.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static time64_t nov2dec_transitions(struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return (tm->tm_year + 1900) - 2016 + (tm->tm_mon + 1 > 11 ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static void rockchip_to_gregorian(struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* If it's Nov 31st, rtc_tm_to_time64() will count that like Dec 1st */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) time64_t time = rtc_tm_to_time64(tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) rtc_time64_to_tm(time + nov2dec_transitions(tm) * 86400, tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static void gregorian_to_rockchip(struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) time64_t extra_days = nov2dec_transitions(tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) time64_t time = rtc_tm_to_time64(tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) rtc_time64_to_tm(time - extra_days * 86400, tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* Compensate if we went back over Nov 31st (will work up to 2381) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (nov2dec_transitions(tm) < extra_days) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (tm->tm_mon + 1 == 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) tm->tm_mday++; /* This may result in 31! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) rtc_time64_to_tm(time - (extra_days - 1) * 86400, tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* Read current time and date in RTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static int rk808_rtc_readtime(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct rk808 *rk808 = rk808_rtc->rk808;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) u8 rtc_data[NUM_TIME_REGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* Force an update of the shadowed registers right now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) BIT_RTC_CTRL_REG_RTC_GET_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) BIT_RTC_CTRL_REG_RTC_GET_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) dev_err(dev, "Failed to update bits rtc_ctrl: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * After we set the GET_TIME bit, the rtc time can't be read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * immediately. So we should wait up to 31.25 us, about one cycle of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * 32khz. If we clear the GET_TIME bit here, the time of i2c transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * certainly more than 31.25us: 16 * 2.5us at 400kHz bus frequency.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) BIT_RTC_CTRL_REG_RTC_GET_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) dev_err(dev, "Failed to update bits rtc_ctrl: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) ret = regmap_bulk_read(rk808->regmap, rk808_rtc->creg->seconds_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) rtc_data, NUM_TIME_REGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) dev_err(dev, "Failed to bulk read rtc_data: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) tm->tm_sec = bcd2bin(rtc_data[0] & SECONDS_REG_MSK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) tm->tm_min = bcd2bin(rtc_data[1] & MINUTES_REG_MAK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) tm->tm_hour = bcd2bin(rtc_data[2] & HOURS_REG_MSK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) tm->tm_mday = bcd2bin(rtc_data[3] & DAYS_REG_MSK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) tm->tm_mon = (bcd2bin(rtc_data[4] & MONTHS_REG_MSK)) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) tm->tm_year = (bcd2bin(rtc_data[5] & YEARS_REG_MSK)) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) tm->tm_wday = bcd2bin(rtc_data[6] & WEEKS_REG_MSK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (rk808_rtc->flag & RTC_NEED_TRANSITIONS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) rockchip_to_gregorian(tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) dev_dbg(dev, "RTC date/time %4d-%02d-%02d(%d) %02d:%02d:%02d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /* Set current time and date in RTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static int rk808_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct rk808 *rk808 = rk808_rtc->rk808;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) u8 rtc_data[NUM_TIME_REGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) dev_dbg(dev, "set RTC date/time %4d-%02d-%02d(%d) %02d:%02d:%02d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (rk808_rtc->flag & RTC_NEED_TRANSITIONS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) gregorian_to_rockchip(tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) rtc_data[0] = bin2bcd(tm->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) rtc_data[1] = bin2bcd(tm->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) rtc_data[2] = bin2bcd(tm->tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) rtc_data[3] = bin2bcd(tm->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) rtc_data[4] = bin2bcd(tm->tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) rtc_data[5] = bin2bcd(tm->tm_year - 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) rtc_data[6] = bin2bcd(tm->tm_wday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /* Stop RTC while updating the RTC registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) BIT_RTC_CTRL_REG_STOP_RTC_M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) BIT_RTC_CTRL_REG_STOP_RTC_M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) dev_err(dev, "Failed to update RTC control: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) ret = regmap_bulk_write(rk808->regmap, rk808_rtc->creg->seconds_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) rtc_data, NUM_TIME_REGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) dev_err(dev, "Failed to bull write rtc_data: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* Start RTC again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) BIT_RTC_CTRL_REG_STOP_RTC_M, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) dev_err(dev, "Failed to update RTC control: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* Read alarm time and date in RTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static int rk808_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct rk808 *rk808 = rk808_rtc->rk808;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) u8 alrm_data[NUM_ALARM_REGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) uint32_t int_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) ret = regmap_bulk_read(rk808->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) rk808_rtc->creg->alarm_seconds_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) alrm_data, NUM_ALARM_REGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) dev_err(dev, "Failed to read RTC alarm date REG: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) alrm->time.tm_sec = bcd2bin(alrm_data[0] & SECONDS_REG_MSK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) alrm->time.tm_min = bcd2bin(alrm_data[1] & MINUTES_REG_MAK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) alrm->time.tm_hour = bcd2bin(alrm_data[2] & HOURS_REG_MSK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) alrm->time.tm_mday = bcd2bin(alrm_data[3] & DAYS_REG_MSK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) alrm->time.tm_mon = (bcd2bin(alrm_data[4] & MONTHS_REG_MSK)) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) alrm->time.tm_year = (bcd2bin(alrm_data[5] & YEARS_REG_MSK)) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (rk808_rtc->flag & RTC_NEED_TRANSITIONS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) rockchip_to_gregorian(&alrm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) ret = regmap_read(rk808->regmap, rk808_rtc->creg->int_reg, &int_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) dev_err(dev, "Failed to read RTC INT REG: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) dev_dbg(dev, "alrm read RTC date/time %ptRd(%d) %ptRt\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) &alrm->time, alrm->time.tm_wday, &alrm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) alrm->enabled = (int_reg & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static int rk808_rtc_stop_alarm(struct rk808_rtc *rk808_rtc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) struct rk808 *rk808 = rk808_rtc->rk808;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->int_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) BIT_RTC_INTERRUPTS_REG_IT_ALARM_M, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static int rk808_rtc_start_alarm(struct rk808_rtc *rk808_rtc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) struct rk808 *rk808 = rk808_rtc->rk808;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->int_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) BIT_RTC_INTERRUPTS_REG_IT_ALARM_M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static int rk808_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) struct rk808 *rk808 = rk808_rtc->rk808;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) u8 alrm_data[NUM_ALARM_REGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) ret = rk808_rtc_stop_alarm(rk808_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) dev_err(dev, "Failed to stop alarm: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) dev_dbg(dev, "alrm set RTC date/time %ptRd(%d) %ptRt\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) &alrm->time, alrm->time.tm_wday, &alrm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (rk808_rtc->flag & RTC_NEED_TRANSITIONS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) gregorian_to_rockchip(&alrm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) alrm_data[0] = bin2bcd(alrm->time.tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) alrm_data[1] = bin2bcd(alrm->time.tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) alrm_data[2] = bin2bcd(alrm->time.tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) alrm_data[3] = bin2bcd(alrm->time.tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) alrm_data[4] = bin2bcd(alrm->time.tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) alrm_data[5] = bin2bcd(alrm->time.tm_year - 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) ret = regmap_bulk_write(rk808->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) rk808_rtc->creg->alarm_seconds_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) alrm_data, NUM_ALARM_REGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) dev_err(dev, "Failed to bulk write: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) if (alrm->enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) ret = rk808_rtc_start_alarm(rk808_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) dev_err(dev, "Failed to start alarm: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static int rk808_rtc_alarm_irq_enable(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return rk808_rtc_start_alarm(rk808_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) return rk808_rtc_stop_alarm(rk808_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) * We will just handle setting the frequency and make use the framework for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * reading the periodic interupts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) * @freq: Current periodic IRQ freq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) * bit 0: every second
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) * bit 1: every minute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) * bit 2: every hour
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) * bit 3: every day
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) static irqreturn_t rk808_alarm_irq(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) struct rk808_rtc *rk808_rtc = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) struct rk808 *rk808 = rk808_rtc->rk808;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) struct i2c_client *client = rk808->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ret = regmap_write(rk808->regmap, rk808_rtc->creg->status_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) RTC_STATUS_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) "%s:Failed to update RTC status: %d\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) rtc_update_irq(rk808_rtc->rtc, 1, RTC_IRQF | RTC_AF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) "%s:irq=%d\n", __func__, irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static const struct rtc_class_ops rk808_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .read_time = rk808_rtc_readtime,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .set_time = rk808_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) .read_alarm = rk808_rtc_readalarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .set_alarm = rk808_rtc_setalarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .alarm_irq_enable = rk808_rtc_alarm_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) /* Turn off the alarm if it should not be a wake source. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) static int rk808_rtc_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) enable_irq_wake(rk808_rtc->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /* Enable the alarm if it should be enabled (in case it was disabled to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * prevent use as a wake source).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) static int rk808_rtc_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) disable_irq_wake(rk808_rtc->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) static SIMPLE_DEV_PM_OPS(rk808_rtc_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) rk808_rtc_suspend, rk808_rtc_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static struct rk_rtc_compat_reg rk808_creg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .ctrl_reg = RK808_RTC_CTRL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .status_reg = RK808_RTC_STATUS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .alarm_seconds_reg = RK808_ALARM_SECONDS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .int_reg = RK808_RTC_INT_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .seconds_reg = RK808_SECONDS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static struct rk_rtc_compat_reg rk817_creg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) .ctrl_reg = RK817_RTC_CTRL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .status_reg = RK817_RTC_STATUS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .alarm_seconds_reg = RK817_ALARM_SECONDS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .int_reg = RK817_RTC_INT_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) .seconds_reg = RK817_SECONDS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static int rk808_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) struct rk808_rtc *rk808_rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) switch (rk808->variant) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) case RK805_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) case RK808_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) case RK816_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) case RK818_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) np = of_get_child_by_name(pdev->dev.parent->of_node, "rtc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (np && !of_device_is_available(np)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) dev_info(&pdev->dev, "device is disabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) rk808_rtc = devm_kzalloc(&pdev->dev, sizeof(*rk808_rtc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) if (rk808_rtc == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) switch (rk808->variant) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) case RK808_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) case RK818_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) rk808_rtc->creg = &rk808_creg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) rk808_rtc->flag |= RTC_NEED_TRANSITIONS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) case RK805_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) case RK816_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) rk808_rtc->creg = &rk808_creg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) case RK809_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) case RK817_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) rk808_rtc->creg = &rk817_creg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) rk808_rtc->creg = &rk808_creg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) platform_set_drvdata(pdev, rk808_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) rk808_rtc->rk808 = rk808;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) /* start rtc running by default, and use shadowed timer. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) BIT_RTC_CTRL_REG_STOP_RTC_M |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) BIT_RTC_CTRL_REG_RTC_READSEL_M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) BIT_RTC_CTRL_REG_RTC_READSEL_M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) "Failed to update RTC control: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) ret = regmap_write(rk808->regmap, rk808_rtc->creg->status_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) RTC_STATUS_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) "Failed to write RTC status: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) device_init_wakeup(&pdev->dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) rk808_rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if (IS_ERR(rk808_rtc->rtc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) return PTR_ERR(rk808_rtc->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) rk808_rtc->rtc->ops = &rk808_rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) rk808_rtc->irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) if (rk808_rtc->irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) return rk808_rtc->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) /* request alarm irq of rk808 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) ret = devm_request_threaded_irq(&pdev->dev, rk808_rtc->irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) rk808_alarm_irq, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) "RTC alarm", rk808_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) rk808_rtc->irq, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) return rtc_register_device(rk808_rtc->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) static struct platform_driver rk808_rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) .probe = rk808_rtc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) .name = "rk808-rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) .pm = &rk808_rtc_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) module_platform_driver(rk808_rtc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) MODULE_DESCRIPTION("RTC driver for the rk808 series PMICs");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) MODULE_AUTHOR("Zhang Qing <zhangqing@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) MODULE_ALIAS("platform:rk808-rtc");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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