Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * rtc-rc5t583.c -- RICOH RC5T583 Real Time Clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Author: Venu Byravarasu <vbyravarasu@nvidia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/mfd/rc5t583.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) struct rc5t583_rtc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	struct rtc_device	*rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	/* To store the list of enabled interrupts, during system suspend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	u32 irqen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) /* Total number of RTC registers needed to set time*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define NUM_TIME_REGS	(RC5T583_RTC_YEAR - RC5T583_RTC_SEC + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) /* Total number of RTC registers needed to set Y-Alarm*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define NUM_YAL_REGS	(RC5T583_RTC_AY_YEAR - RC5T583_RTC_AY_MIN + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) /* Set Y-Alarm interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define SET_YAL BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) /* Get Y-Alarm interrupt status*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define GET_YAL_STATUS BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) static int rc5t583_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	/* Set Y-Alarm, based on 'enabled' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	val = enabled ? SET_YAL : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	return regmap_update_bits(rc5t583->regmap, RC5T583_RTC_CTL1, SET_YAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  * Gets current rc5t583 RTC time and date parameters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  * The RTC's time/alarm representation is not what gmtime(3) requires
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  * Linux to use:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  *  - Months are 1..12 vs Linux 0-11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  *  - Years are 0..99 vs Linux 1900..N (we assume 21st century)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) static int rc5t583_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	u8 rtc_data[NUM_TIME_REGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	ret = regmap_bulk_read(rc5t583->regmap, RC5T583_RTC_SEC, rtc_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		NUM_TIME_REGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		dev_err(dev, "RTC read time failed with err:%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	tm->tm_sec = bcd2bin(rtc_data[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	tm->tm_min = bcd2bin(rtc_data[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	tm->tm_hour = bcd2bin(rtc_data[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	tm->tm_wday = bcd2bin(rtc_data[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	tm->tm_mday = bcd2bin(rtc_data[4]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	tm->tm_mon = bcd2bin(rtc_data[5]) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	tm->tm_year = bcd2bin(rtc_data[6]) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) static int rc5t583_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	unsigned char rtc_data[NUM_TIME_REGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	rtc_data[0] = bin2bcd(tm->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	rtc_data[1] = bin2bcd(tm->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	rtc_data[2] = bin2bcd(tm->tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	rtc_data[3] = bin2bcd(tm->tm_wday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	rtc_data[4] = bin2bcd(tm->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	rtc_data[5] = bin2bcd(tm->tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	rtc_data[6] = bin2bcd(tm->tm_year - 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	ret = regmap_bulk_write(rc5t583->regmap, RC5T583_RTC_SEC, rtc_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		NUM_TIME_REGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		dev_err(dev, "RTC set time failed with error %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int rc5t583_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	unsigned char alarm_data[NUM_YAL_REGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	u32 interrupt_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	ret = regmap_bulk_read(rc5t583->regmap, RC5T583_RTC_AY_MIN, alarm_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		NUM_YAL_REGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		dev_err(dev, "rtc_read_alarm error %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	alm->time.tm_sec = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	alm->time.tm_min = bcd2bin(alarm_data[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	alm->time.tm_hour = bcd2bin(alarm_data[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	alm->time.tm_mday = bcd2bin(alarm_data[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	alm->time.tm_mon = bcd2bin(alarm_data[3]) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	alm->time.tm_year = bcd2bin(alarm_data[4]) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	ret = regmap_read(rc5t583->regmap, RC5T583_RTC_CTL1, &interrupt_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	/* check if YALE is set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	if (interrupt_enable & SET_YAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		alm->enabled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static int rc5t583_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	unsigned char alarm_data[NUM_YAL_REGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	ret = rc5t583_rtc_alarm_irq_enable(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	alarm_data[0] = bin2bcd(alm->time.tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	alarm_data[1] = bin2bcd(alm->time.tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	alarm_data[2] = bin2bcd(alm->time.tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	alarm_data[3] = bin2bcd(alm->time.tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	alarm_data[4] = bin2bcd(alm->time.tm_year - 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	ret = regmap_bulk_write(rc5t583->regmap, RC5T583_RTC_AY_MIN, alarm_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		NUM_YAL_REGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		dev_err(dev, "rtc_set_alarm error %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	if (alm->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		ret = rc5t583_rtc_alarm_irq_enable(dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static irqreturn_t rc5t583_rtc_interrupt(int irq, void *rtc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	struct device *dev = rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	struct rc5t583_rtc *rc5t583_rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	unsigned long events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	u32 rtc_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	ret = regmap_read(rc5t583->regmap, RC5T583_RTC_CTL2, &rtc_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	if (rtc_reg & GET_YAL_STATUS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		events = RTC_IRQF | RTC_AF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		/* clear pending Y-alarm interrupt bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		rtc_reg &= ~GET_YAL_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	ret = regmap_write(rc5t583->regmap, RC5T583_RTC_CTL2, rtc_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	/* Notify RTC core on event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	rtc_update_irq(rc5t583_rtc->rtc, 1, events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static const struct rtc_class_ops rc5t583_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	.read_time	= rc5t583_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	.set_time	= rc5t583_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	.read_alarm	= rc5t583_rtc_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	.set_alarm	= rc5t583_rtc_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	.alarm_irq_enable = rc5t583_rtc_alarm_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static int rc5t583_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	struct rc5t583 *rc5t583 = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	struct rc5t583_rtc *ricoh_rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	struct rc5t583_platform_data *pmic_plat_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	ricoh_rtc = devm_kzalloc(&pdev->dev, sizeof(struct rc5t583_rtc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 			GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	if (!ricoh_rtc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	platform_set_drvdata(pdev, ricoh_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	/* Clear pending interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	ret = regmap_write(rc5t583->regmap, RC5T583_RTC_CTL2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	/* clear RTC Adjust register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	ret = regmap_write(rc5t583->regmap, RC5T583_RTC_ADJ, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		dev_err(&pdev->dev, "unable to program rtc_adjust reg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	pmic_plat_data = dev_get_platdata(rc5t583->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	irq = pmic_plat_data->irq_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	if (irq <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		dev_warn(&pdev->dev, "Wake up is not possible as irq = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	irq += RC5T583_IRQ_YALE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		rc5t583_rtc_interrupt, IRQF_TRIGGER_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		"rtc-rc5t583", &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		dev_err(&pdev->dev, "IRQ is not free.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	device_init_wakeup(&pdev->dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	ricoh_rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		&rc5t583_rtc_ops, THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	if (IS_ERR(ricoh_rtc->rtc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		ret = PTR_ERR(ricoh_rtc->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		dev_err(&pdev->dev, "RTC device register: err %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)  * Disable rc5t583 RTC interrupts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)  * Sets status flag to free.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static int rc5t583_rtc_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	struct rc5t583_rtc *rc5t583_rtc = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	rc5t583_rtc_alarm_irq_enable(&rc5t583_rtc->rtc->dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static int rc5t583_rtc_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	struct rc5t583_rtc *rc5t583_rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	/* Store current list of enabled interrupts*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	ret = regmap_read(rc5t583->regmap, RC5T583_RTC_CTL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		&rc5t583_rtc->irqen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static int rc5t583_rtc_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	struct rc5t583 *rc5t583 = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	struct rc5t583_rtc *rc5t583_rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	/* Restore list of enabled interrupts before suspend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	return regmap_write(rc5t583->regmap, RC5T583_RTC_CTL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		rc5t583_rtc->irqen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static SIMPLE_DEV_PM_OPS(rc5t583_rtc_pm_ops, rc5t583_rtc_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 			rc5t583_rtc_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static struct platform_driver rc5t583_rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	.probe		= rc5t583_rtc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	.remove		= rc5t583_rtc_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	.driver		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		.name	= "rtc-rc5t583",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 		.pm	= &rc5t583_rtc_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) module_platform_driver(rc5t583_rtc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) MODULE_ALIAS("platform:rtc-rc5t583");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) MODULE_AUTHOR("Venu Byravarasu <vbyravarasu@nvidia.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) MODULE_LICENSE("GPL v2");