^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/drivers/rtc/rtc-pl030.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2000-2001 Deep Blue Solutions Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/amba/bus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define RTC_DR (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define RTC_MR (4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define RTC_STAT (8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define RTC_EOI (8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define RTC_LR (12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define RTC_CR (16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define RTC_CR_MIE (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct pl030_rtc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static irqreturn_t pl030_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct pl030_rtc *rtc = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) writel(0, rtc->base + RTC_EOI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static int pl030_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct pl030_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) rtc_time64_to_tm(readl(rtc->base + RTC_MR), &alrm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static int pl030_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct pl030_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) writel(rtc_tm_to_time64(&alrm->time), rtc->base + RTC_MR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static int pl030_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct pl030_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) rtc_time64_to_tm(readl(rtc->base + RTC_DR), tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * Set the RTC time. Unfortunately, we can't accurately set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * the point at which the counter updates.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * Also, since RTC_LR is transferred to RTC_CR on next rising
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * edge of the 1Hz clock, we must write the time one second
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * in advance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static int pl030_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct pl030_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) writel(rtc_tm_to_time64(tm) + 1, rtc->base + RTC_LR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static const struct rtc_class_ops pl030_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .read_time = pl030_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .set_time = pl030_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .read_alarm = pl030_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .set_alarm = pl030_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static int pl030_probe(struct amba_device *dev, const struct amba_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct pl030_rtc *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) ret = amba_request_regions(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) goto err_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) rtc = devm_kzalloc(&dev->dev, sizeof(*rtc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (!rtc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) goto err_rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) rtc->rtc = devm_rtc_allocate_device(&dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (IS_ERR(rtc->rtc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) ret = PTR_ERR(rtc->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) goto err_rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) rtc->rtc->ops = &pl030_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) rtc->rtc->range_max = U32_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) rtc->base = ioremap(dev->res.start, resource_size(&dev->res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (!rtc->base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) goto err_rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) __raw_writel(0, rtc->base + RTC_CR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) __raw_writel(0, rtc->base + RTC_EOI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) amba_set_drvdata(dev, rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ret = request_irq(dev->irq[0], pl030_interrupt, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) "rtc-pl030", rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) goto err_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) ret = rtc_register_device(rtc->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) goto err_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) err_reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) free_irq(dev->irq[0], rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) err_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) iounmap(rtc->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) err_rtc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) amba_release_regions(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) err_req:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static void pl030_remove(struct amba_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct pl030_rtc *rtc = amba_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) writel(0, rtc->base + RTC_CR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) free_irq(dev->irq[0], rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) iounmap(rtc->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) amba_release_regions(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static struct amba_id pl030_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .id = 0x00041030,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .mask = 0x000fffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) { 0, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) MODULE_DEVICE_TABLE(amba, pl030_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static struct amba_driver pl030_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .drv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .name = "rtc-pl030",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .probe = pl030_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .remove = pl030_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .id_table = pl030_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) module_amba_driver(pl030_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) MODULE_DESCRIPTION("ARM AMBA PL030 RTC Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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