^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * An I2C driver for the Philips PCF8563 RTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2005-06 Tower Technologies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Alessandro Zummo <a.zummo@towertech.it>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Maintainers: http://www.nslu2-linux.org/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * based on the other drivers in this same directory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * http://www.semiconductors.philips.com/acrobat/datasheets/PCF8563-04.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PCF8563_REG_ST1 0x00 /* status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PCF8563_REG_ST2 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PCF8563_BIT_AIE BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define PCF8563_BIT_AF BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define PCF8563_BITS_ST2_N (7 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define PCF8563_REG_SC 0x02 /* datetime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define PCF8563_REG_MN 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define PCF8563_REG_HR 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define PCF8563_REG_DM 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define PCF8563_REG_DW 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define PCF8563_REG_MO 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PCF8563_REG_YR 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define PCF8563_REG_AMN 0x09 /* alarm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define PCF8563_REG_CLKO 0x0D /* clock out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define PCF8563_REG_CLKO_FE 0x80 /* clock out enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define PCF8563_REG_CLKO_F_MASK 0x03 /* frequenc mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define PCF8563_REG_CLKO_F_32768HZ 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define PCF8563_REG_CLKO_F_1024HZ 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define PCF8563_REG_CLKO_F_32HZ 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define PCF8563_REG_CLKO_F_1HZ 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define PCF8563_REG_TMRC 0x0E /* timer control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define PCF8563_TMRC_ENABLE BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define PCF8563_TMRC_4096 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define PCF8563_TMRC_64 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define PCF8563_TMRC_1 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define PCF8563_TMRC_1_60 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define PCF8563_TMRC_MASK 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define PCF8563_REG_TMR 0x0F /* timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define PCF8563_SC_LV 0x80 /* low voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define PCF8563_MO_C 0x80 /* century */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static struct i2c_driver pcf8563_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct pcf8563 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * The meaning of MO_C bit varies by the chip type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * From PCF8563 datasheet: this bit is toggled when the years
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * register overflows from 99 to 00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * 0 indicates the century is 20xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * 1 indicates the century is 19xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * From RTC8564 datasheet: this bit indicates change of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * century. When the year digit data overflows from 99 to 00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * this bit is set. By presetting it to 0 while still in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * 20th century, it will be set in year 2000, ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * There seems no reliable way to know how the system use this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * bit. So let's do it heuristically, assuming we are live in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * 1970...2069.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int c_polarity; /* 0: MO_C=1 means 19xx, otherwise MO_C=1 means 20xx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #ifdef CONFIG_COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct clk_hw clkout_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static int pcf8563_read_block_data(struct i2c_client *client, unsigned char reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unsigned char length, unsigned char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct i2c_msg msgs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {/* setup read ptr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .addr = client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .len = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .buf = ®,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .addr = client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .len = length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .buf = buf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if ((i2c_transfer(client->adapter, msgs, 2)) != 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) dev_err(&client->dev, "%s: read error\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static int pcf8563_write_block_data(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) unsigned char reg, unsigned char length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) unsigned char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int i, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) for (i = 0; i < length; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) unsigned char data[2] = { reg + i, buf[i] };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) err = i2c_master_send(client, data, sizeof(data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (err != sizeof(data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) "%s: err=%d addr=%02x, data=%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) __func__, err, data[0], data[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static int pcf8563_set_alarm_mode(struct i2c_client *client, bool on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) unsigned char buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) err = pcf8563_read_block_data(client, PCF8563_REG_ST2, 1, &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) buf |= PCF8563_BIT_AIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) buf &= ~PCF8563_BIT_AIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) buf &= ~(PCF8563_BIT_AF | PCF8563_BITS_ST2_N);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) err = pcf8563_write_block_data(client, PCF8563_REG_ST2, 1, &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) dev_err(&client->dev, "%s: write error\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static int pcf8563_get_alarm_mode(struct i2c_client *client, unsigned char *en,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) unsigned char *pen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) unsigned char buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) err = pcf8563_read_block_data(client, PCF8563_REG_ST2, 1, &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (en)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) *en = !!(buf & PCF8563_BIT_AIE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) if (pen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) *pen = !!(buf & PCF8563_BIT_AF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static irqreturn_t pcf8563_irq(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct pcf8563 *pcf8563 = i2c_get_clientdata(dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) char pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) err = pcf8563_get_alarm_mode(pcf8563->client, NULL, &pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (pending) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) rtc_update_irq(pcf8563->rtc, 1, RTC_IRQF | RTC_AF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) pcf8563_set_alarm_mode(pcf8563->client, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * In the routines that deal directly with the pcf8563 hardware, we use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static int pcf8563_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) struct pcf8563 *pcf8563 = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) unsigned char buf[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) err = pcf8563_read_block_data(client, PCF8563_REG_ST1, 9, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) if (buf[PCF8563_REG_SC] & PCF8563_SC_LV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) "low voltage detected, date/time is not reliable.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) "%s: raw data is st1=%02x, st2=%02x, sec=%02x, min=%02x, hr=%02x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) "mday=%02x, wday=%02x, mon=%02x, year=%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) buf[0], buf[1], buf[2], buf[3],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) buf[4], buf[5], buf[6], buf[7],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) buf[8]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) tm->tm_sec = bcd2bin(buf[PCF8563_REG_SC] & 0x7F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) tm->tm_min = bcd2bin(buf[PCF8563_REG_MN] & 0x7F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) tm->tm_hour = bcd2bin(buf[PCF8563_REG_HR] & 0x3F); /* rtc hr 0-23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) tm->tm_mday = bcd2bin(buf[PCF8563_REG_DM] & 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) tm->tm_wday = buf[PCF8563_REG_DW] & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) tm->tm_mon = bcd2bin(buf[PCF8563_REG_MO] & 0x1F) - 1; /* rtc mn 1-12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) tm->tm_year = bcd2bin(buf[PCF8563_REG_YR]) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* detect the polarity heuristically. see note above. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) pcf8563->c_polarity = (buf[PCF8563_REG_MO] & PCF8563_MO_C) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) (tm->tm_year >= 100) : (tm->tm_year < 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) "mday=%d, mon=%d, year=%d, wday=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) tm->tm_sec, tm->tm_min, tm->tm_hour,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static int pcf8563_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) struct pcf8563 *pcf8563 = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) unsigned char buf[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) dev_dbg(&client->dev, "%s: secs=%d, mins=%d, hours=%d, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) "mday=%d, mon=%d, year=%d, wday=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) tm->tm_sec, tm->tm_min, tm->tm_hour,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /* hours, minutes and seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) buf[PCF8563_REG_SC] = bin2bcd(tm->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) buf[PCF8563_REG_MN] = bin2bcd(tm->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) buf[PCF8563_REG_HR] = bin2bcd(tm->tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) buf[PCF8563_REG_DM] = bin2bcd(tm->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) /* month, 1 - 12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) buf[PCF8563_REG_MO] = bin2bcd(tm->tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /* year and century */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) buf[PCF8563_REG_YR] = bin2bcd(tm->tm_year - 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (pcf8563->c_polarity ? (tm->tm_year >= 100) : (tm->tm_year < 100))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) buf[PCF8563_REG_MO] |= PCF8563_MO_C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) buf[PCF8563_REG_DW] = tm->tm_wday & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) return pcf8563_write_block_data(client, PCF8563_REG_SC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 9 - PCF8563_REG_SC, buf + PCF8563_REG_SC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static int pcf8563_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) case RTC_VL_READ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) ret = i2c_smbus_read_byte_data(client, PCF8563_REG_SC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return put_user(ret & PCF8563_SC_LV ? RTC_VL_DATA_INVALID : 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) (unsigned int __user *)arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) return -ENOIOCTLCMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) static int pcf8563_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) unsigned char buf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) err = pcf8563_read_block_data(client, PCF8563_REG_AMN, 4, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) "%s: raw data is min=%02x, hr=%02x, mday=%02x, wday=%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) __func__, buf[0], buf[1], buf[2], buf[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) tm->time.tm_sec = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) tm->time.tm_min = bcd2bin(buf[0] & 0x7F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) tm->time.tm_hour = bcd2bin(buf[1] & 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) tm->time.tm_mday = bcd2bin(buf[2] & 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) tm->time.tm_wday = bcd2bin(buf[3] & 0x7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) err = pcf8563_get_alarm_mode(client, &tm->enabled, &tm->pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) dev_dbg(&client->dev, "%s: tm is mins=%d, hours=%d, mday=%d, wday=%d,"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) " enabled=%d, pending=%d\n", __func__, tm->time.tm_min,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) tm->time.tm_hour, tm->time.tm_mday, tm->time.tm_wday,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) tm->enabled, tm->pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static int pcf8563_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) unsigned char buf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /* The alarm has no seconds, round up to nearest minute */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (tm->time.tm_sec) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) time64_t alarm_time = rtc_tm_to_time64(&tm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) alarm_time += 60 - tm->time.tm_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) rtc_time64_to_tm(alarm_time, &tm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) dev_dbg(dev, "%s, min=%d hour=%d wday=%d mday=%d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) "enabled=%d pending=%d\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) tm->time.tm_min, tm->time.tm_hour, tm->time.tm_wday,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) tm->time.tm_mday, tm->enabled, tm->pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) buf[0] = bin2bcd(tm->time.tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) buf[1] = bin2bcd(tm->time.tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) buf[2] = bin2bcd(tm->time.tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) buf[3] = tm->time.tm_wday & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) err = pcf8563_write_block_data(client, PCF8563_REG_AMN, 4, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) return pcf8563_set_alarm_mode(client, !!tm->enabled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static int pcf8563_irq_enable(struct device *dev, unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) dev_dbg(dev, "%s: en=%d\n", __func__, enabled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) return pcf8563_set_alarm_mode(to_i2c_client(dev), !!enabled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) #ifdef CONFIG_COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) * Handling of the clkout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) #define clkout_hw_to_pcf8563(_hw) container_of(_hw, struct pcf8563, clkout_hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static const int clkout_rates[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 32768,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 1024,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) static unsigned long pcf8563_clkout_recalc_rate(struct clk_hw *hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) unsigned long parent_rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) struct pcf8563 *pcf8563 = clkout_hw_to_pcf8563(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) struct i2c_client *client = pcf8563->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) unsigned char buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) int ret = pcf8563_read_block_data(client, PCF8563_REG_CLKO, 1, &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) buf &= PCF8563_REG_CLKO_F_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) return clkout_rates[buf];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static long pcf8563_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) unsigned long *prate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) if (clkout_rates[i] <= rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) return clkout_rates[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) static int pcf8563_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) unsigned long parent_rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) struct pcf8563 *pcf8563 = clkout_hw_to_pcf8563(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) struct i2c_client *client = pcf8563->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) unsigned char buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) int ret = pcf8563_read_block_data(client, PCF8563_REG_CLKO, 1, &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) if (clkout_rates[i] == rate) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) buf &= ~PCF8563_REG_CLKO_F_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) buf |= i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) ret = pcf8563_write_block_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) PCF8563_REG_CLKO, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) static int pcf8563_clkout_control(struct clk_hw *hw, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) struct pcf8563 *pcf8563 = clkout_hw_to_pcf8563(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) struct i2c_client *client = pcf8563->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) unsigned char buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) int ret = pcf8563_read_block_data(client, PCF8563_REG_CLKO, 1, &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) buf |= PCF8563_REG_CLKO_FE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) buf &= ~PCF8563_REG_CLKO_FE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) ret = pcf8563_write_block_data(client, PCF8563_REG_CLKO, 1, &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) static int pcf8563_clkout_prepare(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) return pcf8563_clkout_control(hw, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) static void pcf8563_clkout_unprepare(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) pcf8563_clkout_control(hw, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) static int pcf8563_clkout_is_prepared(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) struct pcf8563 *pcf8563 = clkout_hw_to_pcf8563(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) struct i2c_client *client = pcf8563->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) unsigned char buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) int ret = pcf8563_read_block_data(client, PCF8563_REG_CLKO, 1, &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return !!(buf & PCF8563_REG_CLKO_FE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static const struct clk_ops pcf8563_clkout_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .prepare = pcf8563_clkout_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .unprepare = pcf8563_clkout_unprepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .is_prepared = pcf8563_clkout_is_prepared,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .recalc_rate = pcf8563_clkout_recalc_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .round_rate = pcf8563_clkout_round_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .set_rate = pcf8563_clkout_set_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) static struct clk *pcf8563_clkout_register_clk(struct pcf8563 *pcf8563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) struct i2c_client *client = pcf8563->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) struct device_node *node = client->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) struct clk_init_data init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) unsigned char buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) /* disable the clkout output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) buf = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) ret = pcf8563_write_block_data(client, PCF8563_REG_CLKO, 1, &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) init.name = "pcf8563-clkout";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) init.ops = &pcf8563_clkout_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) init.flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) init.parent_names = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) init.num_parents = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) pcf8563->clkout_hw.init = &init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) /* optional override of the clockname */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) of_property_read_string(node, "clock-output-names", &init.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) /* register the clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) clk = devm_clk_register(&client->dev, &pcf8563->clkout_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) if (!IS_ERR(clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) of_clk_add_provider(node, of_clk_src_simple_get, clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) return clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) static const struct rtc_class_ops pcf8563_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) .ioctl = pcf8563_rtc_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) .read_time = pcf8563_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) .set_time = pcf8563_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) .read_alarm = pcf8563_rtc_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) .set_alarm = pcf8563_rtc_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) .alarm_irq_enable = pcf8563_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) static int pcf8563_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) struct pcf8563 *pcf8563;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) unsigned char buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) dev_dbg(&client->dev, "%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) pcf8563 = devm_kzalloc(&client->dev, sizeof(struct pcf8563),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (!pcf8563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) i2c_set_clientdata(client, pcf8563);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) pcf8563->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) device_set_wakeup_capable(&client->dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) /* Set timer to lowest frequency to save power (ref Haoyu datasheet) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) buf = PCF8563_TMRC_1_60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) err = pcf8563_write_block_data(client, PCF8563_REG_TMRC, 1, &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) dev_err(&client->dev, "%s: write error\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) /* Clear flags and disable interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) buf = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) err = pcf8563_write_block_data(client, PCF8563_REG_ST2, 1, &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) dev_err(&client->dev, "%s: write error\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) pcf8563->rtc = devm_rtc_allocate_device(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (IS_ERR(pcf8563->rtc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) return PTR_ERR(pcf8563->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) pcf8563->rtc->ops = &pcf8563_rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) /* the pcf8563 alarm only supports a minute accuracy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) pcf8563->rtc->uie_unsupported = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) pcf8563->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) pcf8563->rtc->range_max = RTC_TIMESTAMP_END_2099;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) pcf8563->rtc->set_start_time = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) if (client->irq > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) err = devm_request_threaded_irq(&client->dev, client->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) NULL, pcf8563_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) pcf8563_driver.driver.name, client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) dev_err(&client->dev, "unable to request IRQ %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) err = rtc_register_device(pcf8563->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) #ifdef CONFIG_COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) /* register clk in common clk framework */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) pcf8563_clkout_register_clk(pcf8563);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) static const struct i2c_device_id pcf8563_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) { "pcf8563", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) { "rtc8564", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) MODULE_DEVICE_TABLE(i2c, pcf8563_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) static const struct of_device_id pcf8563_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) { .compatible = "nxp,pcf8563" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) { .compatible = "epson,rtc8564" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) { .compatible = "microcrystal,rv8564" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) MODULE_DEVICE_TABLE(of, pcf8563_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) static struct i2c_driver pcf8563_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) .name = "rtc-pcf8563",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) .of_match_table = of_match_ptr(pcf8563_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) .probe = pcf8563_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) .id_table = pcf8563_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) module_i2c_driver(pcf8563_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) MODULE_DESCRIPTION("Philips PCF8563/Epson RTC8564 RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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