Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2012 Avionic Design GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #define DRIVER_NAME "rtc-pcf8523"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #define REG_CONTROL1 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #define REG_CONTROL1_CAP_SEL (1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define REG_CONTROL1_STOP    (1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define REG_CONTROL3 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define REG_CONTROL3_PM_BLD (1 << 7) /* battery low detection disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define REG_CONTROL3_PM_VDD (1 << 6) /* switch-over disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define REG_CONTROL3_PM_DSM (1 << 5) /* direct switching mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define REG_CONTROL3_PM_MASK 0xe0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define REG_CONTROL3_BLF (1 << 2) /* battery low bit, read-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define REG_SECONDS  0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define REG_SECONDS_OS (1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define REG_MINUTES  0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define REG_HOURS    0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define REG_DAYS     0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define REG_WEEKDAYS 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define REG_MONTHS   0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define REG_YEARS    0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define REG_OFFSET   0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define REG_OFFSET_MODE BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) static int pcf8523_read(struct i2c_client *client, u8 reg, u8 *valuep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	struct i2c_msg msgs[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	u8 value = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	msgs[0].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	msgs[0].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	msgs[0].len = sizeof(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	msgs[0].buf = &reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	msgs[1].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	msgs[1].flags = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	msgs[1].len = sizeof(value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	msgs[1].buf = &value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	err = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	*valuep = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) static int pcf8523_write(struct i2c_client *client, u8 reg, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	u8 buffer[2] = { reg, value };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	struct i2c_msg msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	msg.addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	msg.flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	msg.len = sizeof(buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	msg.buf = buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	err = i2c_transfer(client->adapter, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static int pcf8523_voltage_low(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	err = pcf8523_read(client, REG_CONTROL3, &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	return !!(value & REG_CONTROL3_BLF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) static int pcf8523_load_capacitance(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	u32 load;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	err = pcf8523_read(client, REG_CONTROL1, &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	load = 12500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	of_property_read_u32(client->dev.of_node, "quartz-load-femtofarads",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 			     &load);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	switch (load) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		dev_warn(&client->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 12500",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 			 load);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	case 12500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		value |= REG_CONTROL1_CAP_SEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	case 7000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		value &= ~REG_CONTROL1_CAP_SEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	err = pcf8523_write(client, REG_CONTROL1, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static int pcf8523_set_pm(struct i2c_client *client, u8 pm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	err = pcf8523_read(client, REG_CONTROL3, &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	value = (value & ~REG_CONTROL3_PM_MASK) | pm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	err = pcf8523_write(client, REG_CONTROL3, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static int pcf8523_stop_rtc(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	err = pcf8523_read(client, REG_CONTROL1, &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	value |= REG_CONTROL1_STOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	err = pcf8523_write(client, REG_CONTROL1, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static int pcf8523_start_rtc(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	err = pcf8523_read(client, REG_CONTROL1, &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	value &= ~REG_CONTROL1_STOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	err = pcf8523_write(client, REG_CONTROL1, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static int pcf8523_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	u8 start = REG_SECONDS, regs[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	struct i2c_msg msgs[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	err = pcf8523_voltage_low(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	} else if (err > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		dev_err(dev, "low voltage detected, time is unreliable\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	msgs[0].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	msgs[0].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	msgs[0].len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	msgs[0].buf = &start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	msgs[1].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	msgs[1].flags = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	msgs[1].len = sizeof(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	msgs[1].buf = regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	err = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	if (regs[0] & REG_SECONDS_OS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	tm->tm_sec = bcd2bin(regs[0] & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	tm->tm_min = bcd2bin(regs[1] & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	tm->tm_hour = bcd2bin(regs[2] & 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	tm->tm_mday = bcd2bin(regs[3] & 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	tm->tm_wday = regs[4] & 0x7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	tm->tm_mon = bcd2bin(regs[5] & 0x1f) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	tm->tm_year = bcd2bin(regs[6]) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static int pcf8523_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	struct i2c_msg msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	u8 regs[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	 * The hardware can only store values between 0 and 99 in it's YEAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	 * register (with 99 overflowing to 0 on increment).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	 * After 2100-02-28 we could start interpreting the year to be in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	 * interval [2100, 2199], but there is no path to switch in a smooth way
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	 * because the chip handles YEAR=0x00 (and the out-of-spec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	 * YEAR=0xa0) as a leap year, but 2100 isn't.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	if (tm->tm_year < 100 || tm->tm_year >= 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	err = pcf8523_stop_rtc(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	regs[0] = REG_SECONDS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	/* This will purposely overwrite REG_SECONDS_OS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	regs[1] = bin2bcd(tm->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	regs[2] = bin2bcd(tm->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	regs[3] = bin2bcd(tm->tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	regs[4] = bin2bcd(tm->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	regs[5] = tm->tm_wday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	regs[6] = bin2bcd(tm->tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	regs[7] = bin2bcd(tm->tm_year - 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	msg.addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	msg.flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	msg.len = sizeof(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	msg.buf = regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	err = i2c_transfer(client->adapter, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		 * If the time cannot be set, restart the RTC anyway. Note
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		 * that errors are ignored if the RTC cannot be started so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		 * that we have a chance to propagate the original error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		pcf8523_start_rtc(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	return pcf8523_start_rtc(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #ifdef CONFIG_RTC_INTF_DEV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static int pcf8523_rtc_ioctl(struct device *dev, unsigned int cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 			     unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	case RTC_VL_READ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		ret = pcf8523_voltage_low(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 			ret = RTC_VL_BACKUP_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		return put_user(ret, (unsigned int __user *)arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		return -ENOIOCTLCMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #define pcf8523_rtc_ioctl NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static int pcf8523_rtc_read_offset(struct device *dev, long *offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	s8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	err = pcf8523_read(client, REG_OFFSET, &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	/* sign extend the 7-bit offset value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	val = value << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	*offset = (value & REG_OFFSET_MODE ? 4069 : 4340) * (val >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) static int pcf8523_rtc_set_offset(struct device *dev, long offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	long reg_m0, reg_m1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	reg_m0 = clamp(DIV_ROUND_CLOSEST(offset, 4340), -64L, 63L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	reg_m1 = clamp(DIV_ROUND_CLOSEST(offset, 4069), -64L, 63L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	if (abs(reg_m0 * 4340 - offset) < abs(reg_m1 * 4069 - offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		value = reg_m0 & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		value = (reg_m1 & 0x7f) | REG_OFFSET_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	return pcf8523_write(client, REG_OFFSET, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) static const struct rtc_class_ops pcf8523_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	.read_time = pcf8523_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	.set_time = pcf8523_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	.ioctl = pcf8523_rtc_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	.read_offset = pcf8523_rtc_read_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	.set_offset = pcf8523_rtc_set_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) static int pcf8523_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 			 const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	err = pcf8523_load_capacitance(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 		dev_warn(&client->dev, "failed to set xtal load capacitance: %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 			 err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	err = pcf8523_set_pm(client, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	rtc = devm_rtc_device_register(&client->dev, DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 				       &pcf8523_rtc_ops, THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	if (IS_ERR(rtc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 		return PTR_ERR(rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) static const struct i2c_device_id pcf8523_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	{ "pcf8523", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) MODULE_DEVICE_TABLE(i2c, pcf8523_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) static const struct of_device_id pcf8523_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	{ .compatible = "nxp,pcf8523" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	{ .compatible = "microcrystal,rv8523" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) MODULE_DEVICE_TABLE(of, pcf8523_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static struct i2c_driver pcf8523_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		.name = DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		.of_match_table = of_match_ptr(pcf8523_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	.probe = pcf8523_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	.id_table = pcf8523_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) module_i2c_driver(pcf8523_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) MODULE_DESCRIPTION("NXP PCF8523 RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) MODULE_LICENSE("GPL v2");