^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * rtc-palmas.c -- Palmas Real Time Clock driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * RTC driver for TI Palma series devices like TPS65913,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * TPS65914 power management IC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) 2012, NVIDIA Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Author: Laxman Dewangan <ldewangan@nvidia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * modify it under the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * published by the Free Software Foundation version 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * whether express or implied; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * You should have received a copy of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * along with this program; if not, write to the Free Software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * 02111-1307, USA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/mfd/palmas.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct palmas_rtc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) unsigned int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* Total number of RTC registers needed to set time*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define PALMAS_NUM_TIME_REGS (PALMAS_YEARS_REG - PALMAS_SECONDS_REG + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static int palmas_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) unsigned char rtc_data[PALMAS_NUM_TIME_REGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct palmas *palmas = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* Copy RTC counting registers to static registers or latches */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) ret = palmas_update_bits(palmas, PALMAS_RTC_BASE, PALMAS_RTC_CTRL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) PALMAS_RTC_CTRL_REG_GET_TIME, PALMAS_RTC_CTRL_REG_GET_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) dev_err(dev, "RTC CTRL reg update failed, err: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) ret = palmas_bulk_read(palmas, PALMAS_RTC_BASE, PALMAS_SECONDS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) rtc_data, PALMAS_NUM_TIME_REGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) dev_err(dev, "RTC_SECONDS reg read failed, err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) tm->tm_sec = bcd2bin(rtc_data[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) tm->tm_min = bcd2bin(rtc_data[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) tm->tm_hour = bcd2bin(rtc_data[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) tm->tm_mday = bcd2bin(rtc_data[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) tm->tm_year = bcd2bin(rtc_data[5]) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static int palmas_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned char rtc_data[PALMAS_NUM_TIME_REGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct palmas *palmas = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) rtc_data[0] = bin2bcd(tm->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) rtc_data[1] = bin2bcd(tm->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) rtc_data[2] = bin2bcd(tm->tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) rtc_data[3] = bin2bcd(tm->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) rtc_data[4] = bin2bcd(tm->tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) rtc_data[5] = bin2bcd(tm->tm_year - 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /* Stop RTC while updating the RTC time registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ret = palmas_update_bits(palmas, PALMAS_RTC_BASE, PALMAS_RTC_CTRL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) PALMAS_RTC_CTRL_REG_STOP_RTC, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) dev_err(dev, "RTC stop failed, err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) ret = palmas_bulk_write(palmas, PALMAS_RTC_BASE, PALMAS_SECONDS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) rtc_data, PALMAS_NUM_TIME_REGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) dev_err(dev, "RTC_SECONDS reg write failed, err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* Start back RTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) ret = palmas_update_bits(palmas, PALMAS_RTC_BASE, PALMAS_RTC_CTRL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PALMAS_RTC_CTRL_REG_STOP_RTC, PALMAS_RTC_CTRL_REG_STOP_RTC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) dev_err(dev, "RTC start failed, err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static int palmas_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct palmas *palmas = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) val = enabled ? PALMAS_RTC_INTERRUPTS_REG_IT_ALARM : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return palmas_write(palmas, PALMAS_RTC_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) PALMAS_RTC_INTERRUPTS_REG, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static int palmas_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) unsigned char alarm_data[PALMAS_NUM_TIME_REGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) u32 int_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) struct palmas *palmas = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) ret = palmas_bulk_read(palmas, PALMAS_RTC_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) PALMAS_ALARM_SECONDS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) alarm_data, PALMAS_NUM_TIME_REGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) dev_err(dev, "RTC_ALARM_SECONDS read failed, err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) alm->time.tm_sec = bcd2bin(alarm_data[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) alm->time.tm_min = bcd2bin(alarm_data[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) alm->time.tm_hour = bcd2bin(alarm_data[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) alm->time.tm_mday = bcd2bin(alarm_data[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) alm->time.tm_mon = bcd2bin(alarm_data[4]) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) alm->time.tm_year = bcd2bin(alarm_data[5]) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) ret = palmas_read(palmas, PALMAS_RTC_BASE, PALMAS_RTC_INTERRUPTS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) &int_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) dev_err(dev, "RTC_INTERRUPTS reg read failed, err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (int_val & PALMAS_RTC_INTERRUPTS_REG_IT_ALARM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) alm->enabled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static int palmas_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) unsigned char alarm_data[PALMAS_NUM_TIME_REGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) struct palmas *palmas = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) ret = palmas_rtc_alarm_irq_enable(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) dev_err(dev, "Disable RTC alarm failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) alarm_data[0] = bin2bcd(alm->time.tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) alarm_data[1] = bin2bcd(alm->time.tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) alarm_data[2] = bin2bcd(alm->time.tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) alarm_data[3] = bin2bcd(alm->time.tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) alarm_data[4] = bin2bcd(alm->time.tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) alarm_data[5] = bin2bcd(alm->time.tm_year - 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ret = palmas_bulk_write(palmas, PALMAS_RTC_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) PALMAS_ALARM_SECONDS_REG, alarm_data, PALMAS_NUM_TIME_REGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) dev_err(dev, "ALARM_SECONDS_REG write failed, err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (alm->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) ret = palmas_rtc_alarm_irq_enable(dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static int palmas_clear_interrupts(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct palmas *palmas = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) unsigned int rtc_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) ret = palmas_read(palmas, PALMAS_RTC_BASE, PALMAS_RTC_STATUS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) &rtc_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) dev_err(dev, "RTC_STATUS read failed, err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) ret = palmas_write(palmas, PALMAS_RTC_BASE, PALMAS_RTC_STATUS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) rtc_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) dev_err(dev, "RTC_STATUS write failed, err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static irqreturn_t palmas_rtc_interrupt(int irq, void *context)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) struct palmas_rtc *palmas_rtc = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) struct device *dev = palmas_rtc->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) ret = palmas_clear_interrupts(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) dev_err(dev, "RTC interrupt clear failed, err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) rtc_update_irq(palmas_rtc->rtc, 1, RTC_IRQF | RTC_AF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static const struct rtc_class_ops palmas_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .read_time = palmas_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .set_time = palmas_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .read_alarm = palmas_rtc_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .set_alarm = palmas_rtc_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .alarm_irq_enable = palmas_rtc_alarm_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static int palmas_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct palmas_rtc *palmas_rtc = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) bool enable_bb_charging = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) bool high_bb_charging = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (pdev->dev.of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) enable_bb_charging = of_property_read_bool(pdev->dev.of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) "ti,backup-battery-chargeable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) high_bb_charging = of_property_read_bool(pdev->dev.of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) "ti,backup-battery-charge-high-current");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) palmas_rtc = devm_kzalloc(&pdev->dev, sizeof(struct palmas_rtc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (!palmas_rtc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /* Clear pending interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ret = palmas_clear_interrupts(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) dev_err(&pdev->dev, "clear RTC int failed, err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) palmas_rtc->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) platform_set_drvdata(pdev, palmas_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) if (enable_bb_charging) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) unsigned reg = PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (high_bb_charging)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) ret = palmas_update_bits(palmas, PALMAS_PMU_CONTROL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) PALMAS_BACKUP_BATTERY_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) "BACKUP_BATTERY_CTRL update failed, %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ret = palmas_update_bits(palmas, PALMAS_PMU_CONTROL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) PALMAS_BACKUP_BATTERY_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) "BACKUP_BATTERY_CTRL update failed, %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /* Start RTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) ret = palmas_update_bits(palmas, PALMAS_RTC_BASE, PALMAS_RTC_CTRL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) PALMAS_RTC_CTRL_REG_STOP_RTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) PALMAS_RTC_CTRL_REG_STOP_RTC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) dev_err(&pdev->dev, "RTC_CTRL write failed, err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) palmas_rtc->irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) device_init_wakeup(&pdev->dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) palmas_rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) &palmas_rtc_ops, THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) if (IS_ERR(palmas_rtc->rtc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) ret = PTR_ERR(palmas_rtc->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) dev_err(&pdev->dev, "RTC register failed, err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) ret = devm_request_threaded_irq(&pdev->dev, palmas_rtc->irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) palmas_rtc_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) IRQF_TRIGGER_LOW | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) dev_name(&pdev->dev), palmas_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) dev_err(&pdev->dev, "IRQ request failed, err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static int palmas_rtc_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) palmas_rtc_alarm_irq_enable(&pdev->dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static int palmas_rtc_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) struct palmas_rtc *palmas_rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) enable_irq_wake(palmas_rtc->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static int palmas_rtc_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) struct palmas_rtc *palmas_rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) disable_irq_wake(palmas_rtc->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static SIMPLE_DEV_PM_OPS(palmas_rtc_pm_ops, palmas_rtc_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) palmas_rtc_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static const struct of_device_id of_palmas_rtc_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) { .compatible = "ti,palmas-rtc"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) MODULE_DEVICE_TABLE(of, of_palmas_rtc_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) static struct platform_driver palmas_rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .probe = palmas_rtc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .remove = palmas_rtc_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .name = "palmas-rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) .pm = &palmas_rtc_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .of_match_table = of_match_ptr(of_palmas_rtc_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) module_platform_driver(palmas_rtc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) MODULE_ALIAS("platform:palmas_rtc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) MODULE_DESCRIPTION("TI PALMAS series RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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