^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for the RTC in Marvell SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/gfp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define RTC_TIME_REG_OFFS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define RTC_SECONDS_OFFS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define RTC_MINUTES_OFFS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define RTC_HOURS_OFFS 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define RTC_WDAY_OFFS 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define RTC_HOURS_12H_MODE BIT(22) /* 12 hour mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define RTC_DATE_REG_OFFS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define RTC_MDAY_OFFS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define RTC_MONTH_OFFS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define RTC_YEAR_OFFS 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define RTC_ALARM_TIME_REG_OFFS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define RTC_ALARM_DATE_REG_OFFS 0xc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define RTC_ALARM_VALID BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define RTC_ALARM_INTERRUPT_MASK_REG_OFFS 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define RTC_ALARM_INTERRUPT_CASUE_REG_OFFS 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct rtc_plat_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) void __iomem *ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static int mv_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct rtc_plat_data *pdata = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) void __iomem *ioaddr = pdata->ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u32 rtc_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) rtc_reg = (bin2bcd(tm->tm_sec) << RTC_SECONDS_OFFS) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) (bin2bcd(tm->tm_min) << RTC_MINUTES_OFFS) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) (bin2bcd(tm->tm_hour) << RTC_HOURS_OFFS) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) (bin2bcd(tm->tm_wday) << RTC_WDAY_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) writel(rtc_reg, ioaddr + RTC_TIME_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) rtc_reg = (bin2bcd(tm->tm_mday) << RTC_MDAY_OFFS) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) (bin2bcd(tm->tm_mon + 1) << RTC_MONTH_OFFS) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) (bin2bcd(tm->tm_year - 100) << RTC_YEAR_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) writel(rtc_reg, ioaddr + RTC_DATE_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static int mv_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct rtc_plat_data *pdata = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) void __iomem *ioaddr = pdata->ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u32 rtc_time, rtc_date;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) unsigned int year, month, day, hour, minute, second, wday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) rtc_time = readl(ioaddr + RTC_TIME_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) rtc_date = readl(ioaddr + RTC_DATE_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) second = rtc_time & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) minute = (rtc_time >> RTC_MINUTES_OFFS) & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) hour = (rtc_time >> RTC_HOURS_OFFS) & 0x3f; /* assume 24 hour mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) wday = (rtc_time >> RTC_WDAY_OFFS) & 0x7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) day = rtc_date & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) month = (rtc_date >> RTC_MONTH_OFFS) & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) year = (rtc_date >> RTC_YEAR_OFFS) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) tm->tm_sec = bcd2bin(second);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) tm->tm_min = bcd2bin(minute);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) tm->tm_hour = bcd2bin(hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) tm->tm_mday = bcd2bin(day);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) tm->tm_wday = bcd2bin(wday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) tm->tm_mon = bcd2bin(month) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /* hw counts from year 2000, but tm_year is relative to 1900 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) tm->tm_year = bcd2bin(year) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static int mv_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct rtc_plat_data *pdata = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) void __iomem *ioaddr = pdata->ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) u32 rtc_time, rtc_date;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned int year, month, day, hour, minute, second, wday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) rtc_time = readl(ioaddr + RTC_ALARM_TIME_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) rtc_date = readl(ioaddr + RTC_ALARM_DATE_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) second = rtc_time & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) minute = (rtc_time >> RTC_MINUTES_OFFS) & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) hour = (rtc_time >> RTC_HOURS_OFFS) & 0x3f; /* assume 24 hour mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) wday = (rtc_time >> RTC_WDAY_OFFS) & 0x7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) day = rtc_date & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) month = (rtc_date >> RTC_MONTH_OFFS) & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) year = (rtc_date >> RTC_YEAR_OFFS) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) alm->time.tm_sec = bcd2bin(second);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) alm->time.tm_min = bcd2bin(minute);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) alm->time.tm_hour = bcd2bin(hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) alm->time.tm_mday = bcd2bin(day);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) alm->time.tm_wday = bcd2bin(wday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) alm->time.tm_mon = bcd2bin(month) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* hw counts from year 2000, but tm_year is relative to 1900 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) alm->time.tm_year = bcd2bin(year) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) alm->enabled = !!readl(ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return rtc_valid_tm(&alm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static int mv_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct rtc_plat_data *pdata = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) void __iomem *ioaddr = pdata->ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) u32 rtc_reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (alm->time.tm_sec >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) rtc_reg |= (RTC_ALARM_VALID | bin2bcd(alm->time.tm_sec))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) << RTC_SECONDS_OFFS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (alm->time.tm_min >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) rtc_reg |= (RTC_ALARM_VALID | bin2bcd(alm->time.tm_min))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) << RTC_MINUTES_OFFS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (alm->time.tm_hour >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) rtc_reg |= (RTC_ALARM_VALID | bin2bcd(alm->time.tm_hour))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) << RTC_HOURS_OFFS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) writel(rtc_reg, ioaddr + RTC_ALARM_TIME_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (alm->time.tm_mday >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) rtc_reg = (RTC_ALARM_VALID | bin2bcd(alm->time.tm_mday))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) << RTC_MDAY_OFFS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) rtc_reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (alm->time.tm_mon >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) rtc_reg |= (RTC_ALARM_VALID | bin2bcd(alm->time.tm_mon + 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) << RTC_MONTH_OFFS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (alm->time.tm_year >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) rtc_reg |= (RTC_ALARM_VALID | bin2bcd(alm->time.tm_year - 100))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) << RTC_YEAR_OFFS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) writel(rtc_reg, ioaddr + RTC_ALARM_DATE_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) writel(0, ioaddr + RTC_ALARM_INTERRUPT_CASUE_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) writel(alm->enabled ? 1 : 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static int mv_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct rtc_plat_data *pdata = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) void __iomem *ioaddr = pdata->ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (pdata->irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return -EINVAL; /* fall back into rtc-dev's emulation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) if (enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) writel(1, ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) writel(0, ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static irqreturn_t mv_rtc_interrupt(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) struct rtc_plat_data *pdata = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) void __iomem *ioaddr = pdata->ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* alarm irq? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (!readl(ioaddr + RTC_ALARM_INTERRUPT_CASUE_REG_OFFS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /* clear interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) writel(0, ioaddr + RTC_ALARM_INTERRUPT_CASUE_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) rtc_update_irq(pdata->rtc, 1, RTC_IRQF | RTC_AF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static const struct rtc_class_ops mv_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .read_time = mv_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .set_time = mv_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static const struct rtc_class_ops mv_rtc_alarm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .read_time = mv_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .set_time = mv_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .read_alarm = mv_rtc_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .set_alarm = mv_rtc_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .alarm_irq_enable = mv_rtc_alarm_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static int __init mv_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) struct rtc_plat_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) u32 rtc_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) if (!pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) pdata->ioaddr = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (IS_ERR(pdata->ioaddr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) return PTR_ERR(pdata->ioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) pdata->clk = devm_clk_get(&pdev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /* Not all SoCs require a clock.*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (!IS_ERR(pdata->clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) clk_prepare_enable(pdata->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /* make sure the 24 hour mode is enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) rtc_time = readl(pdata->ioaddr + RTC_TIME_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (rtc_time & RTC_HOURS_12H_MODE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) dev_err(&pdev->dev, "12 Hour mode is enabled but not supported.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) /* make sure it is actually functional */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (rtc_time == 0x01000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) ssleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) rtc_time = readl(pdata->ioaddr + RTC_TIME_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (rtc_time == 0x01000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) dev_err(&pdev->dev, "internal RTC not ticking\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) pdata->irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) platform_set_drvdata(pdev, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) pdata->rtc = devm_rtc_allocate_device(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (IS_ERR(pdata->rtc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ret = PTR_ERR(pdata->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) if (pdata->irq >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) writel(0, pdata->ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (devm_request_irq(&pdev->dev, pdata->irq, mv_rtc_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) IRQF_SHARED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) pdev->name, pdata) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) dev_warn(&pdev->dev, "interrupt not available.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) pdata->irq = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) if (pdata->irq >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) device_init_wakeup(&pdev->dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) pdata->rtc->ops = &mv_rtc_alarm_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) pdata->rtc->ops = &mv_rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) pdata->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) pdata->rtc->range_max = RTC_TIMESTAMP_END_2099;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ret = rtc_register_device(pdata->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (!IS_ERR(pdata->clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) clk_disable_unprepare(pdata->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static int __exit mv_rtc_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (pdata->irq >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) device_init_wakeup(&pdev->dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) if (!IS_ERR(pdata->clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) clk_disable_unprepare(pdata->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static const struct of_device_id rtc_mv_of_match_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) { .compatible = "marvell,orion-rtc", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) MODULE_DEVICE_TABLE(of, rtc_mv_of_match_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static struct platform_driver mv_rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .remove = __exit_p(mv_rtc_remove),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .name = "rtc-mv",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .of_match_table = of_match_ptr(rtc_mv_of_match_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) module_platform_driver_probe(mv_rtc_driver, mv_rtc_probe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) MODULE_AUTHOR("Saeed Bishara <saeed@marvell.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) MODULE_DESCRIPTION("Marvell RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) MODULE_ALIAS("platform:rtc-mv");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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