^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Oki MSM6242 RTC Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2009 Geert Uytterhoeven
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Based on the A2000 TOD code in arch/m68k/amiga/config.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 1993 Hamish Macdonald
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) MSM6242_SECOND1 = 0x0, /* 1-second digit register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) MSM6242_SECOND10 = 0x1, /* 10-second digit register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) MSM6242_MINUTE1 = 0x2, /* 1-minute digit register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) MSM6242_MINUTE10 = 0x3, /* 10-minute digit register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MSM6242_HOUR1 = 0x4, /* 1-hour digit register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) MSM6242_HOUR10 = 0x5, /* PM/AM, 10-hour digit register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MSM6242_DAY1 = 0x6, /* 1-day digit register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) MSM6242_DAY10 = 0x7, /* 10-day digit register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MSM6242_MONTH1 = 0x8, /* 1-month digit register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) MSM6242_MONTH10 = 0x9, /* 10-month digit register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) MSM6242_YEAR1 = 0xa, /* 1-year digit register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) MSM6242_YEAR10 = 0xb, /* 10-year digit register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) MSM6242_WEEK = 0xc, /* Week register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) MSM6242_CD = 0xd, /* Control Register D */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MSM6242_CE = 0xe, /* Control Register E */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MSM6242_CF = 0xf, /* Control Register F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define MSM6242_HOUR10_AM (0 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define MSM6242_HOUR10_PM (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define MSM6242_HOUR10_HR_MASK (3 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define MSM6242_WEEK_SUNDAY 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define MSM6242_WEEK_MONDAY 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define MSM6242_WEEK_TUESDAY 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define MSM6242_WEEK_WEDNESDAY 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define MSM6242_WEEK_THURSDAY 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define MSM6242_WEEK_FRIDAY 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define MSM6242_WEEK_SATURDAY 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define MSM6242_CD_30_S_ADJ (1 << 3) /* 30-second adjustment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define MSM6242_CD_IRQ_FLAG (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define MSM6242_CD_BUSY (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define MSM6242_CD_HOLD (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define MSM6242_CE_T_MASK (3 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define MSM6242_CE_T_64HZ (0 << 2) /* period 1/64 second */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define MSM6242_CE_T_1HZ (1 << 2) /* period 1 second */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define MSM6242_CE_T_1MINUTE (2 << 2) /* period 1 minute */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define MSM6242_CE_T_1HOUR (3 << 2) /* period 1 hour */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define MSM6242_CE_ITRPT_STND (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define MSM6242_CE_MASK (1 << 0) /* STD.P output control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define MSM6242_CF_TEST (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define MSM6242_CF_12H (0 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define MSM6242_CF_24H (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define MSM6242_CF_STOP (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define MSM6242_CF_REST (1 << 0) /* reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct msm6242_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) u32 __iomem *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static inline unsigned int msm6242_read(struct msm6242_priv *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return __raw_readl(&priv->regs[reg]) & 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static inline void msm6242_write(struct msm6242_priv *priv, unsigned int val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) __raw_writel(val, &priv->regs[reg]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static void msm6242_lock(struct msm6242_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) int cnt = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) msm6242_write(priv, MSM6242_CD_HOLD|MSM6242_CD_IRQ_FLAG, MSM6242_CD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) while ((msm6242_read(priv, MSM6242_CD) & MSM6242_CD_BUSY) && cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) msm6242_write(priv, MSM6242_CD_IRQ_FLAG, MSM6242_CD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) udelay(70);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) msm6242_write(priv, MSM6242_CD_HOLD|MSM6242_CD_IRQ_FLAG, MSM6242_CD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) cnt--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (!cnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) pr_warn("timed out waiting for RTC (0x%x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) msm6242_read(priv, MSM6242_CD));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static void msm6242_unlock(struct msm6242_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) msm6242_write(priv, MSM6242_CD_IRQ_FLAG, MSM6242_CD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static int msm6242_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct msm6242_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) msm6242_lock(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) tm->tm_sec = msm6242_read(priv, MSM6242_SECOND10) * 10 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) msm6242_read(priv, MSM6242_SECOND1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) tm->tm_min = msm6242_read(priv, MSM6242_MINUTE10) * 10 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) msm6242_read(priv, MSM6242_MINUTE1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) tm->tm_hour = (msm6242_read(priv, MSM6242_HOUR10) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) MSM6242_HOUR10_HR_MASK) * 10 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) msm6242_read(priv, MSM6242_HOUR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) tm->tm_mday = msm6242_read(priv, MSM6242_DAY10) * 10 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) msm6242_read(priv, MSM6242_DAY1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) tm->tm_wday = msm6242_read(priv, MSM6242_WEEK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) tm->tm_mon = msm6242_read(priv, MSM6242_MONTH10) * 10 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) msm6242_read(priv, MSM6242_MONTH1) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) tm->tm_year = msm6242_read(priv, MSM6242_YEAR10) * 10 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) msm6242_read(priv, MSM6242_YEAR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (tm->tm_year <= 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) tm->tm_year += 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (!(msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) unsigned int pm = msm6242_read(priv, MSM6242_HOUR10) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MSM6242_HOUR10_PM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (!pm && tm->tm_hour == 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) tm->tm_hour = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) else if (pm && tm->tm_hour != 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) tm->tm_hour += 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) msm6242_unlock(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static int msm6242_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct msm6242_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) msm6242_lock(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) msm6242_write(priv, tm->tm_sec / 10, MSM6242_SECOND10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) msm6242_write(priv, tm->tm_sec % 10, MSM6242_SECOND1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) msm6242_write(priv, tm->tm_min / 10, MSM6242_MINUTE10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) msm6242_write(priv, tm->tm_min % 10, MSM6242_MINUTE1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) else if (tm->tm_hour >= 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) msm6242_write(priv, MSM6242_HOUR10_PM + (tm->tm_hour - 12) / 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) MSM6242_HOUR10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) msm6242_write(priv, tm->tm_hour % 10, MSM6242_HOUR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) msm6242_write(priv, tm->tm_mday / 10, MSM6242_DAY10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) msm6242_write(priv, tm->tm_mday % 10, MSM6242_DAY1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (tm->tm_wday != -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) msm6242_write(priv, tm->tm_wday, MSM6242_WEEK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) msm6242_write(priv, (tm->tm_mon + 1) / 10, MSM6242_MONTH10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) msm6242_write(priv, (tm->tm_mon + 1) % 10, MSM6242_MONTH1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (tm->tm_year >= 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) tm->tm_year -= 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) msm6242_write(priv, tm->tm_year / 10, MSM6242_YEAR10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) msm6242_write(priv, tm->tm_year % 10, MSM6242_YEAR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) msm6242_unlock(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static const struct rtc_class_ops msm6242_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .read_time = msm6242_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .set_time = msm6242_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static int __init msm6242_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct msm6242_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (!res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) priv->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (!priv->regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) platform_set_drvdata(pdev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) rtc = devm_rtc_device_register(&pdev->dev, "rtc-msm6242",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) &msm6242_rtc_ops, THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (IS_ERR(rtc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) return PTR_ERR(rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) priv->rtc = rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static struct platform_driver msm6242_rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .name = "rtc-msm6242",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) module_platform_driver_probe(msm6242_rtc_driver, msm6242_rtc_probe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) MODULE_DESCRIPTION("Oki MSM6242 RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) MODULE_ALIAS("platform:rtc-msm6242");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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