Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/mc146818rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #ifdef CONFIG_ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * Returns true if a clock update is in progress
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) static inline unsigned char mc146818_is_updating(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 	unsigned char uip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	spin_lock_irqsave(&rtc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	uip = (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	spin_unlock_irqrestore(&rtc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	return uip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) unsigned int mc146818_get_time(struct rtc_time *time)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	unsigned char ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	unsigned char century = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #ifdef CONFIG_MACH_DECSTATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	unsigned int real_year;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	 * read RTC once any update in progress is done. The update
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	 * can take just over 2ms. We wait 20ms. There is no need to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	 * to poll-wait (up to 1s - eeccch) for the falling edge of RTC_UIP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	 * If you need to know *exactly* when a second has started, enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	 * periodic update complete interrupts, (via ioctl) and then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	 * immediately read /dev/rtc which will block until you get the IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	 * Once the read clears, read the RTC time (again via ioctl). Easy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	if (mc146818_is_updating())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		mdelay(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	 * Only the values that we read from the RTC are set. We leave
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	 * tm_wday, tm_yday and tm_isdst untouched. Even though the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	 * RTC has RTC_DAY_OF_WEEK, we ignore it, as it is only updated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	 * by the RTC when initially set to a non-zero value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	spin_lock_irqsave(&rtc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	time->tm_sec = CMOS_READ(RTC_SECONDS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	time->tm_min = CMOS_READ(RTC_MINUTES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	time->tm_hour = CMOS_READ(RTC_HOURS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	time->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	time->tm_mon = CMOS_READ(RTC_MONTH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	time->tm_year = CMOS_READ(RTC_YEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #ifdef CONFIG_MACH_DECSTATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	real_year = CMOS_READ(RTC_DEC_YEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #ifdef CONFIG_ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	    acpi_gbl_FADT.century)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		century = CMOS_READ(acpi_gbl_FADT.century);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	ctrl = CMOS_READ(RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	spin_unlock_irqrestore(&rtc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		time->tm_sec = bcd2bin(time->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		time->tm_min = bcd2bin(time->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		time->tm_hour = bcd2bin(time->tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		time->tm_mday = bcd2bin(time->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		time->tm_mon = bcd2bin(time->tm_mon);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		time->tm_year = bcd2bin(time->tm_year);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		century = bcd2bin(century);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) #ifdef CONFIG_MACH_DECSTATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	time->tm_year += real_year - 72;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	if (century > 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		time->tm_year += (century - 19) * 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	 * Account for differences between how the RTC uses the values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	 * and how they are defined in a struct rtc_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	if (time->tm_year <= 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		time->tm_year += 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	time->tm_mon--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	return RTC_24H;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) EXPORT_SYMBOL_GPL(mc146818_get_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* Set the current date and time in the real time clock. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) int mc146818_set_time(struct rtc_time *time)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	unsigned char mon, day, hrs, min, sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	unsigned char save_control, save_freq_select;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	unsigned int yrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #ifdef CONFIG_MACH_DECSTATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	unsigned int real_yrs, leap_yr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	unsigned char century = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	yrs = time->tm_year;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	mon = time->tm_mon + 1;   /* tm_mon starts at zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	day = time->tm_mday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	hrs = time->tm_hour;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	min = time->tm_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	sec = time->tm_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	if (yrs > 255)	/* They are unsigned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	spin_lock_irqsave(&rtc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #ifdef CONFIG_MACH_DECSTATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	real_yrs = yrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	leap_yr = ((!((yrs + 1900) % 4) && ((yrs + 1900) % 100)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			!((yrs + 1900) % 400));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	yrs = 72;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	 * We want to keep the year set to 73 until March
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	 * for non-leap years, so that Feb, 29th is handled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	 * correctly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	if (!leap_yr && mon < 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		real_yrs--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		yrs = 73;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #ifdef CONFIG_ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	    acpi_gbl_FADT.century) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		century = (yrs + 1900) / 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		yrs %= 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	/* These limits and adjustments are independent of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	 * whether the chip is in binary mode or not.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	if (yrs > 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		spin_unlock_irqrestore(&rtc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	if (yrs >= 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		yrs -= 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	    || RTC_ALWAYS_BCD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		sec = bin2bcd(sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		min = bin2bcd(min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		hrs = bin2bcd(hrs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		day = bin2bcd(day);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		mon = bin2bcd(mon);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		yrs = bin2bcd(yrs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		century = bin2bcd(century);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	save_control = CMOS_READ(RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #ifdef CONFIG_MACH_DECSTATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	CMOS_WRITE(real_yrs, RTC_DEC_YEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	CMOS_WRITE(yrs, RTC_YEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	CMOS_WRITE(mon, RTC_MONTH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	CMOS_WRITE(day, RTC_DAY_OF_MONTH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	CMOS_WRITE(hrs, RTC_HOURS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	CMOS_WRITE(min, RTC_MINUTES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	CMOS_WRITE(sec, RTC_SECONDS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #ifdef CONFIG_ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	    acpi_gbl_FADT.century)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		CMOS_WRITE(century, acpi_gbl_FADT.century);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	CMOS_WRITE(save_control, RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	spin_unlock_irqrestore(&rtc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) EXPORT_SYMBOL_GPL(mc146818_set_time);