Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // RTC driver for Maxim MAX8997
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) // Copyright (C) 2013 Samsung Electronics Co.Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) //  based on rtc-max8998.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/mfd/max8997-private.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) /* Module parameter for WTSR function control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) static int wtsr_en = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) module_param(wtsr_en, int, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) MODULE_PARM_DESC(wtsr_en, "Watchdog Timeout & Software Reset (default=on)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) /* Module parameter for SMPL function control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) static int smpl_en = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) module_param(smpl_en, int, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) MODULE_PARM_DESC(smpl_en, "Sudden Momentary Power Loss (default=on)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) /* RTC Control Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define BCD_EN_SHIFT			0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define BCD_EN_MASK			(1 << BCD_EN_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define MODEL24_SHIFT			1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define MODEL24_MASK			(1 << MODEL24_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) /* RTC Update Register1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define RTC_UDR_SHIFT			0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define RTC_UDR_MASK			(1 << RTC_UDR_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) /* WTSR and SMPL Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define WTSRT_SHIFT			0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define SMPLT_SHIFT			2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define WTSR_EN_SHIFT			6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define SMPL_EN_SHIFT			7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define WTSRT_MASK			(3 << WTSRT_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define SMPLT_MASK			(3 << SMPLT_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define WTSR_EN_MASK			(1 << WTSR_EN_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define SMPL_EN_MASK			(1 << SMPL_EN_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) /* RTC Hour register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define HOUR_PM_SHIFT			6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define HOUR_PM_MASK			(1 << HOUR_PM_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) /* RTC Alarm Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define ALARM_ENABLE_SHIFT		7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define ALARM_ENABLE_MASK		(1 << ALARM_ENABLE_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	RTC_SEC = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	RTC_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	RTC_HOUR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	RTC_WEEKDAY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	RTC_MONTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	RTC_YEAR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	RTC_DATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	RTC_NR_TIME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) struct max8997_rtc_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	struct device		*dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	struct max8997_dev	*max8997;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	struct i2c_client	*rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	struct rtc_device	*rtc_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct mutex		lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	int virq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	int rtc_24hr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) static void max8997_rtc_data_to_tm(u8 *data, struct rtc_time *tm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 				   int rtc_24hr_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	tm->tm_sec = data[RTC_SEC] & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	tm->tm_min = data[RTC_MIN] & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	if (rtc_24hr_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		tm->tm_hour = data[RTC_HOUR] & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		tm->tm_hour = data[RTC_HOUR] & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		if (data[RTC_HOUR] & HOUR_PM_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 			tm->tm_hour += 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	tm->tm_wday = fls(data[RTC_WEEKDAY] & 0x7f) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	tm->tm_mday = data[RTC_DATE] & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	tm->tm_year = (data[RTC_YEAR] & 0x7f) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	tm->tm_yday = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	tm->tm_isdst = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) static int max8997_rtc_tm_to_data(struct rtc_time *tm, u8 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	data[RTC_SEC] = tm->tm_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	data[RTC_MIN] = tm->tm_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	data[RTC_HOUR] = tm->tm_hour;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	data[RTC_WEEKDAY] = 1 << tm->tm_wday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	data[RTC_DATE] = tm->tm_mday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	data[RTC_MONTH] = tm->tm_mon + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	data[RTC_YEAR] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	if (tm->tm_year < 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		pr_warn("RTC cannot handle the year %d.  Assume it's 2000.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			1900 + tm->tm_year);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static inline int max8997_rtc_set_update_reg(struct max8997_rtc_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	ret = max8997_write_reg(info->rtc, MAX8997_RTC_UPDATE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 						RTC_UDR_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		dev_err(info->dev, "%s: fail to write update reg(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 				__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		/* Minimum 16ms delay required before RTC update.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		 * Otherwise, we may read and update based on out-of-date
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		 * value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static int max8997_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	struct max8997_rtc_info *info = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	u8 data[RTC_NR_TIME];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	mutex_lock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	ret = max8997_bulk_read(info->rtc, MAX8997_RTC_SEC, RTC_NR_TIME, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	mutex_unlock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		dev_err(info->dev, "%s: fail to read time reg(%d)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 				ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	max8997_rtc_data_to_tm(data, tm, info->rtc_24hr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static int max8997_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	struct max8997_rtc_info *info = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	u8 data[RTC_NR_TIME];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	ret = max8997_rtc_tm_to_data(tm, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	mutex_lock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	ret = max8997_bulk_write(info->rtc, MAX8997_RTC_SEC, RTC_NR_TIME, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		dev_err(info->dev, "%s: fail to write time reg(%d)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 				ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	ret = max8997_rtc_set_update_reg(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	mutex_unlock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static int max8997_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	struct max8997_rtc_info *info = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	u8 data[RTC_NR_TIME];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	mutex_lock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	ret = max8997_bulk_read(info->rtc, MAX8997_RTC_ALARM1_SEC, RTC_NR_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 			data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		dev_err(info->dev, "%s:%d fail to read alarm reg(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 				__func__, __LINE__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	max8997_rtc_data_to_tm(data, &alrm->time, info->rtc_24hr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	alrm->enabled = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	for (i = 0; i < RTC_NR_TIME; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		if (data[i] & ALARM_ENABLE_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 			alrm->enabled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	alrm->pending = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	ret = max8997_read_reg(info->max8997->i2c, MAX8997_REG_STATUS1, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		dev_err(info->dev, "%s:%d fail to read status1 reg(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 				__func__, __LINE__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	if (val & (1 << 4)) /* RTCA1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		alrm->pending = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	mutex_unlock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static int max8997_rtc_stop_alarm(struct max8997_rtc_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	u8 data[RTC_NR_TIME];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	if (!mutex_is_locked(&info->lock))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		dev_warn(info->dev, "%s: should have mutex locked\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	ret = max8997_bulk_read(info->rtc, MAX8997_RTC_ALARM1_SEC, RTC_NR_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 				data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		dev_err(info->dev, "%s: fail to read alarm reg(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 				__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	for (i = 0; i < RTC_NR_TIME; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		data[i] &= ~ALARM_ENABLE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	ret = max8997_bulk_write(info->rtc, MAX8997_RTC_ALARM1_SEC, RTC_NR_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 				 data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		dev_err(info->dev, "%s: fail to write alarm reg(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 				__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	ret = max8997_rtc_set_update_reg(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static int max8997_rtc_start_alarm(struct max8997_rtc_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	u8 data[RTC_NR_TIME];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	if (!mutex_is_locked(&info->lock))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		dev_warn(info->dev, "%s: should have mutex locked\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	ret = max8997_bulk_read(info->rtc, MAX8997_RTC_ALARM1_SEC, RTC_NR_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 				data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		dev_err(info->dev, "%s: fail to read alarm reg(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 				__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	data[RTC_SEC] |= (1 << ALARM_ENABLE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	data[RTC_MIN] |= (1 << ALARM_ENABLE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	data[RTC_HOUR] |= (1 << ALARM_ENABLE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	if (data[RTC_MONTH] & 0xf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		data[RTC_MONTH] |= (1 << ALARM_ENABLE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	if (data[RTC_YEAR] & 0x7f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		data[RTC_YEAR] |= (1 << ALARM_ENABLE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	if (data[RTC_DATE] & 0x1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		data[RTC_DATE] |= (1 << ALARM_ENABLE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	ret = max8997_bulk_write(info->rtc, MAX8997_RTC_ALARM1_SEC, RTC_NR_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 				 data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		dev_err(info->dev, "%s: fail to write alarm reg(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 				__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	ret = max8997_rtc_set_update_reg(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static int max8997_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	struct max8997_rtc_info *info = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	u8 data[RTC_NR_TIME];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	ret = max8997_rtc_tm_to_data(&alrm->time, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	dev_info(info->dev, "%s: %d-%02d-%02d %02d:%02d:%02d\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 			data[RTC_YEAR] + 2000, data[RTC_MONTH], data[RTC_DATE],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 			data[RTC_HOUR], data[RTC_MIN], data[RTC_SEC]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	mutex_lock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	ret = max8997_rtc_stop_alarm(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	ret = max8997_bulk_write(info->rtc, MAX8997_RTC_ALARM1_SEC, RTC_NR_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 				data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		dev_err(info->dev, "%s: fail to write alarm reg(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 				__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	ret = max8997_rtc_set_update_reg(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	if (alrm->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		ret = max8997_rtc_start_alarm(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	mutex_unlock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static int max8997_rtc_alarm_irq_enable(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 					unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	struct max8997_rtc_info *info = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	mutex_lock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	if (enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 		ret = max8997_rtc_start_alarm(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 		ret = max8997_rtc_stop_alarm(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	mutex_unlock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) static irqreturn_t max8997_rtc_alarm_irq(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	struct max8997_rtc_info *info = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	dev_info(info->dev, "%s:irq(%d)\n", __func__, irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static const struct rtc_class_ops max8997_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	.read_time = max8997_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	.set_time = max8997_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	.read_alarm = max8997_rtc_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	.set_alarm = max8997_rtc_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	.alarm_irq_enable = max8997_rtc_alarm_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) static void max8997_rtc_enable_wtsr(struct max8997_rtc_info *info, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	u8 val, mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	if (!wtsr_en)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 		val = (1 << WTSR_EN_SHIFT) | (3 << WTSRT_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 		val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	mask = WTSR_EN_MASK | WTSRT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	dev_info(info->dev, "%s: %s WTSR\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 			enable ? "enable" : "disable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	ret = max8997_update_reg(info->rtc, MAX8997_RTC_WTSR_SMPL, val, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		dev_err(info->dev, "%s: fail to update WTSR reg(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 				__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	max8997_rtc_set_update_reg(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static void max8997_rtc_enable_smpl(struct max8997_rtc_info *info, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	u8 val, mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	if (!smpl_en)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 		val = (1 << SMPL_EN_SHIFT) | (0 << SMPLT_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 		val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	mask = SMPL_EN_MASK | SMPLT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	dev_info(info->dev, "%s: %s SMPL\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 			enable ? "enable" : "disable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	ret = max8997_update_reg(info->rtc, MAX8997_RTC_WTSR_SMPL, val, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 		dev_err(info->dev, "%s: fail to update SMPL reg(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 				__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	max8997_rtc_set_update_reg(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	max8997_read_reg(info->rtc, MAX8997_RTC_WTSR_SMPL, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	pr_info("WTSR_SMPL(0x%02x)\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) static int max8997_rtc_init_reg(struct max8997_rtc_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	u8 data[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	/* Set RTC control register : Binary mode, 24hour mdoe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	info->rtc_24hr_mode = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	ret = max8997_bulk_write(info->rtc, MAX8997_RTC_CTRLMASK, 2, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 		dev_err(info->dev, "%s: fail to write controlm reg(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 				__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	ret = max8997_rtc_set_update_reg(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) static int max8997_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	struct max8997_dev *max8997 = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 	struct max8997_rtc_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	int ret, virq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	info = devm_kzalloc(&pdev->dev, sizeof(struct max8997_rtc_info),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 			GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	if (!info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	mutex_init(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	info->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	info->max8997 = max8997;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	info->rtc = max8997->rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	platform_set_drvdata(pdev, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	ret = max8997_rtc_init_reg(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 		dev_err(&pdev->dev, "Failed to initialize RTC reg:%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	max8997_rtc_enable_wtsr(info, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 	max8997_rtc_enable_smpl(info, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 	device_init_wakeup(&pdev->dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	info->rtc_dev = devm_rtc_device_register(&pdev->dev, "max8997-rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 					&max8997_rtc_ops, THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	if (IS_ERR(info->rtc_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 		ret = PTR_ERR(info->rtc_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 		dev_err(&pdev->dev, "Failed to register RTC device: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	virq = irq_create_mapping(max8997->irq_domain, MAX8997_PMICIRQ_RTCA1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	if (!virq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 		dev_err(&pdev->dev, "Failed to create mapping alarm IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 		ret = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 		goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	info->virq = virq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 	ret = devm_request_threaded_irq(&pdev->dev, virq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 				max8997_rtc_alarm_irq, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 				"rtc-alarm0", info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 		dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 			info->virq, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) static void max8997_rtc_shutdown(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 	struct max8997_rtc_info *info = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	max8997_rtc_enable_wtsr(info, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 	max8997_rtc_enable_smpl(info, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) static const struct platform_device_id rtc_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 	{ "max8997-rtc", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) MODULE_DEVICE_TABLE(platform, rtc_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) static struct platform_driver max8997_rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	.driver		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 		.name	= "max8997-rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 	.probe		= max8997_rtc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 	.shutdown	= max8997_rtc_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 	.id_table	= rtc_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) module_platform_driver(max8997_rtc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) MODULE_DESCRIPTION("Maxim MAX8997 RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) MODULE_AUTHOR("<ms925.kim@samsung.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) MODULE_LICENSE("GPL");