Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * RTC driver for Maxim MAX8907
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2011-2012, NVIDIA Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Based on drivers/rtc/rtc-max8925.c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Copyright (C) 2009-2010 Marvell International Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/mfd/max8907.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	RTC_SEC = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	RTC_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	RTC_HOUR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	RTC_WEEKDAY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	RTC_DATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	RTC_MONTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	RTC_YEAR1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	RTC_YEAR2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define TIME_NUM			8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define ALARM_1SEC			(1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define HOUR_12				(1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define HOUR_AM_PM			(1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define ALARM0_IRQ			(1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define ALARM1_IRQ			(1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define ALARM0_STATUS			(1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define ALARM1_STATUS			(1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) struct max8907_rtc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	struct max8907		*max8907;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	struct regmap		*regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct rtc_device	*rtc_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	int			irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static irqreturn_t max8907_irq_handler(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	struct max8907_rtc *rtc = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	regmap_write(rtc->regmap, MAX8907_REG_ALARM0_CNTL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static void regs_to_tm(u8 *regs, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	tm->tm_year = bcd2bin(regs[RTC_YEAR2]) * 100 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		bcd2bin(regs[RTC_YEAR1]) - 1900;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	tm->tm_mon = bcd2bin(regs[RTC_MONTH] & 0x1f) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	tm->tm_mday = bcd2bin(regs[RTC_DATE] & 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	tm->tm_wday = (regs[RTC_WEEKDAY] & 0x07);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	if (regs[RTC_HOUR] & HOUR_12) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		tm->tm_hour = bcd2bin(regs[RTC_HOUR] & 0x01f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		if (tm->tm_hour == 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 			tm->tm_hour = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		if (regs[RTC_HOUR] & HOUR_AM_PM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 			tm->tm_hour += 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		tm->tm_hour = bcd2bin(regs[RTC_HOUR] & 0x03f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	tm->tm_min = bcd2bin(regs[RTC_MIN] & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	tm->tm_sec = bcd2bin(regs[RTC_SEC] & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) static void tm_to_regs(struct rtc_time *tm, u8 *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	u8 high, low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	high = (tm->tm_year + 1900) / 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	low = tm->tm_year % 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	regs[RTC_YEAR2] = bin2bcd(high);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	regs[RTC_YEAR1] = bin2bcd(low);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	regs[RTC_MONTH] = bin2bcd(tm->tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	regs[RTC_DATE] = bin2bcd(tm->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	regs[RTC_WEEKDAY] = tm->tm_wday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	regs[RTC_HOUR] = bin2bcd(tm->tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	regs[RTC_MIN] = bin2bcd(tm->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	regs[RTC_SEC] = bin2bcd(tm->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) static int max8907_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	struct max8907_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	u8 regs[TIME_NUM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	ret = regmap_bulk_read(rtc->regmap, MAX8907_REG_RTC_SEC, regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			       TIME_NUM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	regs_to_tm(regs, tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static int max8907_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	struct max8907_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	u8 regs[TIME_NUM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	tm_to_regs(tm, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	return regmap_bulk_write(rtc->regmap, MAX8907_REG_RTC_SEC, regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 				 TIME_NUM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static int max8907_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	struct max8907_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	u8 regs[TIME_NUM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	ret = regmap_bulk_read(rtc->regmap, MAX8907_REG_ALARM0_SEC, regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			       TIME_NUM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	regs_to_tm(regs, &alrm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	ret = regmap_read(rtc->regmap, MAX8907_REG_ALARM0_CNTL, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	alrm->enabled = !!(val & 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static int max8907_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	struct max8907_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	u8 regs[TIME_NUM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	tm_to_regs(&alrm->time, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	/* Disable alarm while we update the target time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	ret = regmap_write(rtc->regmap, MAX8907_REG_ALARM0_CNTL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	ret = regmap_bulk_write(rtc->regmap, MAX8907_REG_ALARM0_SEC, regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 				TIME_NUM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	if (alrm->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		ret = regmap_write(rtc->regmap, MAX8907_REG_ALARM0_CNTL, 0x77);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static const struct rtc_class_ops max8907_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	.read_time	= max8907_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	.set_time	= max8907_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	.read_alarm	= max8907_rtc_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	.set_alarm	= max8907_rtc_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static int max8907_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	struct max8907 *max8907 = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	struct max8907_rtc *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	if (!rtc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	platform_set_drvdata(pdev, rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	rtc->max8907 = max8907;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	rtc->regmap = max8907->regmap_rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, "max8907-rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 					&max8907_rtc_ops, THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	if (IS_ERR(rtc->rtc_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		ret = PTR_ERR(rtc->rtc_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		dev_err(&pdev->dev, "Failed to register RTC device: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	rtc->irq = regmap_irq_get_virq(max8907->irqc_rtc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 				       MAX8907_IRQ_RTC_ALARM0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	if (rtc->irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		return rtc->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 				max8907_irq_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 				IRQF_ONESHOT, "max8907-alarm0", rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		dev_err(&pdev->dev, "Failed to request IRQ%d: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 			rtc->irq, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static struct platform_driver max8907_rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		.name = "max8907-rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	.probe = max8907_rtc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) module_platform_driver(max8907_rtc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) MODULE_DESCRIPTION("Maxim MAX8907 RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) MODULE_LICENSE("GPL v2");