Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /* rtc-max6916.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Driver for MAXIM  max6916 Low Current, SPI Compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Real Time Clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Author : Venkat Prashanth B U <venkat.prashanth2498@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) /* Registers in max6916 rtc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define MAX6916_SECONDS_REG	0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define MAX6916_MINUTES_REG	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define MAX6916_HOURS_REG	0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define MAX6916_DATE_REG	0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define MAX6916_MONTH_REG	0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define MAX6916_DAY_REG	0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define MAX6916_YEAR_REG	0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define MAX6916_CONTROL_REG	0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define MAX6916_STATUS_REG	0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define MAX6916_CLOCK_BURST	0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) static int max6916_read_reg(struct device *dev, unsigned char address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 			    unsigned char *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct spi_device *spi = to_spi_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	*data = address | 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	return spi_write_then_read(spi, data, 1, data, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) static int max6916_write_reg(struct device *dev, unsigned char address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 			     unsigned char data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct spi_device *spi = to_spi_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	unsigned char buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	buf[0] = address & 0x7F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	buf[1] = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	return spi_write_then_read(spi, buf, 2, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static int max6916_read_time(struct device *dev, struct rtc_time *dt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	struct spi_device *spi = to_spi_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	unsigned char buf[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	buf[0] = MAX6916_CLOCK_BURST | 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	err = spi_write_then_read(spi, buf, 1, buf, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	dt->tm_sec = bcd2bin(buf[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	dt->tm_min = bcd2bin(buf[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	dt->tm_hour = bcd2bin(buf[2] & 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	dt->tm_mday = bcd2bin(buf[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	dt->tm_mon = bcd2bin(buf[4]) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	dt->tm_wday = bcd2bin(buf[5]) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	dt->tm_year = bcd2bin(buf[6]) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) static int max6916_set_time(struct device *dev, struct rtc_time *dt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	struct spi_device *spi = to_spi_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	unsigned char buf[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	if (dt->tm_year < 100 || dt->tm_year > 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		dev_err(&spi->dev, "Year must be between 2000 and 2099. It's %d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 			dt->tm_year + 1900);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	buf[0] = MAX6916_CLOCK_BURST & 0x7F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	buf[1] = bin2bcd(dt->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	buf[2] = bin2bcd(dt->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	buf[3] = (bin2bcd(dt->tm_hour) & 0X3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	buf[4] = bin2bcd(dt->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	buf[5] = bin2bcd(dt->tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	buf[6] = bin2bcd(dt->tm_wday + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	buf[7] = bin2bcd(dt->tm_year % 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	buf[8] = bin2bcd(0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	/* write the rtc settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	return spi_write_then_read(spi, buf, 9, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static const struct rtc_class_ops max6916_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	.read_time = max6916_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	.set_time = max6916_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int max6916_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	unsigned char data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	/* spi setup with max6916 in mode 3 and bits per word as 8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	spi->mode = SPI_MODE_3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	spi->bits_per_word = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	spi_setup(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	/* RTC Settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	res = max6916_read_reg(&spi->dev, MAX6916_SECONDS_REG, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	/* Disable the write protect of rtc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	max6916_read_reg(&spi->dev, MAX6916_CONTROL_REG, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	data = data & ~(1 << 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	max6916_write_reg(&spi->dev, MAX6916_CONTROL_REG, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	/*Enable oscillator,disable oscillator stop flag, glitch filter*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	max6916_read_reg(&spi->dev, MAX6916_STATUS_REG, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	data = data & 0x1B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	max6916_write_reg(&spi->dev, MAX6916_STATUS_REG, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	/* display the settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	max6916_read_reg(&spi->dev, MAX6916_CONTROL_REG, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	dev_info(&spi->dev, "MAX6916 RTC CTRL Reg = 0x%02x\n", data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	max6916_read_reg(&spi->dev, MAX6916_STATUS_REG, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	dev_info(&spi->dev, "MAX6916 RTC Status Reg = 0x%02x\n", data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	rtc = devm_rtc_device_register(&spi->dev, "max6916",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 				       &max6916_rtc_ops, THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	if (IS_ERR(rtc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		return PTR_ERR(rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	spi_set_drvdata(spi, rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static struct spi_driver max6916_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		.name = "max6916",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	.probe = max6916_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) module_spi_driver(max6916_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) MODULE_DESCRIPTION("MAX6916 SPI RTC DRIVER");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) MODULE_AUTHOR("Venkat Prashanth B U <venkat.prashanth2498@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) MODULE_LICENSE("GPL v2");