^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * An I2C driver for the Intersil ISL 12022
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Roman Fietze <roman.fietze@telemotive.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Based on the Philips PCF8563 RTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * by Alessandro Zummo <a.zummo@towertech.it>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* ISL register offsets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define ISL12022_REG_SC 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define ISL12022_REG_MN 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define ISL12022_REG_HR 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define ISL12022_REG_DT 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define ISL12022_REG_MO 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define ISL12022_REG_YR 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define ISL12022_REG_DW 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define ISL12022_REG_SR 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define ISL12022_REG_INT 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* ISL register bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define ISL12022_HR_MIL (1 << 7) /* military or 24 hour time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define ISL12022_SR_LBAT85 (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define ISL12022_SR_LBAT75 (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define ISL12022_INT_WRTC (1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static struct i2c_driver isl12022_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct isl12022 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) bool write_enabled; /* true if write enable is set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static int isl12022_read_regs(struct i2c_client *client, uint8_t reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) uint8_t *data, size_t n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct i2c_msg msgs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .addr = client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .len = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .buf = data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }, /* setup read ptr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .addr = client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .len = n,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .buf = data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) data[0] = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (ret != ARRAY_SIZE(msgs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) dev_err(&client->dev, "%s: read error, ret=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static int isl12022_write_reg(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) uint8_t reg, uint8_t val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) uint8_t data[2] = { reg, val };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) err = i2c_master_send(client, data, sizeof(data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (err != sizeof(data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) "%s: err=%d addr=%02x, data=%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) __func__, err, data[0], data[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * In the routines that deal directly with the isl12022 hardware, we use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static int isl12022_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) uint8_t buf[ISL12022_REG_INT + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) ret = isl12022_read_regs(client, ISL12022_REG_SC, buf, sizeof(buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (buf[ISL12022_REG_SR] & (ISL12022_SR_LBAT85 | ISL12022_SR_LBAT75)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) dev_warn(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) "voltage dropped below %u%%, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) "date and time is not reliable.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) buf[ISL12022_REG_SR] & ISL12022_SR_LBAT85 ? 85 : 75);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) "%s: raw data is sec=%02x, min=%02x, hr=%02x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) "mday=%02x, mon=%02x, year=%02x, wday=%02x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) "sr=%02x, int=%02x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) buf[ISL12022_REG_SC],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) buf[ISL12022_REG_MN],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) buf[ISL12022_REG_HR],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) buf[ISL12022_REG_DT],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) buf[ISL12022_REG_MO],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) buf[ISL12022_REG_YR],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) buf[ISL12022_REG_DW],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) buf[ISL12022_REG_SR],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) buf[ISL12022_REG_INT]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) tm->tm_sec = bcd2bin(buf[ISL12022_REG_SC] & 0x7F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) tm->tm_min = bcd2bin(buf[ISL12022_REG_MN] & 0x7F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) tm->tm_hour = bcd2bin(buf[ISL12022_REG_HR] & 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) tm->tm_mday = bcd2bin(buf[ISL12022_REG_DT] & 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) tm->tm_wday = buf[ISL12022_REG_DW] & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) tm->tm_mon = bcd2bin(buf[ISL12022_REG_MO] & 0x1F) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) tm->tm_year = bcd2bin(buf[ISL12022_REG_YR]) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) dev_dbg(&client->dev, "%s: secs=%d, mins=%d, hours=%d, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) "mday=%d, mon=%d, year=%d, wday=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) tm->tm_sec, tm->tm_min, tm->tm_hour,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static int isl12022_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct isl12022 *isl12022 = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) size_t i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) uint8_t buf[ISL12022_REG_DW + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) dev_dbg(&client->dev, "%s: secs=%d, mins=%d, hours=%d, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) "mday=%d, mon=%d, year=%d, wday=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) tm->tm_sec, tm->tm_min, tm->tm_hour,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (!isl12022->write_enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ret = isl12022_read_regs(client, ISL12022_REG_INT, buf, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) /* Check if WRTC (write rtc enable) is set factory default is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * 0 (not set) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (!(buf[0] & ISL12022_INT_WRTC)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) "init write enable and 24 hour format\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /* Set the write enable bit. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) ret = isl12022_write_reg(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) ISL12022_REG_INT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) buf[0] | ISL12022_INT_WRTC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /* Write to any RTC register to start RTC, we use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * HR register, setting the MIL bit to use the 24 hour
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * format. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) ret = isl12022_read_regs(client, ISL12022_REG_HR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) buf, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) ret = isl12022_write_reg(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) ISL12022_REG_HR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) buf[0] | ISL12022_HR_MIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) isl12022->write_enabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /* hours, minutes and seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) buf[ISL12022_REG_SC] = bin2bcd(tm->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) buf[ISL12022_REG_MN] = bin2bcd(tm->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) buf[ISL12022_REG_HR] = bin2bcd(tm->tm_hour) | ISL12022_HR_MIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) buf[ISL12022_REG_DT] = bin2bcd(tm->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* month, 1 - 12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) buf[ISL12022_REG_MO] = bin2bcd(tm->tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) /* year and century */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) buf[ISL12022_REG_YR] = bin2bcd(tm->tm_year % 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) buf[ISL12022_REG_DW] = tm->tm_wday & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /* write register's data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) for (i = 0; i < ARRAY_SIZE(buf); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) ret = isl12022_write_reg(client, ISL12022_REG_SC + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) buf[ISL12022_REG_SC + i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static const struct rtc_class_ops isl12022_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .read_time = isl12022_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .set_time = isl12022_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static int isl12022_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct isl12022 *isl12022;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) isl12022 = devm_kzalloc(&client->dev, sizeof(struct isl12022),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (!isl12022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) i2c_set_clientdata(client, isl12022);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) isl12022->rtc = devm_rtc_device_register(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) isl12022_driver.driver.name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) &isl12022_rtc_ops, THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return PTR_ERR_OR_ZERO(isl12022->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static const struct of_device_id isl12022_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) { .compatible = "isl,isl12022" }, /* for backward compat., don't use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) { .compatible = "isil,isl12022" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) MODULE_DEVICE_TABLE(of, isl12022_dt_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static const struct i2c_device_id isl12022_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) { "isl12022", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) MODULE_DEVICE_TABLE(i2c, isl12022_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static struct i2c_driver isl12022_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .name = "rtc-isl12022",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .of_match_table = of_match_ptr(isl12022_dt_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .probe = isl12022_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .id_table = isl12022_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) module_i2c_driver(isl12022_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) MODULE_AUTHOR("roman.fietze@telemotive.de");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) MODULE_DESCRIPTION("ISL 12022 RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags