^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2018 NXP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <dt-bindings/firmware/imx/rsrc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/arm-smccc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/firmware/imx/sci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define IMX_SC_TIMER_FUNC_GET_RTC_SEC1970 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define IMX_SC_TIMER_FUNC_SET_RTC_ALARM 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define IMX_SC_TIMER_FUNC_SET_RTC_TIME 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define IMX_SIP_SRTC 0xC2000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define IMX_SIP_SRTC_SET_TIME 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define SC_IRQ_GROUP_RTC 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define SC_IRQ_RTC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static struct imx_sc_ipc *rtc_ipc_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static struct rtc_device *imx_sc_rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct imx_sc_msg_timer_get_rtc_time {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct imx_sc_rpc_msg hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) u32 time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct imx_sc_msg_timer_rtc_set_alarm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct imx_sc_rpc_msg hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u16 year;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u8 mon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u8 day;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u8 hour;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u8 min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u8 sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) } __packed __aligned(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static int imx_sc_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct imx_sc_msg_timer_get_rtc_time msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct imx_sc_rpc_msg *hdr = &msg.hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) hdr->ver = IMX_SC_RPC_VERSION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) hdr->svc = IMX_SC_RPC_SVC_TIMER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) hdr->func = IMX_SC_TIMER_FUNC_GET_RTC_SEC1970;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) hdr->size = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ret = imx_scu_call_rpc(rtc_ipc_handle, &msg, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) dev_err(dev, "read rtc time failed, ret %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) rtc_time64_to_tm(msg.time, tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static int imx_sc_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct arm_smccc_res res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* pack 2 time parameters into 1 register, 16 bits for each */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) arm_smccc_smc(IMX_SIP_SRTC, IMX_SIP_SRTC_SET_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) ((tm->tm_year + 1900) << 16) | (tm->tm_mon + 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) (tm->tm_mday << 16) | tm->tm_hour,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) (tm->tm_min << 16) | tm->tm_sec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 0, 0, 0, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return res.a0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static int imx_sc_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return imx_scu_irq_group_enable(SC_IRQ_GROUP_RTC, SC_IRQ_RTC, enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static int imx_sc_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * SCU firmware does NOT provide read alarm API, but .read_alarm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * callback is required by RTC framework to support alarm function,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * so just return here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static int imx_sc_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct imx_sc_msg_timer_rtc_set_alarm msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct imx_sc_rpc_msg *hdr = &msg.hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct rtc_time *alrm_tm = &alrm->time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) hdr->ver = IMX_SC_RPC_VERSION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) hdr->svc = IMX_SC_RPC_SVC_TIMER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) hdr->func = IMX_SC_TIMER_FUNC_SET_RTC_ALARM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) hdr->size = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) msg.year = alrm_tm->tm_year + 1900;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) msg.mon = alrm_tm->tm_mon + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) msg.day = alrm_tm->tm_mday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) msg.hour = alrm_tm->tm_hour;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) msg.min = alrm_tm->tm_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) msg.sec = alrm_tm->tm_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ret = imx_scu_call_rpc(rtc_ipc_handle, &msg, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) dev_err(dev, "set rtc alarm failed, ret %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ret = imx_sc_rtc_alarm_irq_enable(dev, alrm->enabled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) dev_err(dev, "enable rtc alarm failed, ret %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static const struct rtc_class_ops imx_sc_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .read_time = imx_sc_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .set_time = imx_sc_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .read_alarm = imx_sc_rtc_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .set_alarm = imx_sc_rtc_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .alarm_irq_enable = imx_sc_rtc_alarm_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static int imx_sc_rtc_alarm_notify(struct notifier_block *nb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) unsigned long event, void *group)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* ignore non-rtc irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (!((event & SC_IRQ_RTC) && (*(u8 *)group == SC_IRQ_GROUP_RTC)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) rtc_update_irq(imx_sc_rtc, 1, RTC_IRQF | RTC_AF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static struct notifier_block imx_sc_rtc_alarm_sc_notifier = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .notifier_call = imx_sc_rtc_alarm_notify,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static int imx_sc_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) ret = imx_scu_get_handle(&rtc_ipc_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) device_init_wakeup(&pdev->dev, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) imx_sc_rtc = devm_rtc_allocate_device(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (IS_ERR(imx_sc_rtc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return PTR_ERR(imx_sc_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) imx_sc_rtc->ops = &imx_sc_rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) imx_sc_rtc->range_min = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) imx_sc_rtc->range_max = U32_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ret = rtc_register_device(imx_sc_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) imx_scu_irq_register_notifier(&imx_sc_rtc_alarm_sc_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static const struct of_device_id imx_sc_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) { .compatible = "fsl,imx8qxp-sc-rtc", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) MODULE_DEVICE_TABLE(of, imx_sc_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static struct platform_driver imx_sc_rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .name = "imx-sc-rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .of_match_table = imx_sc_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .probe = imx_sc_rtc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) module_platform_driver(imx_sc_rtc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) MODULE_AUTHOR("Anson Huang <Anson.Huang@nxp.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) MODULE_DESCRIPTION("NXP i.MX System Controller RTC Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) MODULE_LICENSE("GPL");