^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* drivers/rtc/rtc-goldfish.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2007 Google, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2017 Imagination Technologies Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define TIMER_TIME_LOW 0x00 /* get low bits of current time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /* and update TIMER_TIME_HIGH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define TIMER_TIME_HIGH 0x04 /* get high bits of time at last */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* TIMER_TIME_LOW read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define TIMER_ALARM_LOW 0x08 /* set low bits of alarm and */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* activate it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define TIMER_ALARM_HIGH 0x0c /* set high bits of next alarm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define TIMER_IRQ_ENABLED 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define TIMER_CLEAR_ALARM 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define TIMER_ALARM_STATUS 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define TIMER_CLEAR_INTERRUPT 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct goldfish_rtc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static int goldfish_rtc_read_alarm(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u64 rtc_alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u64 rtc_alarm_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u64 rtc_alarm_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct goldfish_rtc *rtcdrv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) rtcdrv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) base = rtcdrv->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) rtc_alarm_low = readl(base + TIMER_ALARM_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) rtc_alarm_high = readl(base + TIMER_ALARM_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) rtc_alarm = (rtc_alarm_high << 32) | rtc_alarm_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) do_div(rtc_alarm, NSEC_PER_SEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) memset(alrm, 0, sizeof(struct rtc_wkalrm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) rtc_time64_to_tm(rtc_alarm, &alrm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (readl(base + TIMER_ALARM_STATUS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) alrm->enabled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) alrm->enabled = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static int goldfish_rtc_set_alarm(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct goldfish_rtc *rtcdrv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) u64 rtc_alarm64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u64 rtc_status_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) rtcdrv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) base = rtcdrv->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (alrm->enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) rtc_alarm64 = rtc_tm_to_time64(&alrm->time) * NSEC_PER_SEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) writel((rtc_alarm64 >> 32), base + TIMER_ALARM_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) writel(rtc_alarm64, base + TIMER_ALARM_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) writel(1, base + TIMER_IRQ_ENABLED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * if this function was called with enabled=0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * then it could mean that the application is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * trying to cancel an ongoing alarm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) rtc_status_reg = readl(base + TIMER_ALARM_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (rtc_status_reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) writel(1, base + TIMER_CLEAR_ALARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static int goldfish_rtc_alarm_irq_enable(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct goldfish_rtc *rtcdrv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) rtcdrv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) base = rtcdrv->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) writel(1, base + TIMER_IRQ_ENABLED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) writel(0, base + TIMER_IRQ_ENABLED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static irqreturn_t goldfish_rtc_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct goldfish_rtc *rtcdrv = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) void __iomem *base = rtcdrv->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) writel(1, base + TIMER_CLEAR_INTERRUPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) rtc_update_irq(rtcdrv->rtc, 1, RTC_IRQF | RTC_AF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static int goldfish_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct goldfish_rtc *rtcdrv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) u64 time_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u64 time_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) u64 time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) rtcdrv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) base = rtcdrv->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) time_low = readl(base + TIMER_TIME_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) time_high = readl(base + TIMER_TIME_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) time = (time_high << 32) | time_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) do_div(time, NSEC_PER_SEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) rtc_time64_to_tm(time, tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static int goldfish_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct goldfish_rtc *rtcdrv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) u64 now64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) rtcdrv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) base = rtcdrv->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) now64 = rtc_tm_to_time64(tm) * NSEC_PER_SEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) writel((now64 >> 32), base + TIMER_TIME_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) writel(now64, base + TIMER_TIME_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static const struct rtc_class_ops goldfish_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .read_time = goldfish_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .set_time = goldfish_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .read_alarm = goldfish_rtc_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .set_alarm = goldfish_rtc_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .alarm_irq_enable = goldfish_rtc_alarm_irq_enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static int goldfish_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) struct goldfish_rtc *rtcdrv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) rtcdrv = devm_kzalloc(&pdev->dev, sizeof(*rtcdrv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (!rtcdrv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) platform_set_drvdata(pdev, rtcdrv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) rtcdrv->base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (IS_ERR(rtcdrv->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return PTR_ERR(rtcdrv->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) rtcdrv->irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) if (rtcdrv->irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) rtcdrv->rtc = devm_rtc_allocate_device(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (IS_ERR(rtcdrv->rtc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return PTR_ERR(rtcdrv->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) rtcdrv->rtc->ops = &goldfish_rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) rtcdrv->rtc->range_max = U64_MAX / NSEC_PER_SEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) err = devm_request_irq(&pdev->dev, rtcdrv->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) goldfish_rtc_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 0, pdev->name, rtcdrv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return rtc_register_device(rtcdrv->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static const struct of_device_id goldfish_rtc_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) { .compatible = "google,goldfish-rtc", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) MODULE_DEVICE_TABLE(of, goldfish_rtc_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static struct platform_driver goldfish_rtc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .probe = goldfish_rtc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .name = "goldfish_rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .of_match_table = goldfish_rtc_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) module_platform_driver(goldfish_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) MODULE_LICENSE("GPL v2");