^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * An rtc driver for the Dallas DS1553
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/gfp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define RTC_REG_SIZE 0x2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define RTC_OFFSET 0x1ff0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define RTC_FLAGS (RTC_OFFSET + 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define RTC_SECONDS_ALARM (RTC_OFFSET + 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define RTC_MINUTES_ALARM (RTC_OFFSET + 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define RTC_HOURS_ALARM (RTC_OFFSET + 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define RTC_DATE_ALARM (RTC_OFFSET + 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define RTC_INTERRUPTS (RTC_OFFSET + 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define RTC_WATCHDOG (RTC_OFFSET + 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define RTC_CONTROL (RTC_OFFSET + 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define RTC_CENTURY (RTC_OFFSET + 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define RTC_SECONDS (RTC_OFFSET + 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define RTC_MINUTES (RTC_OFFSET + 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define RTC_HOURS (RTC_OFFSET + 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define RTC_DAY (RTC_OFFSET + 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define RTC_DATE (RTC_OFFSET + 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define RTC_MONTH (RTC_OFFSET + 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define RTC_YEAR (RTC_OFFSET + 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define RTC_CENTURY_MASK 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define RTC_SECONDS_MASK 0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define RTC_DAY_MASK 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* Bits in the Control/Century register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define RTC_WRITE 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define RTC_READ 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* Bits in the Seconds register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define RTC_STOP 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* Bits in the Flags register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define RTC_FLAGS_AF 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define RTC_FLAGS_BLF 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* Bits in the Interrupts register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define RTC_INTS_AE 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct rtc_plat_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) void __iomem *ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) unsigned long last_jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) unsigned int irqen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int alrm_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int alrm_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int alrm_hour;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int alrm_mday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static int ds1553_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct rtc_plat_data *pdata = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) void __iomem *ioaddr = pdata->ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) u8 century;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) century = bin2bcd((tm->tm_year + 1900) / 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) writeb(RTC_WRITE, pdata->ioaddr + RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) writeb(bin2bcd(tm->tm_year % 100), ioaddr + RTC_YEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) writeb(bin2bcd(tm->tm_mon + 1), ioaddr + RTC_MONTH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) writeb(bin2bcd(tm->tm_wday) & RTC_DAY_MASK, ioaddr + RTC_DAY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) writeb(bin2bcd(tm->tm_mday), ioaddr + RTC_DATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) writeb(bin2bcd(tm->tm_hour), ioaddr + RTC_HOURS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) writeb(bin2bcd(tm->tm_min), ioaddr + RTC_MINUTES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) writeb(bin2bcd(tm->tm_sec) & RTC_SECONDS_MASK, ioaddr + RTC_SECONDS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* RTC_CENTURY and RTC_CONTROL share same register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) writeb(RTC_WRITE | (century & RTC_CENTURY_MASK), ioaddr + RTC_CENTURY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) writeb(century & RTC_CENTURY_MASK, ioaddr + RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static int ds1553_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct rtc_plat_data *pdata = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) void __iomem *ioaddr = pdata->ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) unsigned int year, month, day, hour, minute, second, week;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) unsigned int century;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* give enough time to update RTC in case of continuous read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (pdata->last_jiffies == jiffies)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) pdata->last_jiffies = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) writeb(RTC_READ, ioaddr + RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) second = readb(ioaddr + RTC_SECONDS) & RTC_SECONDS_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) minute = readb(ioaddr + RTC_MINUTES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) hour = readb(ioaddr + RTC_HOURS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) day = readb(ioaddr + RTC_DATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) week = readb(ioaddr + RTC_DAY) & RTC_DAY_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) month = readb(ioaddr + RTC_MONTH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) year = readb(ioaddr + RTC_YEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) century = readb(ioaddr + RTC_CENTURY) & RTC_CENTURY_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) writeb(0, ioaddr + RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) tm->tm_sec = bcd2bin(second);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) tm->tm_min = bcd2bin(minute);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) tm->tm_hour = bcd2bin(hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) tm->tm_mday = bcd2bin(day);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) tm->tm_wday = bcd2bin(week);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) tm->tm_mon = bcd2bin(month) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* year is 1900 + tm->tm_year */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) tm->tm_year = bcd2bin(year) + bcd2bin(century) * 100 - 1900;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static void ds1553_rtc_update_alarm(struct rtc_plat_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) void __iomem *ioaddr = pdata->ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) spin_lock_irqsave(&pdata->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) writeb(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 0x80 : bin2bcd(pdata->alrm_mday),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ioaddr + RTC_DATE_ALARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) writeb(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 0x80 : bin2bcd(pdata->alrm_hour),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ioaddr + RTC_HOURS_ALARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) writeb(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 0x80 : bin2bcd(pdata->alrm_min),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) ioaddr + RTC_MINUTES_ALARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) writeb(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 0x80 : bin2bcd(pdata->alrm_sec),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) ioaddr + RTC_SECONDS_ALARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) writeb(pdata->irqen ? RTC_INTS_AE : 0, ioaddr + RTC_INTERRUPTS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) readb(ioaddr + RTC_FLAGS); /* clear interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) spin_unlock_irqrestore(&pdata->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static int ds1553_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct rtc_plat_data *pdata = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (pdata->irq <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) pdata->alrm_mday = alrm->time.tm_mday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) pdata->alrm_hour = alrm->time.tm_hour;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) pdata->alrm_min = alrm->time.tm_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) pdata->alrm_sec = alrm->time.tm_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (alrm->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) pdata->irqen |= RTC_AF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) ds1553_rtc_update_alarm(pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static int ds1553_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct rtc_plat_data *pdata = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (pdata->irq <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static irqreturn_t ds1553_rtc_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct platform_device *pdev = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) void __iomem *ioaddr = pdata->ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) unsigned long events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) spin_lock(&pdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) /* read and clear interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (readb(ioaddr + RTC_FLAGS) & RTC_FLAGS_AF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) events = RTC_IRQF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (readb(ioaddr + RTC_SECONDS_ALARM) & 0x80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) events |= RTC_UF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) events |= RTC_AF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) rtc_update_irq(pdata->rtc, 1, events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) spin_unlock(&pdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return events ? IRQ_HANDLED : IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static int ds1553_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) struct rtc_plat_data *pdata = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (pdata->irq <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) pdata->irqen |= RTC_AF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) pdata->irqen &= ~RTC_AF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) ds1553_rtc_update_alarm(pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static const struct rtc_class_ops ds1553_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .read_time = ds1553_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .set_time = ds1553_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .read_alarm = ds1553_rtc_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .set_alarm = ds1553_rtc_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .alarm_irq_enable = ds1553_rtc_alarm_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static int ds1553_nvram_read(void *priv, unsigned int pos, void *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) size_t bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) struct platform_device *pdev = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) void __iomem *ioaddr = pdata->ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) u8 *buf = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) for (; bytes; bytes--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) *buf++ = readb(ioaddr + pos++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static int ds1553_nvram_write(void *priv, unsigned int pos, void *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) size_t bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) struct platform_device *pdev = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) void __iomem *ioaddr = pdata->ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) u8 *buf = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) for (; bytes; bytes--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) writeb(*buf++, ioaddr + pos++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static int ds1553_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) unsigned int cen, sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) struct rtc_plat_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) void __iomem *ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) struct nvmem_config nvmem_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .name = "ds1553_nvram",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .word_size = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .stride = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .size = RTC_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .reg_read = ds1553_nvram_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .reg_write = ds1553_nvram_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .priv = pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (!pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ioaddr = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) if (IS_ERR(ioaddr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) return PTR_ERR(ioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) pdata->ioaddr = ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) pdata->irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) /* turn RTC on if it was not on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) sec = readb(ioaddr + RTC_SECONDS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (sec & RTC_STOP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) sec &= RTC_SECONDS_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) cen = readb(ioaddr + RTC_CENTURY) & RTC_CENTURY_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) writeb(RTC_WRITE, ioaddr + RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) writeb(sec, ioaddr + RTC_SECONDS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) writeb(cen & RTC_CENTURY_MASK, ioaddr + RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (readb(ioaddr + RTC_FLAGS) & RTC_FLAGS_BLF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) dev_warn(&pdev->dev, "voltage-low detected.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) spin_lock_init(&pdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) pdata->last_jiffies = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) platform_set_drvdata(pdev, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) pdata->rtc = devm_rtc_allocate_device(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (IS_ERR(pdata->rtc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) return PTR_ERR(pdata->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) pdata->rtc->ops = &ds1553_rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) pdata->rtc->nvram_old_abi = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) ret = rtc_register_device(pdata->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) if (pdata->irq > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) writeb(0, ioaddr + RTC_INTERRUPTS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if (devm_request_irq(&pdev->dev, pdata->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) ds1553_rtc_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 0, pdev->name, pdev) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) dev_warn(&pdev->dev, "interrupt not available.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) pdata->irq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (rtc_nvmem_register(pdata->rtc, &nvmem_cfg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) dev_err(&pdev->dev, "unable to register nvmem\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /* work with hotplug and coldplug */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) MODULE_ALIAS("platform:rtc-ds1553");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static struct platform_driver ds1553_rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .probe = ds1553_rtc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) .name = "rtc-ds1553",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) module_platform_driver(ds1553_rtc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) MODULE_DESCRIPTION("Dallas DS1553 RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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