^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Real time clock device driver for DA9063
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2013-2015 Dialog Semiconductor Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mfd/da9062/registers.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mfd/da9063/registers.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mfd/da9063/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define YEARS_TO_DA9063(year) ((year) - 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MONTHS_TO_DA9063(month) ((month) + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define YEARS_FROM_DA9063(year) ((year) + 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define MONTHS_FROM_DA9063(month) ((month) - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) RTC_SEC = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) RTC_MIN = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) RTC_HOUR = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) RTC_DAY = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) RTC_MONTH = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) RTC_YEAR = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) RTC_DATA_LEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct da9063_compatible_rtc_regmap {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* REGS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int rtc_enable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int rtc_enable_32k_crystal_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int rtc_alarm_secs_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int rtc_alarm_year_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) int rtc_count_secs_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int rtc_count_year_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) int rtc_event_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* MASKS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int rtc_enable_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) int rtc_crystal_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int rtc_event_alarm_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int rtc_alarm_on_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) int rtc_alarm_status_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) int rtc_tick_on_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int rtc_ready_to_read_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int rtc_count_sec_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int rtc_count_min_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int rtc_count_hour_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) int rtc_count_day_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int rtc_count_month_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) int rtc_count_year_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* ALARM CONFIG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int rtc_data_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) int rtc_alarm_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct da9063_compatible_rtc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct rtc_device *rtc_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct rtc_time alarm_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) const struct da9063_compatible_rtc_regmap *config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) bool rtc_sync;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static const struct da9063_compatible_rtc_regmap da9063_ad_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* REGS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .rtc_enable_reg = DA9063_REG_CONTROL_E,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .rtc_alarm_secs_reg = DA9063_AD_REG_ALARM_MI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .rtc_alarm_year_reg = DA9063_AD_REG_ALARM_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .rtc_count_secs_reg = DA9063_REG_COUNT_S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .rtc_count_year_reg = DA9063_REG_COUNT_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .rtc_event_reg = DA9063_REG_EVENT_A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* MASKS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .rtc_enable_mask = DA9063_RTC_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .rtc_crystal_mask = DA9063_CRYSTAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .rtc_event_alarm_mask = DA9063_E_ALARM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .rtc_alarm_on_mask = DA9063_ALARM_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .rtc_alarm_status_mask = DA9063_ALARM_STATUS_ALARM |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) DA9063_ALARM_STATUS_TICK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .rtc_tick_on_mask = DA9063_TICK_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .rtc_ready_to_read_mask = DA9063_RTC_READ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .rtc_count_sec_mask = DA9063_COUNT_SEC_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .rtc_count_min_mask = DA9063_COUNT_MIN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .rtc_count_hour_mask = DA9063_COUNT_HOUR_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .rtc_count_day_mask = DA9063_COUNT_DAY_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .rtc_count_month_mask = DA9063_COUNT_MONTH_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .rtc_count_year_mask = DA9063_COUNT_YEAR_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* ALARM CONFIG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .rtc_data_start = RTC_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .rtc_alarm_len = RTC_DATA_LEN - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static const struct da9063_compatible_rtc_regmap da9063_bb_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* REGS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .rtc_enable_reg = DA9063_REG_CONTROL_E,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .rtc_alarm_secs_reg = DA9063_BB_REG_ALARM_S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .rtc_alarm_year_reg = DA9063_BB_REG_ALARM_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .rtc_count_secs_reg = DA9063_REG_COUNT_S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .rtc_count_year_reg = DA9063_REG_COUNT_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .rtc_event_reg = DA9063_REG_EVENT_A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* MASKS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .rtc_enable_mask = DA9063_RTC_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .rtc_crystal_mask = DA9063_CRYSTAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .rtc_event_alarm_mask = DA9063_E_ALARM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .rtc_alarm_on_mask = DA9063_ALARM_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .rtc_alarm_status_mask = DA9063_ALARM_STATUS_ALARM |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) DA9063_ALARM_STATUS_TICK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .rtc_tick_on_mask = DA9063_TICK_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .rtc_ready_to_read_mask = DA9063_RTC_READ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .rtc_count_sec_mask = DA9063_COUNT_SEC_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .rtc_count_min_mask = DA9063_COUNT_MIN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .rtc_count_hour_mask = DA9063_COUNT_HOUR_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .rtc_count_day_mask = DA9063_COUNT_DAY_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .rtc_count_month_mask = DA9063_COUNT_MONTH_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .rtc_count_year_mask = DA9063_COUNT_YEAR_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* ALARM CONFIG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .rtc_data_start = RTC_SEC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .rtc_alarm_len = RTC_DATA_LEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static const struct da9063_compatible_rtc_regmap da9062_aa_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /* REGS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .rtc_enable_reg = DA9062AA_CONTROL_E,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .rtc_alarm_secs_reg = DA9062AA_ALARM_S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .rtc_alarm_year_reg = DA9062AA_ALARM_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .rtc_count_secs_reg = DA9062AA_COUNT_S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .rtc_count_year_reg = DA9062AA_COUNT_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .rtc_event_reg = DA9062AA_EVENT_A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /* MASKS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .rtc_enable_mask = DA9062AA_RTC_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .rtc_crystal_mask = DA9062AA_CRYSTAL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .rtc_enable_32k_crystal_reg = DA9062AA_EN_32K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .rtc_event_alarm_mask = DA9062AA_M_ALARM_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .rtc_alarm_on_mask = DA9062AA_ALARM_ON_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .rtc_alarm_status_mask = (0x02 << 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .rtc_tick_on_mask = DA9062AA_TICK_ON_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .rtc_ready_to_read_mask = DA9062AA_RTC_READ_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .rtc_count_sec_mask = DA9062AA_COUNT_SEC_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .rtc_count_min_mask = DA9062AA_COUNT_MIN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .rtc_count_hour_mask = DA9062AA_COUNT_HOUR_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .rtc_count_day_mask = DA9062AA_COUNT_DAY_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .rtc_count_month_mask = DA9062AA_COUNT_MONTH_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .rtc_count_year_mask = DA9062AA_COUNT_YEAR_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /* ALARM CONFIG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .rtc_data_start = RTC_SEC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .rtc_alarm_len = RTC_DATA_LEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static const struct of_device_id da9063_compatible_reg_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) { .compatible = "dlg,da9063-rtc", .data = &da9063_bb_regs },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) { .compatible = "dlg,da9062-rtc", .data = &da9062_aa_regs },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) MODULE_DEVICE_TABLE(of, da9063_compatible_reg_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static void da9063_data_to_tm(u8 *data, struct rtc_time *tm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct da9063_compatible_rtc *rtc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) const struct da9063_compatible_rtc_regmap *config = rtc->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) tm->tm_sec = data[RTC_SEC] & config->rtc_count_sec_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) tm->tm_min = data[RTC_MIN] & config->rtc_count_min_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) tm->tm_hour = data[RTC_HOUR] & config->rtc_count_hour_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) tm->tm_mday = data[RTC_DAY] & config->rtc_count_day_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) tm->tm_mon = MONTHS_FROM_DA9063(data[RTC_MONTH] &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) config->rtc_count_month_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) tm->tm_year = YEARS_FROM_DA9063(data[RTC_YEAR] &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) config->rtc_count_year_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static void da9063_tm_to_data(struct rtc_time *tm, u8 *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) struct da9063_compatible_rtc *rtc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) const struct da9063_compatible_rtc_regmap *config = rtc->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) data[RTC_SEC] = tm->tm_sec & config->rtc_count_sec_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) data[RTC_MIN] = tm->tm_min & config->rtc_count_min_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) data[RTC_HOUR] = tm->tm_hour & config->rtc_count_hour_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) data[RTC_DAY] = tm->tm_mday & config->rtc_count_day_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) data[RTC_MONTH] = MONTHS_TO_DA9063(tm->tm_mon) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) config->rtc_count_month_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) data[RTC_YEAR] = YEARS_TO_DA9063(tm->tm_year) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) config->rtc_count_year_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static int da9063_rtc_stop_alarm(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) const struct da9063_compatible_rtc_regmap *config = rtc->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return regmap_update_bits(rtc->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) config->rtc_alarm_year_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) config->rtc_alarm_on_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static int da9063_rtc_start_alarm(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) const struct da9063_compatible_rtc_regmap *config = rtc->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return regmap_update_bits(rtc->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) config->rtc_alarm_year_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) config->rtc_alarm_on_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) config->rtc_alarm_on_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static int da9063_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) const struct da9063_compatible_rtc_regmap *config = rtc->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) unsigned long tm_secs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) unsigned long al_secs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) u8 data[RTC_DATA_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) ret = regmap_bulk_read(rtc->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) config->rtc_count_secs_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) data, RTC_DATA_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) dev_err(dev, "Failed to read RTC time data: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) if (!(data[RTC_SEC] & config->rtc_ready_to_read_mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) dev_dbg(dev, "RTC not yet ready to be read by the host\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) da9063_data_to_tm(data, tm, rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) tm_secs = rtc_tm_to_time64(tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) al_secs = rtc_tm_to_time64(&rtc->alarm_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /* handle the rtc synchronisation delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (rtc->rtc_sync == true && al_secs - tm_secs == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) memcpy(tm, &rtc->alarm_time, sizeof(struct rtc_time));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) rtc->rtc_sync = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static int da9063_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) const struct da9063_compatible_rtc_regmap *config = rtc->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) u8 data[RTC_DATA_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) da9063_tm_to_data(tm, data, rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) ret = regmap_bulk_write(rtc->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) config->rtc_count_secs_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) data, RTC_DATA_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) dev_err(dev, "Failed to set RTC time data: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static int da9063_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) const struct da9063_compatible_rtc_regmap *config = rtc->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) u8 data[RTC_DATA_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) data[RTC_SEC] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ret = regmap_bulk_read(rtc->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) config->rtc_alarm_secs_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) &data[config->rtc_data_start],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) config->rtc_alarm_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) da9063_data_to_tm(data, &alrm->time, rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) alrm->enabled = !!(data[RTC_YEAR] & config->rtc_alarm_on_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) ret = regmap_read(rtc->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) config->rtc_event_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) if (val & config->rtc_event_alarm_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) alrm->pending = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) alrm->pending = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static int da9063_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) const struct da9063_compatible_rtc_regmap *config = rtc->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) u8 data[RTC_DATA_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) da9063_tm_to_data(&alrm->time, data, rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) ret = da9063_rtc_stop_alarm(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) dev_err(dev, "Failed to stop alarm: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) ret = regmap_bulk_write(rtc->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) config->rtc_alarm_secs_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) &data[config->rtc_data_start],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) config->rtc_alarm_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) dev_err(dev, "Failed to write alarm: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) da9063_data_to_tm(data, &rtc->alarm_time, rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (alrm->enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) ret = da9063_rtc_start_alarm(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) dev_err(dev, "Failed to start alarm: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) static int da9063_rtc_alarm_irq_enable(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if (enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) return da9063_rtc_start_alarm(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) return da9063_rtc_stop_alarm(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) static irqreturn_t da9063_alarm_event(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) struct da9063_compatible_rtc *rtc = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) const struct da9063_compatible_rtc_regmap *config = rtc->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) regmap_update_bits(rtc->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) config->rtc_alarm_year_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) config->rtc_alarm_on_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) rtc->rtc_sync = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) static const struct rtc_class_ops da9063_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .read_time = da9063_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .set_time = da9063_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .read_alarm = da9063_rtc_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .set_alarm = da9063_rtc_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .alarm_irq_enable = da9063_rtc_alarm_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) static int da9063_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) struct da9063_compatible_rtc *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) const struct da9063_compatible_rtc_regmap *config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) const struct of_device_id *match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) int irq_alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) u8 data[RTC_DATA_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (!pdev->dev.of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) match = of_match_node(da9063_compatible_reg_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) pdev->dev.of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (!rtc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) rtc->config = match->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) if (of_device_is_compatible(pdev->dev.of_node, "dlg,da9063-rtc")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) struct da9063 *chip = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) if (chip->variant_code == PMIC_DA9063_AD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) rtc->config = &da9063_ad_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) rtc->regmap = dev_get_regmap(pdev->dev.parent, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) if (!rtc->regmap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) dev_warn(&pdev->dev, "Parent regmap unavailable.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) config = rtc->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) ret = regmap_update_bits(rtc->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) config->rtc_enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) config->rtc_enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) config->rtc_enable_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) dev_err(&pdev->dev, "Failed to enable RTC\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) ret = regmap_update_bits(rtc->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) config->rtc_enable_32k_crystal_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) config->rtc_crystal_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) config->rtc_crystal_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) dev_err(&pdev->dev, "Failed to run 32kHz oscillator\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) ret = regmap_update_bits(rtc->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) config->rtc_alarm_secs_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) config->rtc_alarm_status_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) dev_err(&pdev->dev, "Failed to access RTC alarm register\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) ret = regmap_update_bits(rtc->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) config->rtc_alarm_secs_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) DA9063_ALARM_STATUS_ALARM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) DA9063_ALARM_STATUS_ALARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) dev_err(&pdev->dev, "Failed to access RTC alarm register\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) ret = regmap_update_bits(rtc->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) config->rtc_alarm_year_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) config->rtc_tick_on_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) dev_err(&pdev->dev, "Failed to disable TICKs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) data[RTC_SEC] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) ret = regmap_bulk_read(rtc->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) config->rtc_alarm_secs_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) &data[config->rtc_data_start],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) config->rtc_alarm_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) dev_err(&pdev->dev, "Failed to read initial alarm data: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) platform_set_drvdata(pdev, rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) if (IS_ERR(rtc->rtc_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return PTR_ERR(rtc->rtc_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) rtc->rtc_dev->ops = &da9063_rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) rtc->rtc_dev->range_min = RTC_TIMESTAMP_BEGIN_2000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) rtc->rtc_dev->range_max = RTC_TIMESTAMP_END_2063;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) da9063_data_to_tm(data, &rtc->alarm_time, rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) rtc->rtc_sync = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) * TODO: some models have alarms on a minute boundary but still support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) * real hardware interrupts. Add this once the core supports it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) if (config->rtc_data_start != RTC_SEC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) rtc->rtc_dev->uie_unsupported = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) irq_alarm = platform_get_irq_byname(pdev, "ALARM");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (irq_alarm < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) return irq_alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) ret = devm_request_threaded_irq(&pdev->dev, irq_alarm, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) da9063_alarm_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) IRQF_TRIGGER_LOW | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) "ALARM", rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) dev_err(&pdev->dev, "Failed to request ALARM IRQ %d: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) irq_alarm, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return rtc_register_device(rtc->rtc_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) static struct platform_driver da9063_rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) .probe = da9063_rtc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) .name = DA9063_DRVNAME_RTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) .of_match_table = da9063_compatible_reg_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) module_platform_driver(da9063_rtc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) MODULE_AUTHOR("S Twiss <stwiss.opensource@diasemi.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) MODULE_DESCRIPTION("Real time clock device driver for Dialog DA9063");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) MODULE_ALIAS("platform:" DA9063_DRVNAME_RTC);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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