^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * RTC class driver for "CMOS RTC": PCs, ACPI, etc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2006 David Brownell (convert to new framework)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * The original "cmos clock" chip was an MC146818 chip, now obsolete.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * That defined the register interface now provided by all PCs, some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * non-PC systems, and incorporated into ACPI. Modern PC chipsets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * integrate an MC146818 clone in their southbridge, and boards use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * that instead of discrete clones like the DS12887 or M48T86. There
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * are also clones that connect using the LPC bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * That register API is also used directly by various other drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * (notably for integrated NVRAM), infrastructure (x86 has code to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * bypass the RTC framework, directly reading the RTC during boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * and updating minutes/seconds for systems using NTP synch) and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * utilities (like userspace 'hwclock', if no /dev node exists).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * interrupts disabled, holding the global rtc_lock, to exclude those
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * other drivers and utilities on correctly configured systems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/log2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #ifdef CONFIG_X86
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <asm/i8259.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <linux/dmi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <linux/mc146818rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #ifdef CONFIG_ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * If cleared, ACPI SCI is only used to wake up the system from suspend
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static bool use_acpi_alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) module_param(use_acpi_alarm, bool, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static inline int cmos_use_acpi_alarm(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return use_acpi_alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #else /* !CONFIG_ACPI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static inline int cmos_use_acpi_alarm(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct cmos_rtc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct resource *iomem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) time64_t alarm_expires;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) void (*wake_on)(struct device *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) void (*wake_off)(struct device *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) u8 enabled_wake;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) u8 suspend_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* newer hardware extends the original register set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) u8 day_alrm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) u8 mon_alrm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) u8 century;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct rtc_wkalrm saved_wkalrm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* both platform and pnp busses use negative numbers for invalid irqs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define is_valid_irq(n) ((n) > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static const char driver_name[] = "rtc_cmos";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * always mask it against the irq enable bits in RTC_CONTROL. Bit values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static inline int is_intr(u8 rtc_intr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (!(rtc_intr & RTC_IRQF))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return rtc_intr & RTC_IRQMASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /*----------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * used in a broken "legacy replacement" mode. The breakage includes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * other (better) use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * When that broken mode is in use, platform glue provides a partial
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * emulation of hardware RTC IRQ facilities using HPET #1. We don't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * want to use HPET for anything except those IRQs though...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #ifdef CONFIG_HPET_EMULATE_RTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #include <asm/hpet.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static inline int is_hpet_enabled(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static inline int hpet_set_rtc_irq_bit(unsigned long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static inline int hpet_set_periodic_freq(unsigned long freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static inline int hpet_rtc_dropped_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static inline int hpet_rtc_timer_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) extern irq_handler_t hpet_rtc_interrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static inline int hpet_register_irq_handler(irq_handler_t handler)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static inline int hpet_unregister_irq_handler(irq_handler_t handler)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static inline int use_hpet_alarm(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return is_hpet_enabled() && !cmos_use_acpi_alarm();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /*----------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #ifdef RTC_PORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* Most newer x86 systems have two register banks, the first used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * for RTC and NVRAM and the second only for NVRAM. Caller must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * own rtc_lock ... and we won't worry about access during NMI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define can_bank2 true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static inline unsigned char cmos_read_bank2(unsigned char addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) outb(addr, RTC_PORT(2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return inb(RTC_PORT(3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) outb(addr, RTC_PORT(2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) outb(val, RTC_PORT(3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define can_bank2 false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static inline unsigned char cmos_read_bank2(unsigned char addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /*----------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static int cmos_read_time(struct device *dev, struct rtc_time *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * If pm_trace abused the RTC for storage, set the timespec to 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) * which tells the caller that this RTC value is unusable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (!pm_trace_rtc_valid())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /* REVISIT: if the clock has a "century" register, use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * that instead of the heuristic in mc146818_get_time().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * That'll make Y3K compatility (year > 2070) easy!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) mc146818_get_time(t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static int cmos_set_time(struct device *dev, struct rtc_time *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) /* REVISIT: set the "century" register if available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) * NOTE: this ignores the issue whereby updating the seconds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) * takes effect exactly 500ms after we write the register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * (Also queueing and other delays before we get this far.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return mc146818_set_time(t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) struct cmos_rtc *cmos = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) unsigned char rtc_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /* This not only a rtc_op, but also called directly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (!is_valid_irq(cmos->irq))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* Basic alarms only support hour, minute, and seconds fields.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) * Some also support day and month, for alarms up to a year in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) * the future.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) spin_lock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (cmos->day_alrm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /* ignore upper bits on readback per ACPI spec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) if (!t->time.tm_mday)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) t->time.tm_mday = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) if (cmos->mon_alrm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (!t->time.tm_mon)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) t->time.tm_mon = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) rtc_control = CMOS_READ(RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) spin_unlock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (((unsigned)t->time.tm_sec) < 0x60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) t->time.tm_sec = bcd2bin(t->time.tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) t->time.tm_sec = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (((unsigned)t->time.tm_min) < 0x60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) t->time.tm_min = bcd2bin(t->time.tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) t->time.tm_min = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (((unsigned)t->time.tm_hour) < 0x24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) t->time.tm_hour = bcd2bin(t->time.tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) t->time.tm_hour = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (cmos->day_alrm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) if (((unsigned)t->time.tm_mday) <= 0x31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) t->time.tm_mday = bcd2bin(t->time.tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) t->time.tm_mday = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) if (cmos->mon_alrm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) if (((unsigned)t->time.tm_mon) <= 0x12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) t->time.tm_mon = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) t->enabled = !!(rtc_control & RTC_AIE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) t->pending = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) unsigned char rtc_intr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) * allegedly some older rtcs need that to handle irqs properly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (use_hpet_alarm())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (is_intr(rtc_intr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) rtc_update_irq(cmos->rtc, 1, rtc_intr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) unsigned char rtc_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) /* flush any pending IRQ status, notably for update irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) * before we enable new IRQs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) rtc_control = CMOS_READ(RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) cmos_checkintr(cmos, rtc_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) rtc_control |= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) CMOS_WRITE(rtc_control, RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (use_hpet_alarm())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) hpet_set_rtc_irq_bit(mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) if (cmos->wake_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) cmos->wake_on(cmos->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) cmos_checkintr(cmos, rtc_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) unsigned char rtc_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) rtc_control = CMOS_READ(RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) rtc_control &= ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) CMOS_WRITE(rtc_control, RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) if (use_hpet_alarm())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) hpet_mask_rtc_irq_bit(mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (cmos->wake_off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) cmos->wake_off(cmos->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) cmos_checkintr(cmos, rtc_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) struct cmos_rtc *cmos = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) struct rtc_time now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) cmos_read_time(dev, &now);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (!cmos->day_alrm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) time64_t t_max_date;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) time64_t t_alrm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) t_max_date = rtc_tm_to_time64(&now);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) t_max_date += 24 * 60 * 60 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) t_alrm = rtc_tm_to_time64(&t->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) if (t_alrm > t_max_date) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) "Alarms can be up to one day in the future\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) } else if (!cmos->mon_alrm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) struct rtc_time max_date = now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) time64_t t_max_date;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) time64_t t_alrm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) int max_mday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) if (max_date.tm_mon == 11) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) max_date.tm_mon = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) max_date.tm_year += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) max_date.tm_mon += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (max_date.tm_mday > max_mday)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) max_date.tm_mday = max_mday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) t_max_date = rtc_tm_to_time64(&max_date);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) t_max_date -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) t_alrm = rtc_tm_to_time64(&t->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if (t_alrm > t_max_date) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) "Alarms can be up to one month in the future\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) struct rtc_time max_date = now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) time64_t t_max_date;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) time64_t t_alrm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) int max_mday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) max_date.tm_year += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) if (max_date.tm_mday > max_mday)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) max_date.tm_mday = max_mday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) t_max_date = rtc_tm_to_time64(&max_date);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) t_max_date -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) t_alrm = rtc_tm_to_time64(&t->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) if (t_alrm > t_max_date) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) "Alarms can be up to one year in the future\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) struct cmos_rtc *cmos = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) unsigned char mon, mday, hrs, min, sec, rtc_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) /* This not only a rtc_op, but also called directly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) if (!is_valid_irq(cmos->irq))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) ret = cmos_validate_alarm(dev, t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) mon = t->time.tm_mon + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) mday = t->time.tm_mday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) hrs = t->time.tm_hour;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) min = t->time.tm_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) sec = t->time.tm_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) spin_lock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) rtc_control = CMOS_READ(RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) spin_unlock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) /* Writing 0xff means "don't care" or "match all". */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) min = (min < 60) ? bin2bcd(min) : 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) sec = (sec < 60) ? bin2bcd(sec) : 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) spin_lock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) /* next rtc irq must not be from previous alarm setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) cmos_irq_disable(cmos, RTC_AIE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) /* update alarm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) CMOS_WRITE(hrs, RTC_HOURS_ALARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) CMOS_WRITE(min, RTC_MINUTES_ALARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) CMOS_WRITE(sec, RTC_SECONDS_ALARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) /* the system may support an "enhanced" alarm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) if (cmos->day_alrm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) CMOS_WRITE(mday, cmos->day_alrm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) if (cmos->mon_alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) CMOS_WRITE(mon, cmos->mon_alrm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) if (use_hpet_alarm()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) * FIXME the HPET alarm glue currently ignores day_alrm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) * and mon_alrm ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) t->time.tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) if (t->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) cmos_irq_enable(cmos, RTC_AIE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) spin_unlock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) cmos->alarm_expires = rtc_tm_to_time64(&t->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) struct cmos_rtc *cmos = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) spin_lock_irqsave(&rtc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) if (enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) cmos_irq_enable(cmos, RTC_AIE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) cmos_irq_disable(cmos, RTC_AIE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) spin_unlock_irqrestore(&rtc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) static int cmos_procfs(struct device *dev, struct seq_file *seq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) struct cmos_rtc *cmos = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) unsigned char rtc_control, valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) spin_lock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) rtc_control = CMOS_READ(RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) valid = CMOS_READ(RTC_VALID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) spin_unlock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) /* NOTE: at least ICH6 reports battery status using a different
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) * (non-RTC) bit; and SQWE is ignored on many current systems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) seq_printf(seq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) "periodic_IRQ\t: %s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) "update_IRQ\t: %s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) "HPET_emulated\t: %s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) // "square_wave\t: %s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) "BCD\t\t: %s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) "DST_enable\t: %s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) "periodic_freq\t: %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) "batt_status\t: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) (rtc_control & RTC_PIE) ? "yes" : "no",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) (rtc_control & RTC_UIE) ? "yes" : "no",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) use_hpet_alarm() ? "yes" : "no",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) // (rtc_control & RTC_SQWE) ? "yes" : "no",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) (rtc_control & RTC_DST_EN) ? "yes" : "no",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) cmos->rtc->irq_freq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) (valid & RTC_VRT) ? "okay" : "dead");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) #define cmos_procfs NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) static const struct rtc_class_ops cmos_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) .read_time = cmos_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) .set_time = cmos_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) .read_alarm = cmos_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) .set_alarm = cmos_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) .proc = cmos_procfs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) .alarm_irq_enable = cmos_alarm_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) static const struct rtc_class_ops cmos_rtc_ops_no_alarm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) .read_time = cmos_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) .set_time = cmos_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) .proc = cmos_procfs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) /*----------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) * All these chips have at least 64 bytes of address space, shared by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) * RTC registers and NVRAM. Most of those bytes of NVRAM are used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) * by boot firmware. Modern chips have 128 or 256 bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) #define NVRAM_OFFSET (RTC_REG_D + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) static int cmos_nvram_read(void *priv, unsigned int off, void *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) unsigned char *buf = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) off += NVRAM_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) spin_lock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) for (retval = 0; count; count--, off++, retval++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) if (off < 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) *buf++ = CMOS_READ(off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) else if (can_bank2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) *buf++ = cmos_read_bank2(off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) spin_unlock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) static int cmos_nvram_write(void *priv, unsigned int off, void *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) struct cmos_rtc *cmos = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) unsigned char *buf = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) /* NOTE: on at least PCs and Ataris, the boot firmware uses a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) * checksum on part of the NVRAM data. That's currently ignored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) * here. If userspace is smart enough to know what fields of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) * NVRAM to update, updating checksums is also part of its job.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) off += NVRAM_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) spin_lock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) for (retval = 0; count; count--, off++, retval++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) /* don't trash RTC registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) if (off == cmos->day_alrm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) || off == cmos->mon_alrm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) || off == cmos->century)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) buf++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) else if (off < 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) CMOS_WRITE(*buf++, off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) else if (can_bank2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) cmos_write_bank2(*buf++, off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) spin_unlock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) /*----------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) static struct cmos_rtc cmos_rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) static irqreturn_t cmos_interrupt(int irq, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) u8 irqstat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) u8 rtc_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) spin_lock_irqsave(&rtc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) /* When the HPET interrupt handler calls us, the interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) * status is passed as arg1 instead of the irq number. But
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) * always clear irq status, even when HPET is in the way.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) * Note that HPET and RTC are almost certainly out of phase,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) * giving different IRQ status ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) irqstat = CMOS_READ(RTC_INTR_FLAGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) rtc_control = CMOS_READ(RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) if (use_hpet_alarm())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) irqstat = (unsigned long)irq & 0xF0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) /* If we were suspended, RTC_CONTROL may not be accurate since the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) * bios may have cleared it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) if (!cmos_rtc.suspend_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) /* All Linux RTC alarms should be treated as if they were oneshot.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) * Similar code may be needed in system wakeup paths, in case the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) * alarm woke the system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) if (irqstat & RTC_AIE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) cmos_rtc.suspend_ctrl &= ~RTC_AIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) rtc_control &= ~RTC_AIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) CMOS_WRITE(rtc_control, RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) if (use_hpet_alarm())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) hpet_mask_rtc_irq_bit(RTC_AIE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) CMOS_READ(RTC_INTR_FLAGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) spin_unlock_irqrestore(&rtc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) if (is_intr(irqstat)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) rtc_update_irq(p, 1, irqstat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) #ifdef CONFIG_PNP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) #define INITSECTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) #define INITSECTION __init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) static int INITSECTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) struct cmos_rtc_board_info *info = dev_get_platdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) unsigned char rtc_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) unsigned address_space;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) u32 flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) struct nvmem_config nvmem_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) .name = "cmos_nvram",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) .word_size = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) .stride = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) .reg_read = cmos_nvram_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) .reg_write = cmos_nvram_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) .priv = &cmos_rtc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) /* there can be only one ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) if (cmos_rtc.dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) if (!ports)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) * REVISIT non-x86 systems may instead use memory space resources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) * (needing ioremap etc), not i/o space resources like this ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) if (RTC_IOMAPPED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) ports = request_region(ports->start, resource_size(ports),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) driver_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) ports = request_mem_region(ports->start, resource_size(ports),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) driver_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) if (!ports) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) dev_dbg(dev, "i/o registers already in use\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) cmos_rtc.irq = rtc_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) cmos_rtc.iomem = ports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) * driver did, but don't reject unknown configs. Old hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) * won't address 128 bytes. Newer chips have multiple banks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) * though they may not be listed in one I/O resource.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) #if defined(CONFIG_ATARI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) address_space = 64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) || defined(__sparc__) || defined(__mips__) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) || defined(__powerpc__)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) address_space = 128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) address_space = 128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) if (can_bank2 && ports->end > (ports->start + 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) address_space = 256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) /* For ACPI systems extension info comes from the FADT. On others,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) * board specific setup provides it as appropriate. Systems where
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) * some almost-clones) can provide hooks to make that behave.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) * Note that ACPI doesn't preclude putting these registers into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) * "extended" areas of the chip, including some that we won't yet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) * expect CMOS_READ and friends to handle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) if (info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) if (info->flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) flags = info->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) if (info->address_space)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) address_space = info->address_space;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) cmos_rtc.day_alrm = info->rtc_day_alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) cmos_rtc.mon_alrm = info->rtc_mon_alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) if (info->rtc_century && info->rtc_century < 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) cmos_rtc.century = info->rtc_century;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) if (info->wake_on && info->wake_off) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) cmos_rtc.wake_on = info->wake_on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) cmos_rtc.wake_off = info->wake_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) cmos_rtc.dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) dev_set_drvdata(dev, &cmos_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) cmos_rtc.rtc = devm_rtc_allocate_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) if (IS_ERR(cmos_rtc.rtc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) retval = PTR_ERR(cmos_rtc.rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) goto cleanup0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) spin_lock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) /* force periodic irq to CMOS reset default of 1024Hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) * REVISIT it's been reported that at least one x86_64 ALI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) * mobo doesn't use 32KHz here ... for portability we might
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) * need to do something about other clock frequencies.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) cmos_rtc.rtc->irq_freq = 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) if (use_hpet_alarm())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) /* disable irqs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) if (is_valid_irq(rtc_irq))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) rtc_control = CMOS_READ(RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) spin_unlock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) dev_warn(dev, "only 24-hr supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) retval = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) goto cleanup1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) if (use_hpet_alarm())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) hpet_rtc_timer_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) if (is_valid_irq(rtc_irq)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) irq_handler_t rtc_cmos_int_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) if (use_hpet_alarm()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) rtc_cmos_int_handler = hpet_rtc_interrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) retval = hpet_register_irq_handler(cmos_interrupt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) hpet_mask_rtc_irq_bit(RTC_IRQMASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) dev_warn(dev, "hpet_register_irq_handler "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) " failed in rtc_init().");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) goto cleanup1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) rtc_cmos_int_handler = cmos_interrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) retval = request_irq(rtc_irq, rtc_cmos_int_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) 0, dev_name(&cmos_rtc.rtc->dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) cmos_rtc.rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) if (retval < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) goto cleanup1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) cmos_rtc.rtc->ops = &cmos_rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) cmos_rtc.rtc->ops = &cmos_rtc_ops_no_alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) cmos_rtc.rtc->nvram_old_abi = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) retval = rtc_register_device(cmos_rtc.rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) goto cleanup2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) /* export at least the first block of NVRAM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) nvmem_cfg.size = address_space - NVRAM_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) if (rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) dev_err(dev, "nvmem registration failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) dev_info(dev, "%s%s, %d bytes nvram%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) !is_valid_irq(rtc_irq) ? "no alarms" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) cmos_rtc.mon_alrm ? "alarms up to one year" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) cmos_rtc.day_alrm ? "alarms up to one month" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) "alarms up to one day",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) cmos_rtc.century ? ", y3k" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) nvmem_cfg.size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) use_hpet_alarm() ? ", hpet irqs" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) cleanup2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) if (is_valid_irq(rtc_irq))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) free_irq(rtc_irq, cmos_rtc.rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) cleanup1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) cmos_rtc.dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) cleanup0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) if (RTC_IOMAPPED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) release_region(ports->start, resource_size(ports));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) release_mem_region(ports->start, resource_size(ports));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) static void cmos_do_shutdown(int rtc_irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) spin_lock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) if (is_valid_irq(rtc_irq))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) spin_unlock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) static void cmos_do_remove(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) struct cmos_rtc *cmos = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) struct resource *ports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) cmos_do_shutdown(cmos->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) if (is_valid_irq(cmos->irq)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) free_irq(cmos->irq, cmos->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) if (use_hpet_alarm())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) hpet_unregister_irq_handler(cmos_interrupt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) cmos->rtc = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) ports = cmos->iomem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) if (RTC_IOMAPPED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) release_region(ports->start, resource_size(ports));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) release_mem_region(ports->start, resource_size(ports));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) cmos->iomem = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) cmos->dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) static int cmos_aie_poweroff(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) struct cmos_rtc *cmos = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) struct rtc_time now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) time64_t t_now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) unsigned char rtc_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) if (!cmos->alarm_expires)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) spin_lock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) rtc_control = CMOS_READ(RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) spin_unlock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) /* We only care about the situation where AIE is disabled. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) if (rtc_control & RTC_AIE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) cmos_read_time(dev, &now);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) t_now = rtc_tm_to_time64(&now);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) * When enabling "RTC wake-up" in BIOS setup, the machine reboots
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) * automatically right after shutdown on some buggy boxes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) * This automatic rebooting issue won't happen when the alarm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) * time is larger than now+1 seconds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) * If the alarm time is equal to now+1 seconds, the issue can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) * prevented by cancelling the alarm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) if (cmos->alarm_expires == t_now + 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) struct rtc_wkalrm alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) /* Cancel the AIE timer by configuring the past time. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) rtc_time64_to_tm(t_now - 1, &alarm.time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) alarm.enabled = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) retval = cmos_set_alarm(dev, &alarm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) } else if (cmos->alarm_expires > t_now + 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) retval = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) static int cmos_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) struct cmos_rtc *cmos = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) unsigned char tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) /* only the alarm might be a wakeup event source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) spin_lock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) unsigned char mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) mask = RTC_IRQMASK & ~RTC_AIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) mask = RTC_IRQMASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) tmp &= ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) CMOS_WRITE(tmp, RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) if (use_hpet_alarm())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) hpet_mask_rtc_irq_bit(mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) cmos_checkintr(cmos, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) spin_unlock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) cmos->enabled_wake = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) if (cmos->wake_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) cmos->wake_on(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) enable_irq_wake(cmos->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) cmos_read_alarm(dev, &cmos->saved_wkalrm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) dev_dbg(dev, "suspend%s, ctrl %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) (tmp & RTC_AIE) ? ", alarm may wake" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) * after a detour through G3 "mechanical off", although the ACPI spec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) * says wakeup should only work from G1/S4 "hibernate". To most users,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) * distinctions between S4 and S5 are pointless. So when the hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) * allows, don't draw that distinction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) static inline int cmos_poweroff(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) if (!IS_ENABLED(CONFIG_PM))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) return cmos_suspend(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) static void cmos_check_wkalrm(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) struct cmos_rtc *cmos = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) struct rtc_wkalrm current_alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) time64_t t_now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) time64_t t_current_expires;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) time64_t t_saved_expires;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) struct rtc_time now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) /* Check if we have RTC Alarm armed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) if (!(cmos->suspend_ctrl & RTC_AIE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) cmos_read_time(dev, &now);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) t_now = rtc_tm_to_time64(&now);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) * ACPI RTC wake event is cleared after resume from STR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) * ACK the rtc irq here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) cmos_interrupt(0, (void *)cmos->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) memset(¤t_alarm, 0, sizeof(struct rtc_wkalrm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) cmos_read_alarm(dev, ¤t_alarm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) t_current_expires = rtc_tm_to_time64(¤t_alarm.time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) if (t_current_expires != t_saved_expires ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) cmos->saved_wkalrm.enabled != current_alarm.enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) cmos_set_alarm(dev, &cmos->saved_wkalrm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) static void cmos_check_acpi_rtc_status(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) unsigned char *rtc_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) static int __maybe_unused cmos_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) struct cmos_rtc *cmos = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) unsigned char tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) if (cmos->enabled_wake && !cmos_use_acpi_alarm()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) if (cmos->wake_off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) cmos->wake_off(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) disable_irq_wake(cmos->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) cmos->enabled_wake = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) /* The BIOS might have changed the alarm, restore it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) cmos_check_wkalrm(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) spin_lock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) tmp = cmos->suspend_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) cmos->suspend_ctrl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) /* re-enable any irqs previously active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) if (tmp & RTC_IRQMASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) unsigned char mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) if (device_may_wakeup(dev) && use_hpet_alarm())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) hpet_rtc_timer_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) CMOS_WRITE(tmp, RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) if (use_hpet_alarm())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) mask = CMOS_READ(RTC_INTR_FLAGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) if (!use_hpet_alarm() || !is_intr(mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) /* force one-shot behavior if HPET blocked
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) * the wake alarm's irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) rtc_update_irq(cmos->rtc, 1, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) tmp &= ~RTC_AIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) hpet_mask_rtc_irq_bit(RTC_AIE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) } while (mask & RTC_AIE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) if (tmp & RTC_AIE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) cmos_check_acpi_rtc_status(dev, &tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) spin_unlock_irq(&rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) dev_dbg(dev, "resume, ctrl %02x\n", tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) /*----------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) * probably list them in similar PNPBIOS tables; so PNP is more common.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) * We don't use legacy "poke at the hardware" probing. Ancient PCs that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) * predate even PNPBIOS should set up platform_bus devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) #ifdef CONFIG_ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) static u32 rtc_handler(void *context)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) struct device *dev = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) struct cmos_rtc *cmos = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) unsigned char rtc_control = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) unsigned char rtc_intr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) * Always update rtc irq when ACPI is used as RTC Alarm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) * Or else, ACPI SCI is enabled during suspend/resume only,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) * update rtc irq in that case.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) if (cmos_use_acpi_alarm())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) cmos_interrupt(0, (void *)cmos->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) /* Fix me: can we use cmos_interrupt() here as well? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) spin_lock_irqsave(&rtc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) if (cmos_rtc.suspend_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) rtc_control = CMOS_READ(RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) if (rtc_control & RTC_AIE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) cmos_rtc.suspend_ctrl &= ~RTC_AIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) CMOS_WRITE(rtc_control, RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) rtc_update_irq(cmos->rtc, 1, rtc_intr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) spin_unlock_irqrestore(&rtc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) pm_wakeup_hard_event(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) acpi_clear_event(ACPI_EVENT_RTC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) acpi_disable_event(ACPI_EVENT_RTC, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) return ACPI_INTERRUPT_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) static inline void rtc_wake_setup(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) * After the RTC handler is installed, the Fixed_RTC event should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) * be disabled. Only when the RTC alarm is set will it be enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) acpi_clear_event(ACPI_EVENT_RTC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) acpi_disable_event(ACPI_EVENT_RTC, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) static void rtc_wake_on(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) acpi_clear_event(ACPI_EVENT_RTC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) acpi_enable_event(ACPI_EVENT_RTC, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) static void rtc_wake_off(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) acpi_disable_event(ACPI_EVENT_RTC, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) #ifdef CONFIG_X86
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) /* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) static void use_acpi_alarm_quirks(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) if (!is_hpet_enabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) if (dmi_get_bios_year() < 2015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) use_acpi_alarm = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) static inline void use_acpi_alarm_quirks(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) * its device node and pass extra config data. This helps its driver use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) * capabilities that the now-obsolete mc146818 didn't have, and informs it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) * that this board's RTC is wakeup-capable (per ACPI spec).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) static struct cmos_rtc_board_info acpi_rtc_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) static void cmos_wake_setup(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) if (acpi_disabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) use_acpi_alarm_quirks();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) rtc_wake_setup(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) acpi_rtc_info.wake_on = rtc_wake_on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) acpi_rtc_info.wake_off = rtc_wake_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) /* workaround bug in some ACPI tables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) acpi_gbl_FADT.month_alarm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) acpi_gbl_FADT.month_alarm = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) dev_info(dev, "RTC can wake from S4\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) dev->platform_data = &acpi_rtc_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) /* RTC always wakes from S1/S2/S3, and often S4/STD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) device_init_wakeup(dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) static void cmos_check_acpi_rtc_status(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) unsigned char *rtc_control)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) struct cmos_rtc *cmos = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) acpi_event_status rtc_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) acpi_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) if (ACPI_FAILURE(status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) dev_err(dev, "Could not get RTC status\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) unsigned char mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) *rtc_control &= ~RTC_AIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) CMOS_WRITE(*rtc_control, RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) mask = CMOS_READ(RTC_INTR_FLAGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) rtc_update_irq(cmos->rtc, 1, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) static void cmos_wake_setup(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) static void cmos_check_acpi_rtc_status(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) unsigned char *rtc_control)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) #ifdef CONFIG_PNP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) #include <linux/pnp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) cmos_wake_setup(&pnp->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) unsigned int irq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) #ifdef CONFIG_X86
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) /* Some machines contain a PNP entry for the RTC, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) * don't define the IRQ. It should always be safe to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) * hardcode it on systems with a legacy PIC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) if (nr_legacy_irqs())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) irq = RTC_IRQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) return cmos_do_probe(&pnp->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) return cmos_do_probe(&pnp->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) pnp_get_resource(pnp, IORESOURCE_IO, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) pnp_irq(pnp, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) static void cmos_pnp_remove(struct pnp_dev *pnp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) cmos_do_remove(&pnp->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) static void cmos_pnp_shutdown(struct pnp_dev *pnp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) struct device *dev = &pnp->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) struct cmos_rtc *cmos = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) if (system_state == SYSTEM_POWER_OFF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) int retval = cmos_poweroff(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) if (cmos_aie_poweroff(dev) < 0 && !retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) cmos_do_shutdown(cmos->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) static const struct pnp_device_id rtc_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) { .id = "PNP0b00", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) { .id = "PNP0b01", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) { .id = "PNP0b02", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) MODULE_DEVICE_TABLE(pnp, rtc_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) static struct pnp_driver cmos_pnp_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) .name = driver_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) .id_table = rtc_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) .probe = cmos_pnp_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) .remove = cmos_pnp_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) .shutdown = cmos_pnp_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) /* flag ensures resume() gets called, and stops syslog spam */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) .pm = &cmos_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) #endif /* CONFIG_PNP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) static const struct of_device_id of_cmos_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) .compatible = "motorola,mc146818",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) MODULE_DEVICE_TABLE(of, of_cmos_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) static __init void cmos_of_init(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) struct device_node *node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) const __be32 *val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) if (!node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) val = of_get_property(node, "ctrl-reg", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) val = of_get_property(node, "freq-reg", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) static inline void cmos_of_init(struct platform_device *pdev) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) /*----------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) /* Platform setup should have set up an RTC device, when PNP is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) * unavailable ... this could happen even on (older) PCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) static int __init cmos_platform_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) struct resource *resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) cmos_of_init(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) cmos_wake_setup(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) if (RTC_IOMAPPED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) irq = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) return cmos_do_probe(&pdev->dev, resource, irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) static int cmos_platform_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) cmos_do_remove(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) static void cmos_platform_shutdown(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) struct cmos_rtc *cmos = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) if (system_state == SYSTEM_POWER_OFF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) int retval = cmos_poweroff(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) if (cmos_aie_poweroff(dev) < 0 && !retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) cmos_do_shutdown(cmos->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) /* work with hotplug and coldplug */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) MODULE_ALIAS("platform:rtc_cmos");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) static struct platform_driver cmos_platform_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) .remove = cmos_platform_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) .shutdown = cmos_platform_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) .name = driver_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) .pm = &cmos_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) .of_match_table = of_match_ptr(of_cmos_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) #ifdef CONFIG_PNP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) static bool pnp_driver_registered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) static bool platform_driver_registered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) static int __init cmos_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) #ifdef CONFIG_PNP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) retval = pnp_register_driver(&cmos_pnp_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) if (retval == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) pnp_driver_registered = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) if (!cmos_rtc.dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) retval = platform_driver_probe(&cmos_platform_driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) cmos_platform_probe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) if (retval == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) platform_driver_registered = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) if (retval == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) #ifdef CONFIG_PNP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) if (pnp_driver_registered)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) pnp_unregister_driver(&cmos_pnp_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) module_init(cmos_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) static void __exit cmos_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) #ifdef CONFIG_PNP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) if (pnp_driver_registered)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) pnp_unregister_driver(&cmos_pnp_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) if (platform_driver_registered)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) platform_driver_unregister(&cmos_platform_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) module_exit(cmos_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) MODULE_AUTHOR("David Brownell");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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