Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Driver for TI BQ32000 RTC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2009 Semihalf.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 2014 Pavel Machek <pavel@denx.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * You can get hardware description at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * https://www.ti.com/lit/ds/symlink/bq32000.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define BQ32K_SECONDS		0x00	/* Seconds register address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define BQ32K_SECONDS_MASK	0x7F	/* Mask over seconds value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define BQ32K_STOP		0x80	/* Oscillator Stop flat */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define BQ32K_MINUTES		0x01	/* Minutes register address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define BQ32K_MINUTES_MASK	0x7F	/* Mask over minutes value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define BQ32K_OF		0x80	/* Oscillator Failure flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define BQ32K_HOURS_MASK	0x3F	/* Mask over hours value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define BQ32K_CENT		0x40	/* Century flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define BQ32K_CENT_EN		0x80	/* Century flag enable bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define BQ32K_CALIBRATION	0x07	/* CAL_CFG1, calibration and control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define BQ32K_TCH2		0x08	/* Trickle charge enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define BQ32K_CFG2		0x09	/* Trickle charger control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define BQ32K_TCFE		BIT(6)	/* Trickle charge FET bypass */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define MAX_LEN			10	/* Maximum number of consecutive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 					 * register for this particular RTC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 					 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) struct bq32k_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	uint8_t		seconds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	uint8_t		minutes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	uint8_t		cent_hours;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	uint8_t		day;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	uint8_t		date;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	uint8_t		month;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	uint8_t		years;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static struct i2c_driver bq32k_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static int bq32k_read(struct device *dev, void *data, uint8_t off, uint8_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	struct i2c_msg msgs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 			.addr = client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 			.flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 			.len = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 			.buf = &off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 			.addr = client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 			.flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 			.len = len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 			.buf = data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	if (i2c_transfer(client->adapter, msgs, 2) == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) static int bq32k_write(struct device *dev, void *data, uint8_t off, uint8_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	uint8_t buffer[MAX_LEN + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	buffer[0] = off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	memcpy(&buffer[1], data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	if (i2c_master_send(client, buffer, len + 1) == len + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) static int bq32k_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	struct bq32k_regs regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	error = bq32k_read(dev, &regs, 0, sizeof(regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	 * In case of oscillator failure, the register contents should be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	 * considered invalid. The flag is cleared the next time the RTC is set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	if (regs.minutes & BQ32K_OF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	tm->tm_sec = bcd2bin(regs.seconds & BQ32K_SECONDS_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	tm->tm_min = bcd2bin(regs.minutes & BQ32K_MINUTES_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	tm->tm_hour = bcd2bin(regs.cent_hours & BQ32K_HOURS_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	tm->tm_mday = bcd2bin(regs.date);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	tm->tm_wday = bcd2bin(regs.day) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	tm->tm_mon = bcd2bin(regs.month) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	tm->tm_year = bcd2bin(regs.years) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 				((regs.cent_hours & BQ32K_CENT) ? 100 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static int bq32k_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	struct bq32k_regs regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	regs.seconds = bin2bcd(tm->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	regs.minutes = bin2bcd(tm->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	regs.cent_hours = bin2bcd(tm->tm_hour) | BQ32K_CENT_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	regs.day = bin2bcd(tm->tm_wday + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	regs.date = bin2bcd(tm->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	regs.month = bin2bcd(tm->tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	if (tm->tm_year >= 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		regs.cent_hours |= BQ32K_CENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		regs.years = bin2bcd(tm->tm_year - 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		regs.years = bin2bcd(tm->tm_year);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	return bq32k_write(dev, &regs, 0, sizeof(regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static const struct rtc_class_ops bq32k_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	.read_time	= bq32k_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	.set_time	= bq32k_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static int trickle_charger_of_init(struct device *dev, struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	unsigned char reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	u32 ohms = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	if (of_property_read_u32(node, "trickle-resistor-ohms" , &ohms))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	switch (ohms) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	case 180+940:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		 * TCHE[3:0] == 0x05, TCH2 == 1, TCFE == 0 (charging
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		 * over diode and 940ohm resistor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		if (of_property_read_bool(node, "trickle-diode-disable")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 			dev_err(dev, "diode and resistor mismatch\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		reg = 0x05;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	case 180+20000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		/* diode disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		if (!of_property_read_bool(node, "trickle-diode-disable")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 			dev_err(dev, "bq32k: diode and resistor mismatch\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		reg = 0x45;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		dev_err(dev, "invalid resistor value (%d)\n", ohms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	error = bq32k_write(dev, &reg, BQ32K_CFG2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	reg = 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	error = bq32k_write(dev, &reg, BQ32K_TCH2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	dev_info(dev, "Enabled trickle RTC battery charge.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static ssize_t bq32k_sysfs_show_tricklecharge_bypass(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 					       struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 					       char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	int reg, error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	error = bq32k_read(dev, &reg, BQ32K_CFG2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	return sprintf(buf, "%d\n", (reg & BQ32K_TCFE) ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static ssize_t bq32k_sysfs_store_tricklecharge_bypass(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 						struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 						const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	int reg, enable, error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	if (kstrtoint(buf, 0, &enable))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	error = bq32k_read(dev, &reg, BQ32K_CFG2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	if (enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		reg |= BQ32K_TCFE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		error = bq32k_write(dev, &reg, BQ32K_CFG2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 			return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		dev_info(dev, "Enabled trickle charge FET bypass.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		reg &= ~BQ32K_TCFE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		error = bq32k_write(dev, &reg, BQ32K_CFG2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 			return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		dev_info(dev, "Disabled trickle charge FET bypass.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static DEVICE_ATTR(trickle_charge_bypass, 0644,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		   bq32k_sysfs_show_tricklecharge_bypass,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		   bq32k_sysfs_store_tricklecharge_bypass);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int bq32k_sysfs_register(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	return device_create_file(dev, &dev_attr_trickle_charge_bypass);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static void bq32k_sysfs_unregister(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	device_remove_file(dev, &dev_attr_trickle_charge_bypass);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static int bq32k_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 				const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	uint8_t reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	/* Check Oscillator Stop flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	error = bq32k_read(dev, &reg, BQ32K_SECONDS, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	if (!error && (reg & BQ32K_STOP)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		dev_warn(dev, "Oscillator was halted. Restarting...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		reg &= ~BQ32K_STOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		error = bq32k_write(dev, &reg, BQ32K_SECONDS, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	/* Check Oscillator Failure flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	error = bq32k_read(dev, &reg, BQ32K_MINUTES, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	if (reg & BQ32K_OF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		dev_warn(dev, "Oscillator Failure. Check RTC battery.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	if (client->dev.of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		trickle_charger_of_init(dev, client->dev.of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	rtc = devm_rtc_device_register(&client->dev, bq32k_driver.driver.name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 						&bq32k_rtc_ops, THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	if (IS_ERR(rtc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		return PTR_ERR(rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	error = bq32k_sysfs_register(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 			"Unable to create sysfs entries for rtc bq32000\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	i2c_set_clientdata(client, rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static int bq32k_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	bq32k_sysfs_unregister(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static const struct i2c_device_id bq32k_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	{ "bq32000", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) MODULE_DEVICE_TABLE(i2c, bq32k_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static const struct of_device_id bq32k_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	{ .compatible = "ti,bq32000" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) MODULE_DEVICE_TABLE(of, bq32k_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static struct i2c_driver bq32k_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		.name	= "bq32k",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		.of_match_table = of_match_ptr(bq32k_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	.probe		= bq32k_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	.remove		= bq32k_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	.id_table	= bq32k_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) module_i2c_driver(bq32k_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) MODULE_AUTHOR("Semihalf, Piotr Ziecik <kosmo@semihalf.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) MODULE_DESCRIPTION("TI BQ32000 I2C RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) MODULE_LICENSE("GPL");