^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Copyright (C) 2018 ROHM Semiconductors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // RTC driver for ROHM BD70528 PMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/mfd/rohm-bd70528.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/mfd/rohm-bd71828.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * We read regs RTC_SEC => RTC_YEAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * this struct is ordered according to chip registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Keep it u8 only (or packed) to avoid padding issues.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct bd70528_rtc_day {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) u8 sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) u8 min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) u8 hour;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct bd70528_rtc_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct bd70528_rtc_day time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) u8 week;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u8 day;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u8 month;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u8 year;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct bd70528_rtc_wake {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct bd70528_rtc_day time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u8 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct bd71828_rtc_alm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct bd70528_rtc_data alm0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct bd70528_rtc_data alm1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) u8 alm_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) u8 alm1_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct bd70528_rtc_alm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct bd70528_rtc_data data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) u8 alm_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u8 alm_repeat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct bd70528_rtc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct rohm_regmap_dev *parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) u8 reg_time_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) bool has_rtc_timers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static int bd70528_set_wake(struct rohm_regmap_dev *bd70528,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int enable, int *old_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned int ctrl_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) ret = regmap_read(bd70528->regmap, BD70528_REG_WAKE_EN, &ctrl_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (old_state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (ctrl_reg & BD70528_MASK_WAKE_EN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) *old_state |= BD70528_WAKE_STATE_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) *old_state &= ~BD70528_WAKE_STATE_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (!enable == !(*old_state & BD70528_WAKE_STATE_BIT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ctrl_reg |= BD70528_MASK_WAKE_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ctrl_reg &= ~BD70528_MASK_WAKE_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return regmap_write(bd70528->regmap, BD70528_REG_WAKE_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) ctrl_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static int bd70528_set_elapsed_tmr(struct rohm_regmap_dev *bd70528,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) int enable, int *old_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) unsigned int ctrl_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * TBD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * What is the purpose of elapsed timer ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * Is the timeout registers counting down, or is the disable - re-enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * going to restart the elapsed-time counting? If counting is restarted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * the timeout should be decreased by the amount of time that has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * elapsed since starting the timer. Maybe we should store the monotonic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * clock value when timer is started so that if RTC is set while timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * is armed we could do the compensation. This is a hack if RTC/system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * clk are drifting. OTOH, RTC controlled via I2C is in any case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * inaccurate...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ret = regmap_read(bd70528->regmap, BD70528_REG_ELAPSED_TIMER_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) &ctrl_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (old_state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (ctrl_reg & BD70528_MASK_ELAPSED_TIMER_EN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) *old_state |= BD70528_ELAPSED_STATE_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) *old_state &= ~BD70528_ELAPSED_STATE_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if ((!enable) == (!(*old_state & BD70528_ELAPSED_STATE_BIT)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ctrl_reg |= BD70528_MASK_ELAPSED_TIMER_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) ctrl_reg &= ~BD70528_MASK_ELAPSED_TIMER_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return regmap_write(bd70528->regmap, BD70528_REG_ELAPSED_TIMER_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) ctrl_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static int bd70528_set_rtc_based_timers(struct bd70528_rtc *r, int new_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) int *old_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ret = bd70528_wdt_set(r->parent, new_state & BD70528_WDT_STATE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) old_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) dev_err(r->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) "Failed to disable WDG for RTC setting (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) ret = bd70528_set_elapsed_tmr(r->parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) new_state & BD70528_ELAPSED_STATE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) old_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) dev_err(r->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) "Failed to disable 'elapsed timer' for RTC setting\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) ret = bd70528_set_wake(r->parent, new_state & BD70528_WAKE_STATE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) old_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) dev_err(r->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) "Failed to disable 'wake timer' for RTC setting\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static int bd70528_re_enable_rtc_based_timers(struct bd70528_rtc *r,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) int old_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (!r->has_rtc_timers)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return bd70528_set_rtc_based_timers(r, old_state, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static int bd70528_disable_rtc_based_timers(struct bd70528_rtc *r,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) int *old_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (!r->has_rtc_timers)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return bd70528_set_rtc_based_timers(r, 0, old_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static inline void tmday2rtc(struct rtc_time *t, struct bd70528_rtc_day *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) d->sec &= ~BD70528_MASK_RTC_SEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) d->min &= ~BD70528_MASK_RTC_MINUTE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) d->hour &= ~BD70528_MASK_RTC_HOUR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) d->sec |= bin2bcd(t->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) d->min |= bin2bcd(t->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) d->hour |= bin2bcd(t->tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static inline void tm2rtc(struct rtc_time *t, struct bd70528_rtc_data *r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) r->day &= ~BD70528_MASK_RTC_DAY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) r->week &= ~BD70528_MASK_RTC_WEEK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) r->month &= ~BD70528_MASK_RTC_MONTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * PM and 24H bits are not used by Wake - thus we clear them
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * here and not in tmday2rtc() which is also used by wake.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) r->time.hour &= ~(BD70528_MASK_RTC_HOUR_PM | BD70528_MASK_RTC_HOUR_24H);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) tmday2rtc(t, &r->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * We do always set time in 24H mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) r->time.hour |= BD70528_MASK_RTC_HOUR_24H;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) r->day |= bin2bcd(t->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) r->week |= bin2bcd(t->tm_wday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) r->month |= bin2bcd(t->tm_mon + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) r->year = bin2bcd(t->tm_year - 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static inline void rtc2tm(struct bd70528_rtc_data *r, struct rtc_time *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) t->tm_sec = bcd2bin(r->time.sec & BD70528_MASK_RTC_SEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) t->tm_min = bcd2bin(r->time.min & BD70528_MASK_RTC_MINUTE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) t->tm_hour = bcd2bin(r->time.hour & BD70528_MASK_RTC_HOUR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * If RTC is in 12H mode, then bit BD70528_MASK_RTC_HOUR_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * is not BCD value but tells whether it is AM or PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (!(r->time.hour & BD70528_MASK_RTC_HOUR_24H)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) t->tm_hour %= 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (r->time.hour & BD70528_MASK_RTC_HOUR_PM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) t->tm_hour += 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) t->tm_mday = bcd2bin(r->day & BD70528_MASK_RTC_DAY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) t->tm_mon = bcd2bin(r->month & BD70528_MASK_RTC_MONTH) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) t->tm_year = 100 + bcd2bin(r->year & BD70528_MASK_RTC_YEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) t->tm_wday = bcd2bin(r->week & BD70528_MASK_RTC_WEEK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static int bd71828_set_alarm(struct device *dev, struct rtc_wkalrm *a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) struct bd71828_rtc_alm alm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct bd70528_rtc *r = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct rohm_regmap_dev *parent = r->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ret = regmap_bulk_read(parent->regmap, BD71828_REG_RTC_ALM_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) &alm, sizeof(alm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) dev_err(dev, "Failed to read alarm regs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) tm2rtc(&a->time, &alm.alm0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) if (!a->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) alm.alm_mask &= ~BD70528_MASK_ALM_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) alm.alm_mask |= BD70528_MASK_ALM_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) ret = regmap_bulk_write(parent->regmap, BD71828_REG_RTC_ALM_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) &alm, sizeof(alm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) dev_err(dev, "Failed to set alarm time\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static int bd70528_set_alarm(struct device *dev, struct rtc_wkalrm *a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) struct bd70528_rtc_wake wake;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) struct bd70528_rtc_alm alm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) struct bd70528_rtc *r = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) struct rohm_regmap_dev *parent = r->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ret = regmap_bulk_read(parent->regmap, BD70528_REG_RTC_WAKE_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) &wake, sizeof(wake));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) dev_err(dev, "Failed to read wake regs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) ret = regmap_bulk_read(parent->regmap, BD70528_REG_RTC_ALM_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) &alm, sizeof(alm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) dev_err(dev, "Failed to read alarm regs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) tm2rtc(&a->time, &alm.data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) tmday2rtc(&a->time, &wake.time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (a->enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) alm.alm_mask &= ~BD70528_MASK_ALM_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) wake.ctrl |= BD70528_MASK_WAKE_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) alm.alm_mask |= BD70528_MASK_ALM_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) wake.ctrl &= ~BD70528_MASK_WAKE_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) ret = regmap_bulk_write(parent->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) BD70528_REG_RTC_WAKE_START, &wake,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) sizeof(wake));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) dev_err(dev, "Failed to set wake time\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) ret = regmap_bulk_write(parent->regmap, BD70528_REG_RTC_ALM_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) &alm, sizeof(alm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) dev_err(dev, "Failed to set alarm time\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static int bd71828_read_alarm(struct device *dev, struct rtc_wkalrm *a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) struct bd71828_rtc_alm alm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) struct bd70528_rtc *r = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) struct rohm_regmap_dev *parent = r->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) ret = regmap_bulk_read(parent->regmap, BD71828_REG_RTC_ALM_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) &alm, sizeof(alm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) dev_err(dev, "Failed to read alarm regs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) rtc2tm(&alm.alm0, &a->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) a->time.tm_mday = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) a->time.tm_mon = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) a->time.tm_year = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) a->enabled = !!(alm.alm_mask & BD70528_MASK_ALM_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) a->pending = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static int bd70528_read_alarm(struct device *dev, struct rtc_wkalrm *a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) struct bd70528_rtc_alm alm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) struct bd70528_rtc *r = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct rohm_regmap_dev *parent = r->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) ret = regmap_bulk_read(parent->regmap, BD70528_REG_RTC_ALM_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) &alm, sizeof(alm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) dev_err(dev, "Failed to read alarm regs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) rtc2tm(&alm.data, &a->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) a->time.tm_mday = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) a->time.tm_mon = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) a->time.tm_year = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) a->enabled = !(alm.alm_mask & BD70528_MASK_ALM_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) a->pending = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static int bd70528_set_time_locked(struct device *dev, struct rtc_time *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) int ret, tmpret, old_states;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) struct bd70528_rtc_data rtc_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) struct bd70528_rtc *r = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) struct rohm_regmap_dev *parent = r->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) ret = bd70528_disable_rtc_based_timers(r, &old_states);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) tmpret = regmap_bulk_read(parent->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) r->reg_time_start, &rtc_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) sizeof(rtc_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (tmpret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) dev_err(dev, "Failed to read RTC time registers\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) goto renable_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) tm2rtc(t, &rtc_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) tmpret = regmap_bulk_write(parent->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) r->reg_time_start, &rtc_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) sizeof(rtc_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) if (tmpret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) dev_err(dev, "Failed to set RTC time\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) goto renable_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) renable_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) ret = bd70528_re_enable_rtc_based_timers(r, old_states);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) if (tmpret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) ret = tmpret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static int bd71828_set_time(struct device *dev, struct rtc_time *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) return bd70528_set_time_locked(dev, t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static int bd70528_set_time(struct device *dev, struct rtc_time *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) struct bd70528_rtc *r = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) bd70528_wdt_lock(r->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) ret = bd70528_set_time_locked(dev, t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) bd70528_wdt_unlock(r->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) static int bd70528_get_time(struct device *dev, struct rtc_time *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) struct bd70528_rtc *r = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) struct rohm_regmap_dev *parent = r->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) struct bd70528_rtc_data rtc_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) /* read the RTC date and time registers all at once */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) ret = regmap_bulk_read(parent->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) r->reg_time_start, &rtc_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) sizeof(rtc_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) dev_err(dev, "Failed to read RTC time (err %d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) rtc2tm(&rtc_data, t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) static int bd70528_alm_enable(struct device *dev, unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) unsigned int enableval = BD70528_MASK_ALM_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) struct bd70528_rtc *r = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) if (enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) enableval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) bd70528_wdt_lock(r->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) ret = bd70528_set_wake(r->parent, enabled, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) dev_err(dev, "Failed to change wake state\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) ret = regmap_update_bits(r->parent->regmap, BD70528_REG_RTC_ALM_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) BD70528_MASK_ALM_EN, enableval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) dev_err(dev, "Failed to change alarm state\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) out_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) bd70528_wdt_unlock(r->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) static int bd71828_alm_enable(struct device *dev, unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) struct bd70528_rtc *r = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) unsigned int enableval = BD70528_MASK_ALM_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) if (!enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) enableval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) ret = regmap_update_bits(r->parent->regmap, BD71828_REG_RTC_ALM0_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) BD70528_MASK_ALM_EN, enableval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) dev_err(dev, "Failed to change alarm state\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static const struct rtc_class_ops bd70528_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .read_time = bd70528_get_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .set_time = bd70528_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .read_alarm = bd70528_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .set_alarm = bd70528_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .alarm_irq_enable = bd70528_alm_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) static const struct rtc_class_ops bd71828_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) .read_time = bd70528_get_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) .set_time = bd71828_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) .read_alarm = bd71828_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) .set_alarm = bd71828_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) .alarm_irq_enable = bd71828_alm_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) static irqreturn_t alm_hndlr(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) struct rtc_device *rtc = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) rtc_update_irq(rtc, 1, RTC_IRQF | RTC_AF | RTC_PF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static int bd70528_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) struct bd70528_rtc *bd_rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) const struct rtc_class_ops *rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) struct rohm_regmap_dev *parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) const char *irq_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) unsigned int hr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) bool enable_main_irq = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) u8 hour_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) enum rohm_chip_type chip = platform_get_device_id(pdev)->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) parent = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) if (!parent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) dev_err(&pdev->dev, "No MFD driver data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) bd_rtc = devm_kzalloc(&pdev->dev, sizeof(*bd_rtc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) if (!bd_rtc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) bd_rtc->parent = parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) bd_rtc->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) switch (chip) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) case ROHM_CHIP_TYPE_BD70528:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) irq_name = "bd70528-rtc-alm";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) bd_rtc->has_rtc_timers = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) bd_rtc->reg_time_start = BD70528_REG_RTC_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) hour_reg = BD70528_REG_RTC_HOUR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) enable_main_irq = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) rtc_ops = &bd70528_rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) case ROHM_CHIP_TYPE_BD71828:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) irq_name = "bd71828-rtc-alm-0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) bd_rtc->reg_time_start = BD71828_REG_RTC_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) hour_reg = BD71828_REG_RTC_HOUR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) rtc_ops = &bd71828_rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) dev_err(&pdev->dev, "Unknown chip\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) irq = platform_get_irq_byname(pdev, irq_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) platform_set_drvdata(pdev, bd_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) ret = regmap_read(parent->regmap, hour_reg, &hr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) dev_err(&pdev->dev, "Failed to reag RTC clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) if (!(hr & BD70528_MASK_RTC_HOUR_24H)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) struct rtc_time t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) ret = rtc_ops->read_time(&pdev->dev, &t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) ret = rtc_ops->set_time(&pdev->dev, &t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) "Setting 24H clock for RTC failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) device_set_wakeup_capable(&pdev->dev, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) device_wakeup_enable(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) rtc = devm_rtc_allocate_device(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) if (IS_ERR(rtc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) dev_err(&pdev->dev, "RTC device creation failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) return PTR_ERR(rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) rtc->range_max = RTC_TIMESTAMP_END_2099;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) rtc->ops = rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) /* Request alarm IRQ prior to registerig the RTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, &alm_hndlr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) IRQF_ONESHOT, "bd70528-rtc", rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) * BD70528 irq controller is not touching the main mask register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) * So enable the RTC block interrupts at main level. We can just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) * leave them enabled as irq-controller should disable irqs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) * from sub-registers when IRQ is disabled or freed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) if (enable_main_irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) ret = regmap_update_bits(parent->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) BD70528_REG_INT_MAIN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) BD70528_INT_RTC_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) dev_err(&pdev->dev, "Failed to enable RTC interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) return rtc_register_device(rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) static const struct platform_device_id bd718x7_rtc_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) { "bd70528-rtc", ROHM_CHIP_TYPE_BD70528 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) { "bd71828-rtc", ROHM_CHIP_TYPE_BD71828 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) MODULE_DEVICE_TABLE(platform, bd718x7_rtc_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) static struct platform_driver bd70528_rtc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) .name = "bd70528-rtc"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) .probe = bd70528_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) .id_table = bd718x7_rtc_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) module_platform_driver(bd70528_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) MODULE_DESCRIPTION("ROHM BD70528 and BD71828 PMIC RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) MODULE_ALIAS("platform:bd70528-rtc");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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