^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) ST-Ericsson SA 2010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Virupax Sadashivpetimath <virupax.sadashivpetimath@stericsson.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * RTC clock driver for the RTC part of the AB8500 Power management chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Based on RTC clock driver for the AB3100 Analog Baseband Chip by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Linus Walleij <linus.walleij@stericsson.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mfd/abx500.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mfd/abx500/ab8500.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/pm_wakeirq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define AB8500_RTC_SOFF_STAT_REG 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define AB8500_RTC_CC_CONF_REG 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define AB8500_RTC_READ_REQ_REG 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define AB8500_RTC_WATCH_TSECMID_REG 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define AB8500_RTC_WATCH_TSECHI_REG 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define AB8500_RTC_WATCH_TMIN_LOW_REG 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define AB8500_RTC_WATCH_TMIN_MID_REG 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define AB8500_RTC_WATCH_TMIN_HI_REG 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define AB8500_RTC_ALRM_MIN_LOW_REG 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define AB8500_RTC_ALRM_MIN_MID_REG 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define AB8500_RTC_ALRM_MIN_HI_REG 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define AB8500_RTC_STAT_REG 0x0B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define AB8500_RTC_BKUP_CHG_REG 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define AB8500_RTC_FORCE_BKUP_REG 0x0D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define AB8500_RTC_CALIB_REG 0x0E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define AB8500_RTC_SWITCH_STAT_REG 0x0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* RtcReadRequest bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define RTC_READ_REQUEST 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define RTC_WRITE_REQUEST 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* RtcCtrl bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define RTC_ALARM_ENA 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define RTC_STATUS_DATA 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define COUNTS_PER_SEC (0xF000 / 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static const u8 ab8500_rtc_time_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) AB8500_RTC_WATCH_TMIN_HI_REG, AB8500_RTC_WATCH_TMIN_MID_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) AB8500_RTC_WATCH_TMIN_LOW_REG, AB8500_RTC_WATCH_TSECHI_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) AB8500_RTC_WATCH_TSECMID_REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static const u8 ab8500_rtc_alarm_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) AB8500_RTC_ALRM_MIN_HI_REG, AB8500_RTC_ALRM_MIN_MID_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) AB8500_RTC_ALRM_MIN_LOW_REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static int ab8500_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) unsigned long timeout = jiffies + HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int retval, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) unsigned long mins, secs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) unsigned char buf[ARRAY_SIZE(ab8500_rtc_time_regs)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* Request a data read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) retval = abx500_set_register_interruptible(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) AB8500_RTC, AB8500_RTC_READ_REQ_REG, RTC_READ_REQUEST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (retval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* Wait for some cycles after enabling the rtc read in ab8500 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) while (time_before(jiffies, timeout)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) retval = abx500_get_register_interruptible(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) AB8500_RTC, AB8500_RTC_READ_REQ_REG, &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (retval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (!(value & RTC_READ_REQUEST))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) usleep_range(1000, 5000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* Read the Watchtime registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) for (i = 0; i < ARRAY_SIZE(ab8500_rtc_time_regs); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) retval = abx500_get_register_interruptible(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) AB8500_RTC, ab8500_rtc_time_regs[i], &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (retval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) buf[i] = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) mins = (buf[0] << 16) | (buf[1] << 8) | buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) secs = (buf[3] << 8) | buf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) secs = secs / COUNTS_PER_SEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) secs = secs + (mins * 60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) rtc_time64_to_tm(secs, tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int ab8500_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) int retval, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) unsigned char buf[ARRAY_SIZE(ab8500_rtc_time_regs)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) unsigned long no_secs, no_mins, secs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) secs = rtc_tm_to_time64(tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) no_mins = secs / 60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) no_secs = secs % 60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* Make the seconds count as per the RTC resolution */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) no_secs = no_secs * COUNTS_PER_SEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) buf[4] = no_secs & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) buf[3] = (no_secs >> 8) & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) buf[2] = no_mins & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) buf[1] = (no_mins >> 8) & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) buf[0] = (no_mins >> 16) & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) for (i = 0; i < ARRAY_SIZE(ab8500_rtc_time_regs); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) retval = abx500_set_register_interruptible(dev, AB8500_RTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) ab8500_rtc_time_regs[i], buf[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (retval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /* Request a data write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return abx500_set_register_interruptible(dev, AB8500_RTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) AB8500_RTC_READ_REQ_REG, RTC_WRITE_REQUEST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static int ab8500_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) int retval, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) u8 rtc_ctrl, value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) unsigned char buf[ARRAY_SIZE(ab8500_rtc_alarm_regs)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) unsigned long secs, mins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* Check if the alarm is enabled or not */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) retval = abx500_get_register_interruptible(dev, AB8500_RTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) AB8500_RTC_STAT_REG, &rtc_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (retval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (rtc_ctrl & RTC_ALARM_ENA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) alarm->enabled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) alarm->enabled = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) alarm->pending = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) for (i = 0; i < ARRAY_SIZE(ab8500_rtc_alarm_regs); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) retval = abx500_get_register_interruptible(dev, AB8500_RTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) ab8500_rtc_alarm_regs[i], &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (retval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) buf[i] = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) mins = (buf[0] << 16) | (buf[1] << 8) | (buf[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) secs = mins * 60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) rtc_time64_to_tm(secs, &alarm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static int ab8500_rtc_irq_enable(struct device *dev, unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return abx500_mask_and_set_register_interruptible(dev, AB8500_RTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) AB8500_RTC_STAT_REG, RTC_ALARM_ENA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) enabled ? RTC_ALARM_ENA : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static int ab8500_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) int retval, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) unsigned char buf[ARRAY_SIZE(ab8500_rtc_alarm_regs)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) unsigned long mins, secs = 0, cursec = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct rtc_time curtm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* Get the number of seconds since 1970 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) secs = rtc_tm_to_time64(&alarm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * Check whether alarm is set less than 1min.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * Since our RTC doesn't support alarm resolution less than 1min,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * return -EINVAL, so UIE EMUL can take it up, incase of UIE_ON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ab8500_rtc_read_time(dev, &curtm); /* Read current time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) cursec = rtc_tm_to_time64(&curtm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if ((secs - cursec) < 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) dev_dbg(dev, "Alarm less than 1 minute not supported\r\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) mins = secs / 60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) buf[2] = mins & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) buf[1] = (mins >> 8) & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) buf[0] = (mins >> 16) & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* Set the alarm time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) for (i = 0; i < ARRAY_SIZE(ab8500_rtc_alarm_regs); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) retval = abx500_set_register_interruptible(dev, AB8500_RTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) ab8500_rtc_alarm_regs[i], buf[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (retval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return ab8500_rtc_irq_enable(dev, alarm->enabled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static int ab8500_rtc_set_calibration(struct device *dev, int calibration)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) u8 rtccal = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * Check that the calibration value (which is in units of 0.5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * parts-per-million) is in the AB8500's range for RtcCalibration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * register. -128 (0x80) is not permitted because the AB8500 uses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * a sign-bit rather than two's complement, so 0x80 is just another
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * representation of zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if ((calibration < -127) || (calibration > 127)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) dev_err(dev, "RtcCalibration value outside permitted range\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * The AB8500 uses sign (in bit7) and magnitude (in bits0-7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * so need to convert to this sort of representation before writing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) * into RtcCalibration register...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (calibration >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) rtccal = 0x7F & calibration;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) rtccal = ~(calibration - 1) | 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) retval = abx500_set_register_interruptible(dev, AB8500_RTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) AB8500_RTC_CALIB_REG, rtccal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static int ab8500_rtc_get_calibration(struct device *dev, int *calibration)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) u8 rtccal = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) retval = abx500_get_register_interruptible(dev, AB8500_RTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) AB8500_RTC_CALIB_REG, &rtccal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (retval >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * The AB8500 uses sign (in bit7) and magnitude (in bits0-7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) * so need to convert value from RtcCalibration register into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) * a two's complement signed value...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (rtccal & 0x80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) *calibration = 0 - (rtccal & 0x7F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) *calibration = 0x7F & rtccal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static ssize_t ab8500_sysfs_store_rtc_calibration(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) int calibration = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (sscanf(buf, " %i ", &calibration) != 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) dev_err(dev, "Failed to store RTC calibration attribute\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) retval = ab8500_rtc_set_calibration(dev, calibration);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) return retval ? retval : count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static ssize_t ab8500_sysfs_show_rtc_calibration(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) int calibration = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) retval = ab8500_rtc_get_calibration(dev, &calibration);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) if (retval < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) dev_err(dev, "Failed to read RTC calibration attribute\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) sprintf(buf, "0\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) return sprintf(buf, "%d\n", calibration);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static DEVICE_ATTR(rtc_calibration, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) ab8500_sysfs_show_rtc_calibration,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) ab8500_sysfs_store_rtc_calibration);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static struct attribute *ab8500_rtc_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) &dev_attr_rtc_calibration.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static const struct attribute_group ab8500_rtc_sysfs_files = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .attrs = ab8500_rtc_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static irqreturn_t rtc_alarm_handler(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) struct rtc_device *rtc = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) unsigned long events = RTC_IRQF | RTC_AF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) dev_dbg(&rtc->dev, "%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) rtc_update_irq(rtc, 1, events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static const struct rtc_class_ops ab8500_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) .read_time = ab8500_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .set_time = ab8500_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .read_alarm = ab8500_rtc_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .set_alarm = ab8500_rtc_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .alarm_irq_enable = ab8500_rtc_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) static const struct platform_device_id ab85xx_rtc_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) { "ab8500-rtc", (kernel_ulong_t)&ab8500_rtc_ops, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) MODULE_DEVICE_TABLE(platform, ab85xx_rtc_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) static int ab8500_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) const struct platform_device_id *platid = platform_get_device_id(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) u8 rtc_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) irq = platform_get_irq_byname(pdev, "ALARM");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /* For RTC supply test */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) err = abx500_mask_and_set_register_interruptible(&pdev->dev, AB8500_RTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) AB8500_RTC_STAT_REG, RTC_STATUS_DATA, RTC_STATUS_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /* Wait for reset by the PorRtc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) usleep_range(1000, 5000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) err = abx500_get_register_interruptible(&pdev->dev, AB8500_RTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) AB8500_RTC_STAT_REG, &rtc_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) /* Check if the RTC Supply fails */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (!(rtc_ctrl & RTC_STATUS_DATA)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) dev_err(&pdev->dev, "RTC supply failure\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) device_init_wakeup(&pdev->dev, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) rtc = devm_rtc_allocate_device(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (IS_ERR(rtc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) return PTR_ERR(rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) rtc->ops = (struct rtc_class_ops *)platid->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) err = devm_request_threaded_irq(&pdev->dev, irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) rtc_alarm_handler, IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) "ab8500-rtc", rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) dev_pm_set_wake_irq(&pdev->dev, irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) platform_set_drvdata(pdev, rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) rtc->uie_unsupported = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) rtc->range_max = (1ULL << 24) * 60 - 1; // 24-bit minutes + 59 secs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) rtc->start_secs = RTC_TIMESTAMP_BEGIN_2000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) rtc->set_start_time = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) err = rtc_add_group(rtc, &ab8500_rtc_sysfs_files);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return rtc_register_device(rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) static int ab8500_rtc_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) dev_pm_clear_wake_irq(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) device_init_wakeup(&pdev->dev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) static struct platform_driver ab8500_rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .name = "ab8500-rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) .probe = ab8500_rtc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .remove = ab8500_rtc_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .id_table = ab85xx_rtc_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) module_platform_driver(ab8500_rtc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) MODULE_AUTHOR("Virupax Sadashivpetimath <virupax.sadashivpetimath@stericsson.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) MODULE_DESCRIPTION("AB8500 RTC Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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