^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Real Time Clock driver for Marvell 88PM860x PMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2010 Marvell International Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Haojian Zhuang <haojian.zhuang@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mfd/88pm860x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define VRTC_CALIBRATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct pm860x_rtc_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct pm860x_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct i2c_client *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct rtc_device *rtc_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct delayed_work calib_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int vrtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define REG_VRTC_MEAS1 0x7D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define REG0_ADDR 0xB0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define REG1_ADDR 0xB2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define REG2_ADDR 0xB4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define REG3_ADDR 0xB6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define REG0_DATA 0xB1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define REG1_DATA 0xB3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define REG2_DATA 0xB5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define REG3_DATA 0xB7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* bit definitions of Measurement Enable Register 2 (0x51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define MEAS2_VRTC (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* bit definitions of RTC Register 1 (0xA0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define ALARM_EN (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define ALARM_WAKEUP (1 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define ALARM (1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define RTC1_USE_XO (1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define VRTC_CALIB_INTERVAL (HZ * 60 * 10) /* 10 minutes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static irqreturn_t rtc_update_handler(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct pm860x_rtc_info *info = (struct pm860x_rtc_info *)data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) int mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) mask = ALARM | ALARM_WAKEUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) pm860x_set_bits(info->i2c, PM8607_RTC1, mask | ALARM_EN, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) rtc_update_irq(info->rtc_dev, 1, RTC_AF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static int pm860x_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct pm860x_rtc_info *info = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) pm860x_set_bits(info->i2c, PM8607_RTC1, ALARM_EN, ALARM_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) pm860x_set_bits(info->i2c, PM8607_RTC1, ALARM_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static int pm860x_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct pm860x_rtc_info *info = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned char buf[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned long ticks, base, data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) pm860x_page_bulk_read(info->i2c, REG0_ADDR, 8, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) dev_dbg(info->dev, "%x-%x-%x-%x-%x-%x-%x-%x\n", buf[0], buf[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) base = ((unsigned long)buf[1] << 24) | (buf[3] << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) (buf[5] << 8) | buf[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* load 32-bit read-only counter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) pm860x_bulk_read(info->i2c, PM8607_RTC_COUNTER1, 4, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) (buf[1] << 8) | buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) ticks = base + data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) base, data, ticks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) rtc_time64_to_tm(ticks, tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int pm860x_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct pm860x_rtc_info *info = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) unsigned char buf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) unsigned long ticks, base, data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) ticks = rtc_tm_to_time64(tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* load 32-bit read-only counter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) pm860x_bulk_read(info->i2c, PM8607_RTC_COUNTER1, 4, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) (buf[1] << 8) | buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) base = ticks - data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) dev_dbg(info->dev, "set base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) base, data, ticks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) pm860x_page_reg_write(info->i2c, REG0_DATA, (base >> 24) & 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) pm860x_page_reg_write(info->i2c, REG1_DATA, (base >> 16) & 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) pm860x_page_reg_write(info->i2c, REG2_DATA, (base >> 8) & 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) pm860x_page_reg_write(info->i2c, REG3_DATA, base & 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static int pm860x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) struct pm860x_rtc_info *info = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) unsigned char buf[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) unsigned long ticks, base, data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) pm860x_page_bulk_read(info->i2c, REG0_ADDR, 8, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) dev_dbg(info->dev, "%x-%x-%x-%x-%x-%x-%x-%x\n", buf[0], buf[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) base = ((unsigned long)buf[1] << 24) | (buf[3] << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) (buf[5] << 8) | buf[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) pm860x_bulk_read(info->i2c, PM8607_RTC_EXPIRE1, 4, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) (buf[1] << 8) | buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) ticks = base + data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) base, data, ticks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) rtc_time64_to_tm(ticks, &alrm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ret = pm860x_reg_read(info->i2c, PM8607_RTC1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) alrm->enabled = (ret & ALARM_EN) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) alrm->pending = (ret & (ALARM | ALARM_WAKEUP)) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static int pm860x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct pm860x_rtc_info *info = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) unsigned long ticks, base, data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) unsigned char buf[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) int mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) pm860x_set_bits(info->i2c, PM8607_RTC1, ALARM_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) pm860x_page_bulk_read(info->i2c, REG0_ADDR, 8, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) dev_dbg(info->dev, "%x-%x-%x-%x-%x-%x-%x-%x\n", buf[0], buf[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) base = ((unsigned long)buf[1] << 24) | (buf[3] << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) (buf[5] << 8) | buf[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ticks = rtc_tm_to_time64(&alrm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) data = ticks - base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) buf[0] = data & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) buf[1] = (data >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) buf[2] = (data >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) buf[3] = (data >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) pm860x_bulk_write(info->i2c, PM8607_RTC_EXPIRE1, 4, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (alrm->enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) mask = ALARM | ALARM_WAKEUP | ALARM_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) pm860x_set_bits(info->i2c, PM8607_RTC1, mask, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) mask = ALARM | ALARM_WAKEUP | ALARM_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) pm860x_set_bits(info->i2c, PM8607_RTC1, mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) ALARM | ALARM_WAKEUP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static const struct rtc_class_ops pm860x_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .read_time = pm860x_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .set_time = pm860x_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .read_alarm = pm860x_rtc_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .set_alarm = pm860x_rtc_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .alarm_irq_enable = pm860x_rtc_alarm_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #ifdef VRTC_CALIBRATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static void calibrate_vrtc_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct pm860x_rtc_info *info = container_of(work,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct pm860x_rtc_info, calib_work.work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) unsigned char buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) unsigned int sum, data, mean, vrtc_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) for (i = 0, sum = 0; i < 16; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) pm860x_bulk_read(info->i2c, REG_VRTC_MEAS1, 2, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) data = (buf[0] << 4) | buf[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) data = (data * 5400) >> 12; /* convert to mv */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) sum += data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) mean = sum >> 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) vrtc_set = 2700 + (info->vrtc & 0x3) * 200;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) dev_dbg(info->dev, "mean:%d, vrtc_set:%d\n", mean, vrtc_set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) sum = pm860x_reg_read(info->i2c, PM8607_RTC_MISC1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) data = sum & 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if ((mean + 200) < vrtc_set) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /* try higher voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) if (++data == 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) data = (sum & 0xf8) | (data & 0x3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) pm860x_reg_write(info->i2c, PM8607_RTC_MISC1, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) } else if ((mean - 200) > vrtc_set) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /* try lower voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (data-- == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) data = (sum & 0xf8) | (data & 0x3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) pm860x_reg_write(info->i2c, PM8607_RTC_MISC1, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) dev_dbg(info->dev, "set 0x%x to RTC_MISC1\n", data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) /* trigger next calibration since VRTC is updated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) schedule_delayed_work(&info->calib_work, VRTC_CALIB_INTERVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /* disable measurement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) pm860x_set_bits(info->i2c, PM8607_MEAS_EN2, MEAS2_VRTC, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) dev_dbg(info->dev, "finish VRTC calibration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static int pm860x_rtc_dt_init(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) struct pm860x_rtc_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) struct device_node *np = pdev->dev.parent->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (!np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) np = of_get_child_by_name(np, "rtc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (!np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) dev_err(&pdev->dev, "failed to find rtc node\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ret = of_property_read_u32(np, "marvell,88pm860x-vrtc", &info->vrtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) info->vrtc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #define pm860x_rtc_dt_init(x, y) do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static int pm860x_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) struct pm860x_chip *chip = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) struct pm860x_rtc_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) info = devm_kzalloc(&pdev->dev, sizeof(struct pm860x_rtc_info),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (!info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) info->irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (info->irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) return info->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) info->chip = chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) info->i2c = (chip->id == CHIP_PM8607) ? chip->client : chip->companion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) info->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) dev_set_drvdata(&pdev->dev, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) info->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (IS_ERR(info->rtc_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return PTR_ERR(info->rtc_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) rtc_update_handler, IRQF_ONESHOT, "rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) dev_err(chip->dev, "Failed to request IRQ: #%d: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) info->irq, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /* set addresses of 32-bit base value for RTC time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) pm860x_page_reg_write(info->i2c, REG0_ADDR, REG0_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) pm860x_page_reg_write(info->i2c, REG1_ADDR, REG1_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) pm860x_page_reg_write(info->i2c, REG2_ADDR, REG2_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) pm860x_page_reg_write(info->i2c, REG3_ADDR, REG3_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) pm860x_rtc_dt_init(pdev, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) info->rtc_dev->ops = &pm860x_rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) info->rtc_dev->range_max = U32_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) ret = rtc_register_device(info->rtc_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) * enable internal XO instead of internal 3.25MHz clock since it can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * free running in PMIC power-down state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) pm860x_set_bits(info->i2c, PM8607_RTC1, RTC1_USE_XO, RTC1_USE_XO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) #ifdef VRTC_CALIBRATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) /* <00> -- 2.7V, <01> -- 2.9V, <10> -- 3.1V, <11> -- 3.3V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) pm860x_set_bits(info->i2c, PM8607_MEAS_EN2, MEAS2_VRTC, MEAS2_VRTC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) /* calibrate VRTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) INIT_DELAYED_WORK(&info->calib_work, calibrate_vrtc_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) schedule_delayed_work(&info->calib_work, VRTC_CALIB_INTERVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) #endif /* VRTC_CALIBRATION */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) device_init_wakeup(&pdev->dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static int pm860x_rtc_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) struct pm860x_rtc_info *info = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) #ifdef VRTC_CALIBRATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) cancel_delayed_work_sync(&info->calib_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) /* disable measurement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) pm860x_set_bits(info->i2c, PM8607_MEAS_EN2, MEAS2_VRTC, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) #endif /* VRTC_CALIBRATION */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) static int pm860x_rtc_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct platform_device *pdev = to_platform_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) struct pm860x_chip *chip = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) chip->wakeup_flag |= 1 << PM8607_IRQ_RTC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static int pm860x_rtc_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) struct platform_device *pdev = to_platform_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) struct pm860x_chip *chip = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) chip->wakeup_flag &= ~(1 << PM8607_IRQ_RTC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) static SIMPLE_DEV_PM_OPS(pm860x_rtc_pm_ops, pm860x_rtc_suspend, pm860x_rtc_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) static struct platform_driver pm860x_rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .name = "88pm860x-rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .pm = &pm860x_rtc_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .probe = pm860x_rtc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .remove = pm860x_rtc_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) module_platform_driver(pm860x_rtc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) MODULE_DESCRIPTION("Marvell 88PM860x RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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