^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Real Time Clock driver for Marvell 88PM80x PMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2012 Marvell International Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Wenzeng Chen<wzch@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Qiao Zhou <zhouqiao@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mfd/88pm80x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define PM800_RTC_COUNTER1 (0xD1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define PM800_RTC_COUNTER2 (0xD2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define PM800_RTC_COUNTER3 (0xD3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define PM800_RTC_COUNTER4 (0xD4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define PM800_RTC_EXPIRE1_1 (0xD5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PM800_RTC_EXPIRE1_2 (0xD6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PM800_RTC_EXPIRE1_3 (0xD7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PM800_RTC_EXPIRE1_4 (0xD8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define PM800_RTC_TRIM1 (0xD9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define PM800_RTC_TRIM2 (0xDA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define PM800_RTC_TRIM3 (0xDB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define PM800_RTC_TRIM4 (0xDC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define PM800_RTC_EXPIRE2_1 (0xDD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define PM800_RTC_EXPIRE2_2 (0xDE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define PM800_RTC_EXPIRE2_3 (0xDF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define PM800_RTC_EXPIRE2_4 (0xE0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PM800_POWER_DOWN_LOG1 (0xE5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define PM800_POWER_DOWN_LOG2 (0xE6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct pm80x_rtc_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct pm80x_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct regmap *map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct rtc_device *rtc_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static irqreturn_t rtc_update_handler(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct pm80x_rtc_info *info = (struct pm80x_rtc_info *)data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) mask = PM800_ALARM | PM800_ALARM_WAKEUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) regmap_update_bits(info->map, PM800_RTC_CONTROL, mask | PM800_ALARM1_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) rtc_update_irq(info->rtc_dev, 1, RTC_AF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static int pm80x_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct pm80x_rtc_info *info = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) regmap_update_bits(info->map, PM800_RTC_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) PM800_ALARM1_EN, PM800_ALARM1_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) regmap_update_bits(info->map, PM800_RTC_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) PM800_ALARM1_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * Calculate the next alarm time given the requested alarm time mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * and the current time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct rtc_time *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) unsigned long next_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned long now_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) next->tm_year = now->tm_year;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) next->tm_mon = now->tm_mon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) next->tm_mday = now->tm_mday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) next->tm_hour = alrm->tm_hour;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) next->tm_min = alrm->tm_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) next->tm_sec = alrm->tm_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) now_time = rtc_tm_to_time64(now);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) next_time = rtc_tm_to_time64(next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (next_time < now_time) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* Advance one day */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) next_time += 60 * 60 * 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) rtc_time64_to_tm(next_time, next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static int pm80x_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct pm80x_rtc_info *info = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned char buf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) unsigned long ticks, base, data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) regmap_raw_read(info->map, PM800_RTC_EXPIRE2_1, buf, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) base = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) (buf[1] << 8) | buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) dev_dbg(info->dev, "%x-%x-%x-%x\n", buf[0], buf[1], buf[2], buf[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* load 32-bit read-only counter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) regmap_raw_read(info->map, PM800_RTC_COUNTER1, buf, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) (buf[1] << 8) | buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) ticks = base + data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) base, data, ticks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) rtc_time64_to_tm(ticks, tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static int pm80x_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct pm80x_rtc_info *info = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) unsigned char buf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) unsigned long ticks, base, data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) ticks = rtc_tm_to_time64(tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* load 32-bit read-only counter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) regmap_raw_read(info->map, PM800_RTC_COUNTER1, buf, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) (buf[1] << 8) | buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) base = ticks - data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) dev_dbg(info->dev, "set base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) base, data, ticks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) buf[0] = base & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) buf[1] = (base >> 8) & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) buf[2] = (base >> 16) & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) buf[3] = (base >> 24) & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) regmap_raw_write(info->map, PM800_RTC_EXPIRE2_1, buf, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static int pm80x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct pm80x_rtc_info *info = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) unsigned char buf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) unsigned long ticks, base, data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) regmap_raw_read(info->map, PM800_RTC_EXPIRE2_1, buf, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) base = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) (buf[1] << 8) | buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) dev_dbg(info->dev, "%x-%x-%x-%x\n", buf[0], buf[1], buf[2], buf[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) regmap_raw_read(info->map, PM800_RTC_EXPIRE1_1, buf, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) (buf[1] << 8) | buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) ticks = base + data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) base, data, ticks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) rtc_time64_to_tm(ticks, &alrm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) regmap_read(info->map, PM800_RTC_CONTROL, &ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) alrm->enabled = (ret & PM800_ALARM1_EN) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) alrm->pending = (ret & (PM800_ALARM | PM800_ALARM_WAKEUP)) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static int pm80x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct pm80x_rtc_info *info = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) struct rtc_time now_tm, alarm_tm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) unsigned long ticks, base, data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) unsigned char buf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) int mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) regmap_update_bits(info->map, PM800_RTC_CONTROL, PM800_ALARM1_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) regmap_raw_read(info->map, PM800_RTC_EXPIRE2_1, buf, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) base = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) (buf[1] << 8) | buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) dev_dbg(info->dev, "%x-%x-%x-%x\n", buf[0], buf[1], buf[2], buf[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /* load 32-bit read-only counter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) regmap_raw_read(info->map, PM800_RTC_COUNTER1, buf, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) (buf[1] << 8) | buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) ticks = base + data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) base, data, ticks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) rtc_time64_to_tm(ticks, &now_tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) dev_dbg(info->dev, "%s, now time : %lu\n", __func__, ticks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) rtc_next_alarm_time(&alarm_tm, &now_tm, &alrm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /* get new ticks for alarm in 24 hours */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) ticks = rtc_tm_to_time64(&alarm_tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) dev_dbg(info->dev, "%s, alarm time: %lu\n", __func__, ticks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) data = ticks - base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) buf[0] = data & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) buf[1] = (data >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) buf[2] = (data >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) buf[3] = (data >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) regmap_raw_write(info->map, PM800_RTC_EXPIRE1_1, buf, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (alrm->enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) mask = PM800_ALARM | PM800_ALARM_WAKEUP | PM800_ALARM1_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) regmap_update_bits(info->map, PM800_RTC_CONTROL, mask, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) mask = PM800_ALARM | PM800_ALARM_WAKEUP | PM800_ALARM1_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) regmap_update_bits(info->map, PM800_RTC_CONTROL, mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) PM800_ALARM | PM800_ALARM_WAKEUP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static const struct rtc_class_ops pm80x_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .read_time = pm80x_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .set_time = pm80x_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .read_alarm = pm80x_rtc_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .set_alarm = pm80x_rtc_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .alarm_irq_enable = pm80x_rtc_alarm_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static int pm80x_rtc_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) return pm80x_dev_suspend(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static int pm80x_rtc_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return pm80x_dev_resume(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static SIMPLE_DEV_PM_OPS(pm80x_rtc_pm_ops, pm80x_rtc_suspend, pm80x_rtc_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static int pm80x_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct pm80x_chip *chip = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) struct pm80x_rtc_pdata *pdata = dev_get_platdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct pm80x_rtc_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) struct device_node *node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) if (!pdata && !node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) "pm80x-rtc requires platform data or of_node\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (!pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (!pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) dev_err(&pdev->dev, "failed to allocate memory\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) info =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) devm_kzalloc(&pdev->dev, sizeof(struct pm80x_rtc_info), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (!info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) info->irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) if (info->irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) info->chip = chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) info->map = chip->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) if (!info->map) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) dev_err(&pdev->dev, "no regmap!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) info->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) dev_set_drvdata(&pdev->dev, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) info->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) if (IS_ERR(info->rtc_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) return PTR_ERR(info->rtc_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) ret = pm80x_request_irq(chip, info->irq, rtc_update_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) IRQF_ONESHOT, "rtc", info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) dev_err(chip->dev, "Failed to request IRQ: #%d: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) info->irq, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) info->rtc_dev->ops = &pm80x_rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) info->rtc_dev->range_max = U32_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) ret = rtc_register_device(info->rtc_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) goto out_rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * enable internal XO instead of internal 3.25MHz clock since it can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) * free running in PMIC power-down state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) regmap_update_bits(info->map, PM800_RTC_CONTROL, PM800_RTC1_USE_XO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) PM800_RTC1_USE_XO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /* remember whether this power up is caused by PMIC RTC or not */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) info->rtc_dev->dev.platform_data = &pdata->rtc_wakeup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) device_init_wakeup(&pdev->dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) out_rtc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) pm80x_free_irq(chip, info->irq, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static int pm80x_rtc_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) struct pm80x_rtc_info *info = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) pm80x_free_irq(info->chip, info->irq, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static struct platform_driver pm80x_rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .name = "88pm80x-rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .pm = &pm80x_rtc_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .probe = pm80x_rtc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .remove = pm80x_rtc_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) module_platform_driver(pm80x_rtc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) MODULE_DESCRIPTION("Marvell 88PM80x RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) MODULE_AUTHOR("Qiao Zhou <zhouqiao@marvell.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) MODULE_ALIAS("platform:88pm80x-rtc");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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