^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2015, Sony Mobile Communications AB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/mailbox_client.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/sizes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/soc/qcom/smem.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/rpmsg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/rpmsg/qcom_smd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "rpmsg_internal.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * The Qualcomm Shared Memory communication solution provides point-to-point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * channels for clients to send and receive streaming or packet based data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * Each channel consists of a control item (channel info) and a ring buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * pair. The channel info carry information related to channel state, flow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * control and the offsets within the ring buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * All allocated channels are listed in an allocation table, identifying the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * pair of items by name, type and remote processor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * Upon creating a new channel the remote processor allocates channel info and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * ring buffer items from the smem heap and populate the allocation table. An
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * interrupt is sent to the other end of the channel and a scan for new
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * channels should be done. A channel never goes away, it will only change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * The remote processor signals it intent for bring up the communication
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * channel by setting the state of its end of the channel to "opening" and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * sends out an interrupt. We detect this change and register a smd device to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * consume the channel. Upon finding a consumer we finish the handshake and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * channel is up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * Upon closing a channel, the remote processor will update the state of its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * end of the channel and signal us, we will then unregister any attached
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * device and close our end of the channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * Devices attached to a channel can use the qcom_smd_send function to push
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * data to the channel, this is done by copying the data into the tx ring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * buffer, updating the pointers in the channel info and signaling the remote
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * processor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * The remote processor does the equivalent when it transfer data and upon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * receiving the interrupt we check the channel info for new data and delivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * this to the attached device. If the device is not ready to receive the data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * we leave it in the ring buffer for now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct smd_channel_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct smd_channel_info_pair;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct smd_channel_info_word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct smd_channel_info_word_pair;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static const struct rpmsg_endpoint_ops qcom_smd_endpoint_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define SMD_ALLOC_TBL_COUNT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define SMD_ALLOC_TBL_SIZE 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * This lists the various smem heap items relevant for the allocation table and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * smd channel entries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) unsigned alloc_tbl_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned info_base_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned fifo_base_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) } smem_items[SMD_ALLOC_TBL_COUNT] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .alloc_tbl_id = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .info_base_id = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .fifo_base_id = 338
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .alloc_tbl_id = 266,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .info_base_id = 138,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .fifo_base_id = 202,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * struct qcom_smd_edge - representing a remote processor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * @dev: device associated with this edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * @name: name of this edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * @of_node: of_node handle for information related to this edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * @edge_id: identifier of this edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * @remote_pid: identifier of remote processor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * @irq: interrupt for signals on this edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * @ipc_regmap: regmap handle holding the outgoing ipc register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * @ipc_offset: offset within @ipc_regmap of the register for ipc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * @ipc_bit: bit in the register at @ipc_offset of @ipc_regmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * @mbox_client: mailbox client handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * @mbox_chan: apcs ipc mailbox channel handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * @channels: list of all channels detected on this edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * @channels_lock: guard for modifications of @channels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * @allocated: array of bitmaps representing already allocated channels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * @smem_available: last available amount of smem triggering a channel scan
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * @new_channel_event: wait queue for new channel events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * @scan_work: work item for discovering new channels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * @state_work: work item for edge state changes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct qcom_smd_edge {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct device dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct device_node *of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) unsigned edge_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) unsigned remote_pid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct regmap *ipc_regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) int ipc_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int ipc_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct mbox_client mbox_client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct mbox_chan *mbox_chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct list_head channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) spinlock_t channels_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) DECLARE_BITMAP(allocated[SMD_ALLOC_TBL_COUNT], SMD_ALLOC_TBL_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) unsigned smem_available;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) wait_queue_head_t new_channel_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct work_struct scan_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct work_struct state_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * SMD channel states.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) enum smd_channel_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) SMD_CHANNEL_CLOSED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) SMD_CHANNEL_OPENING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) SMD_CHANNEL_OPENED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) SMD_CHANNEL_FLUSHING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) SMD_CHANNEL_CLOSING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) SMD_CHANNEL_RESET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) SMD_CHANNEL_RESET_OPENING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct qcom_smd_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct rpmsg_device rpdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) struct qcom_smd_edge *edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct qcom_smd_endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct rpmsg_endpoint ept;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct qcom_smd_channel *qsch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define to_smd_device(r) container_of(r, struct qcom_smd_device, rpdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define to_smd_edge(d) container_of(d, struct qcom_smd_edge, dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define to_smd_endpoint(e) container_of(e, struct qcom_smd_endpoint, ept)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * struct qcom_smd_channel - smd channel struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * @edge: qcom_smd_edge this channel is living on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * @qsept: reference to a associated smd endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * @registered: flag to indicate if the channel is registered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * @name: name of the channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * @state: local state of the channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * @remote_state: remote state of the channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * @state_change_event: state change event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * @info: byte aligned outgoing/incoming channel info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * @info_word: word aligned outgoing/incoming channel info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * @tx_lock: lock to make writes to the channel mutually exclusive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * @fblockread_event: wakeup event tied to tx fBLOCKREADINTR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * @tx_fifo: pointer to the outgoing ring buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * @rx_fifo: pointer to the incoming ring buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * @fifo_size: size of each ring buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * @bounce_buffer: bounce buffer for reading wrapped packets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * @cb: callback function registered for this channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * @recv_lock: guard for rx info modifications and cb pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * @pkt_size: size of the currently handled packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * @drvdata: driver private data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * @list: lite entry for @channels in qcom_smd_edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct qcom_smd_channel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct qcom_smd_edge *edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) struct qcom_smd_endpoint *qsept;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) bool registered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) enum smd_channel_state state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) enum smd_channel_state remote_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) wait_queue_head_t state_change_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) struct smd_channel_info_pair *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) struct smd_channel_info_word_pair *info_word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) spinlock_t tx_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) wait_queue_head_t fblockread_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) void *tx_fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) void *rx_fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) int fifo_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) void *bounce_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) spinlock_t recv_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) int pkt_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) void *drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * Format of the smd_info smem items, for byte aligned channels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) struct smd_channel_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) __le32 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) u8 fDSR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) u8 fCTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) u8 fCD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) u8 fRI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) u8 fHEAD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) u8 fTAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) u8 fSTATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) u8 fBLOCKREADINTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) __le32 tail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) __le32 head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) struct smd_channel_info_pair {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) struct smd_channel_info tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) struct smd_channel_info rx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * Format of the smd_info smem items, for word aligned channels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) struct smd_channel_info_word {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) __le32 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) __le32 fDSR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) __le32 fCTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) __le32 fCD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) __le32 fRI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) __le32 fHEAD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) __le32 fTAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) __le32 fSTATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) __le32 fBLOCKREADINTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) __le32 tail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) __le32 head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) struct smd_channel_info_word_pair {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) struct smd_channel_info_word tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) struct smd_channel_info_word rx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #define GET_RX_CHANNEL_FLAG(channel, param) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) BUILD_BUG_ON(sizeof(channel->info->rx.param) != sizeof(u8)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) channel->info_word ? \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) le32_to_cpu(channel->info_word->rx.param) : \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) channel->info->rx.param; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #define GET_RX_CHANNEL_INFO(channel, param) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) BUILD_BUG_ON(sizeof(channel->info->rx.param) != sizeof(u32)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) le32_to_cpu(channel->info_word ? \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) channel->info_word->rx.param : \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) channel->info->rx.param); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #define SET_RX_CHANNEL_FLAG(channel, param, value) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) BUILD_BUG_ON(sizeof(channel->info->rx.param) != sizeof(u8)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (channel->info_word) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) channel->info_word->rx.param = cpu_to_le32(value); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) else \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) channel->info->rx.param = value; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #define SET_RX_CHANNEL_INFO(channel, param, value) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) BUILD_BUG_ON(sizeof(channel->info->rx.param) != sizeof(u32)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) if (channel->info_word) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) channel->info_word->rx.param = cpu_to_le32(value); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) else \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) channel->info->rx.param = cpu_to_le32(value); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) #define GET_TX_CHANNEL_FLAG(channel, param) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) BUILD_BUG_ON(sizeof(channel->info->tx.param) != sizeof(u8)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) channel->info_word ? \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) le32_to_cpu(channel->info_word->tx.param) : \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) channel->info->tx.param; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #define GET_TX_CHANNEL_INFO(channel, param) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) BUILD_BUG_ON(sizeof(channel->info->tx.param) != sizeof(u32)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) le32_to_cpu(channel->info_word ? \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) channel->info_word->tx.param : \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) channel->info->tx.param); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) #define SET_TX_CHANNEL_FLAG(channel, param, value) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) BUILD_BUG_ON(sizeof(channel->info->tx.param) != sizeof(u8)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) if (channel->info_word) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) channel->info_word->tx.param = cpu_to_le32(value); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) else \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) channel->info->tx.param = value; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) #define SET_TX_CHANNEL_INFO(channel, param, value) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) BUILD_BUG_ON(sizeof(channel->info->tx.param) != sizeof(u32)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (channel->info_word) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) channel->info_word->tx.param = cpu_to_le32(value); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) else \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) channel->info->tx.param = cpu_to_le32(value); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * struct qcom_smd_alloc_entry - channel allocation entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) * @name: channel name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) * @cid: channel index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) * @flags: channel flags and edge id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) * @ref_count: reference count of the channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct qcom_smd_alloc_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) u8 name[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) __le32 cid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) __le32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) __le32 ref_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) #define SMD_CHANNEL_FLAGS_EDGE_MASK 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) #define SMD_CHANNEL_FLAGS_STREAM BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) #define SMD_CHANNEL_FLAGS_PACKET BIT(9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) * Each smd packet contains a 20 byte header, with the first 4 being the length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) * of the packet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) #define SMD_PACKET_HEADER_LEN 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * Signal the remote processor associated with 'channel'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) static void qcom_smd_signal_channel(struct qcom_smd_channel *channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) struct qcom_smd_edge *edge = channel->edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (edge->mbox_chan) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * We can ignore a failing mbox_send_message() as the only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) * possible cause is that the FIFO in the framework is full of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * other writes to the same bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) mbox_send_message(edge->mbox_chan, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) mbox_client_txdone(edge->mbox_chan, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) regmap_write(edge->ipc_regmap, edge->ipc_offset, BIT(edge->ipc_bit));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) * Initialize the tx channel info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static void qcom_smd_channel_reset(struct qcom_smd_channel *channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) SET_TX_CHANNEL_INFO(channel, state, SMD_CHANNEL_CLOSED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) SET_TX_CHANNEL_FLAG(channel, fDSR, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) SET_TX_CHANNEL_FLAG(channel, fCTS, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) SET_TX_CHANNEL_FLAG(channel, fCD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) SET_TX_CHANNEL_FLAG(channel, fRI, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) SET_TX_CHANNEL_FLAG(channel, fHEAD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) SET_TX_CHANNEL_FLAG(channel, fTAIL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) SET_TX_CHANNEL_FLAG(channel, fSTATE, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) SET_TX_CHANNEL_FLAG(channel, fBLOCKREADINTR, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) SET_TX_CHANNEL_INFO(channel, head, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) SET_RX_CHANNEL_INFO(channel, tail, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) qcom_smd_signal_channel(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) channel->state = SMD_CHANNEL_CLOSED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) channel->pkt_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * Set the callback for a channel, with appropriate locking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) static void qcom_smd_channel_set_callback(struct qcom_smd_channel *channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) rpmsg_rx_cb_t cb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) struct rpmsg_endpoint *ept = &channel->qsept->ept;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) spin_lock_irqsave(&channel->recv_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) ept->cb = cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) spin_unlock_irqrestore(&channel->recv_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) * Calculate the amount of data available in the rx fifo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static size_t qcom_smd_channel_get_rx_avail(struct qcom_smd_channel *channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) unsigned head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) unsigned tail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) head = GET_RX_CHANNEL_INFO(channel, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) tail = GET_RX_CHANNEL_INFO(channel, tail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return (head - tail) & (channel->fifo_size - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) * Set tx channel state and inform the remote processor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) static void qcom_smd_channel_set_state(struct qcom_smd_channel *channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) int state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) struct qcom_smd_edge *edge = channel->edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) bool is_open = state == SMD_CHANNEL_OPENED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) if (channel->state == state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) dev_dbg(&edge->dev, "set_state(%s, %d)\n", channel->name, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) SET_TX_CHANNEL_FLAG(channel, fDSR, is_open);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) SET_TX_CHANNEL_FLAG(channel, fCTS, is_open);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) SET_TX_CHANNEL_FLAG(channel, fCD, is_open);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) SET_TX_CHANNEL_INFO(channel, state, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) SET_TX_CHANNEL_FLAG(channel, fSTATE, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) channel->state = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) qcom_smd_signal_channel(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) * Copy count bytes of data using 32bit accesses, if that's required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) static void smd_copy_to_fifo(void __iomem *dst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) const void *src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) size_t count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) bool word_aligned)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) if (word_aligned) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) __iowrite32_copy(dst, src, count / sizeof(u32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) memcpy_toio(dst, src, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) * Copy count bytes of data using 32bit accesses, if that is required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) static void smd_copy_from_fifo(void *dst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) const void __iomem *src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) size_t count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) bool word_aligned)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (word_aligned) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) __ioread32_copy(dst, src, count / sizeof(u32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) memcpy_fromio(dst, src, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) * Read count bytes of data from the rx fifo into buf, but don't advance the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) * tail.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static size_t qcom_smd_channel_peek(struct qcom_smd_channel *channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) void *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) bool word_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) unsigned tail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) size_t len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) word_aligned = channel->info_word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) tail = GET_RX_CHANNEL_INFO(channel, tail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) len = min_t(size_t, count, channel->fifo_size - tail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) if (len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) smd_copy_from_fifo(buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) channel->rx_fifo + tail,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) word_aligned);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) if (len != count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) smd_copy_from_fifo(buf + len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) channel->rx_fifo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) count - len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) word_aligned);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) * Advance the rx tail by count bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) static void qcom_smd_channel_advance(struct qcom_smd_channel *channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) unsigned tail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) tail = GET_RX_CHANNEL_INFO(channel, tail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) tail += count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) tail &= (channel->fifo_size - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) SET_RX_CHANNEL_INFO(channel, tail, tail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) * Read out a single packet from the rx fifo and deliver it to the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) static int qcom_smd_channel_recv_single(struct qcom_smd_channel *channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) struct rpmsg_endpoint *ept = &channel->qsept->ept;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) unsigned tail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) size_t len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) void *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) tail = GET_RX_CHANNEL_INFO(channel, tail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) /* Use bounce buffer if the data wraps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) if (tail + channel->pkt_size >= channel->fifo_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) ptr = channel->bounce_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) len = qcom_smd_channel_peek(channel, ptr, channel->pkt_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) ptr = channel->rx_fifo + tail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) len = channel->pkt_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) ret = ept->cb(ept->rpdev, ptr, len, ept->priv, RPMSG_ADDR_ANY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) /* Only forward the tail if the client consumed the data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) qcom_smd_channel_advance(channel, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) channel->pkt_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) * Per channel interrupt handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) static bool qcom_smd_channel_intr(struct qcom_smd_channel *channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) bool need_state_scan = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) int remote_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) __le32 pktlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) int avail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) /* Handle state changes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) remote_state = GET_RX_CHANNEL_INFO(channel, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) if (remote_state != channel->remote_state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) channel->remote_state = remote_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) need_state_scan = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) wake_up_interruptible_all(&channel->state_change_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) /* Indicate that we have seen any state change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) SET_RX_CHANNEL_FLAG(channel, fSTATE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) /* Signal waiting qcom_smd_send() about the interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) if (!GET_TX_CHANNEL_FLAG(channel, fBLOCKREADINTR))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) wake_up_interruptible_all(&channel->fblockread_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) /* Don't consume any data until we've opened the channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) if (channel->state != SMD_CHANNEL_OPENED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) /* Indicate that we've seen the new data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) SET_RX_CHANNEL_FLAG(channel, fHEAD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) /* Consume data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) for (;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) avail = qcom_smd_channel_get_rx_avail(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) if (!channel->pkt_size && avail >= SMD_PACKET_HEADER_LEN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) qcom_smd_channel_peek(channel, &pktlen, sizeof(pktlen));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) qcom_smd_channel_advance(channel, SMD_PACKET_HEADER_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) channel->pkt_size = le32_to_cpu(pktlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) } else if (channel->pkt_size && avail >= channel->pkt_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) ret = qcom_smd_channel_recv_single(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) /* Indicate that we have seen and updated tail */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) SET_RX_CHANNEL_FLAG(channel, fTAIL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) /* Signal the remote that we've consumed the data (if requested) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (!GET_RX_CHANNEL_FLAG(channel, fBLOCKREADINTR)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) /* Ensure ordering of channel info updates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) qcom_smd_signal_channel(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) return need_state_scan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) * The edge interrupts are triggered by the remote processor on state changes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) * channel info updates or when new channels are created.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) static irqreturn_t qcom_smd_edge_intr(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) struct qcom_smd_edge *edge = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) struct qcom_smd_channel *channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) unsigned available;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) bool kick_scanner = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) bool kick_state = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) * Handle state changes or data on each of the channels on this edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) spin_lock(&edge->channels_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) list_for_each_entry(channel, &edge->channels, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) spin_lock(&channel->recv_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) kick_state |= qcom_smd_channel_intr(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) spin_unlock(&channel->recv_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) spin_unlock(&edge->channels_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) * Creating a new channel requires allocating an smem entry, so we only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) * have to scan if the amount of available space in smem have changed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) * since last scan.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) available = qcom_smem_get_free_space(edge->remote_pid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) if (available != edge->smem_available) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) edge->smem_available = available;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) kick_scanner = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) if (kick_scanner)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) schedule_work(&edge->scan_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) if (kick_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) schedule_work(&edge->state_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) * Calculate how much space is available in the tx fifo.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) static size_t qcom_smd_get_tx_avail(struct qcom_smd_channel *channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) unsigned head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) unsigned tail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) unsigned mask = channel->fifo_size - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) head = GET_TX_CHANNEL_INFO(channel, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) tail = GET_TX_CHANNEL_INFO(channel, tail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) return mask - ((head - tail) & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) * Write count bytes of data into channel, possibly wrapping in the ring buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) static int qcom_smd_write_fifo(struct qcom_smd_channel *channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) const void *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) bool word_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) unsigned head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) size_t len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) word_aligned = channel->info_word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) head = GET_TX_CHANNEL_INFO(channel, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) len = min_t(size_t, count, channel->fifo_size - head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) if (len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) smd_copy_to_fifo(channel->tx_fifo + head,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) word_aligned);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) if (len != count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) smd_copy_to_fifo(channel->tx_fifo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) data + len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) count - len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) word_aligned);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) head += count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) head &= (channel->fifo_size - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) SET_TX_CHANNEL_INFO(channel, head, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) * qcom_smd_send - write data to smd channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) * @channel: channel handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) * @data: buffer of data to write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) * @len: number of bytes to write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) * @wait: flag to indicate if write has ca wait
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) * This is a blocking write of len bytes into the channel's tx ring buffer and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) * signal the remote end. It will sleep until there is enough space available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) * in the tx buffer, utilizing the fBLOCKREADINTR signaling mechanism to avoid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) * polling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) static int __qcom_smd_send(struct qcom_smd_channel *channel, const void *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) int len, bool wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) __le32 hdr[5] = { cpu_to_le32(len), };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) int tlen = sizeof(hdr) + len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) /* Word aligned channels only accept word size aligned data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) if (channel->info_word && len % 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) /* Reject packets that are too big */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) if (tlen >= channel->fifo_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) /* Highlight the fact that if we enter the loop below we might sleep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) if (wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) might_sleep();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) spin_lock_irqsave(&channel->tx_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) while (qcom_smd_get_tx_avail(channel) < tlen &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) channel->state == SMD_CHANNEL_OPENED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) if (!wait) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) ret = -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) SET_TX_CHANNEL_FLAG(channel, fBLOCKREADINTR, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) /* Wait without holding the tx_lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) spin_unlock_irqrestore(&channel->tx_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) ret = wait_event_interruptible(channel->fblockread_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) qcom_smd_get_tx_avail(channel) >= tlen ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) channel->state != SMD_CHANNEL_OPENED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) spin_lock_irqsave(&channel->tx_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) SET_TX_CHANNEL_FLAG(channel, fBLOCKREADINTR, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) /* Fail if the channel was closed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) if (channel->state != SMD_CHANNEL_OPENED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) ret = -EPIPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) SET_TX_CHANNEL_FLAG(channel, fTAIL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) qcom_smd_write_fifo(channel, hdr, sizeof(hdr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) qcom_smd_write_fifo(channel, data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) SET_TX_CHANNEL_FLAG(channel, fHEAD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) /* Ensure ordering of channel info updates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) qcom_smd_signal_channel(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) out_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) spin_unlock_irqrestore(&channel->tx_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) * Helper for opening a channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) static int qcom_smd_channel_open(struct qcom_smd_channel *channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) rpmsg_rx_cb_t cb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) struct qcom_smd_edge *edge = channel->edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) size_t bb_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) * Packets are maximum 4k, but reduce if the fifo is smaller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) bb_size = min(channel->fifo_size, SZ_4K);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) channel->bounce_buffer = kmalloc(bb_size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) if (!channel->bounce_buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) qcom_smd_channel_set_callback(channel, cb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) qcom_smd_channel_set_state(channel, SMD_CHANNEL_OPENING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) /* Wait for remote to enter opening or opened */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) ret = wait_event_interruptible_timeout(channel->state_change_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) channel->remote_state == SMD_CHANNEL_OPENING ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) channel->remote_state == SMD_CHANNEL_OPENED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) dev_err(&edge->dev, "remote side did not enter opening state\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) goto out_close_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) qcom_smd_channel_set_state(channel, SMD_CHANNEL_OPENED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) /* Wait for remote to enter opened */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) ret = wait_event_interruptible_timeout(channel->state_change_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) channel->remote_state == SMD_CHANNEL_OPENED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) dev_err(&edge->dev, "remote side did not enter open state\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) goto out_close_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) out_close_timeout:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) qcom_smd_channel_set_state(channel, SMD_CHANNEL_CLOSED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) * Helper for closing and resetting a channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) static void qcom_smd_channel_close(struct qcom_smd_channel *channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) qcom_smd_channel_set_callback(channel, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) kfree(channel->bounce_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) channel->bounce_buffer = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) qcom_smd_channel_set_state(channel, SMD_CHANNEL_CLOSED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) qcom_smd_channel_reset(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) static struct qcom_smd_channel *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) qcom_smd_find_channel(struct qcom_smd_edge *edge, const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) struct qcom_smd_channel *channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) struct qcom_smd_channel *ret = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) spin_lock_irqsave(&edge->channels_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) list_for_each_entry(channel, &edge->channels, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) if (!strcmp(channel->name, name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) ret = channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) spin_unlock_irqrestore(&edge->channels_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) static void __ept_release(struct kref *kref)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) struct rpmsg_endpoint *ept = container_of(kref, struct rpmsg_endpoint,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) refcount);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) kfree(to_smd_endpoint(ept));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) static struct rpmsg_endpoint *qcom_smd_create_ept(struct rpmsg_device *rpdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) rpmsg_rx_cb_t cb, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) struct rpmsg_channel_info chinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) struct qcom_smd_endpoint *qsept;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) struct qcom_smd_channel *channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) struct qcom_smd_device *qsdev = to_smd_device(rpdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) struct qcom_smd_edge *edge = qsdev->edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) struct rpmsg_endpoint *ept;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) const char *name = chinfo.name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) /* Wait up to HZ for the channel to appear */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) ret = wait_event_interruptible_timeout(edge->new_channel_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) (channel = qcom_smd_find_channel(edge, name)) != NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) if (channel->state != SMD_CHANNEL_CLOSED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) dev_err(&rpdev->dev, "channel %s is busy\n", channel->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) qsept = kzalloc(sizeof(*qsept), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) if (!qsept)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) ept = &qsept->ept;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) kref_init(&ept->refcount);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) ept->rpdev = rpdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) ept->cb = cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) ept->priv = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) ept->ops = &qcom_smd_endpoint_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) channel->qsept = qsept;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) qsept->qsch = channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) ret = qcom_smd_channel_open(channel, cb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) goto free_ept;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) return ept;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) free_ept:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) channel->qsept = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) kref_put(&ept->refcount, __ept_release);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) static void qcom_smd_destroy_ept(struct rpmsg_endpoint *ept)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) struct qcom_smd_endpoint *qsept = to_smd_endpoint(ept);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) struct qcom_smd_channel *ch = qsept->qsch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) qcom_smd_channel_close(ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) ch->qsept = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) kref_put(&ept->refcount, __ept_release);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) static int qcom_smd_send(struct rpmsg_endpoint *ept, void *data, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) struct qcom_smd_endpoint *qsept = to_smd_endpoint(ept);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) return __qcom_smd_send(qsept->qsch, data, len, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) static int qcom_smd_trysend(struct rpmsg_endpoint *ept, void *data, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) struct qcom_smd_endpoint *qsept = to_smd_endpoint(ept);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) return __qcom_smd_send(qsept->qsch, data, len, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) static __poll_t qcom_smd_poll(struct rpmsg_endpoint *ept,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) struct file *filp, poll_table *wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) struct qcom_smd_endpoint *qsept = to_smd_endpoint(ept);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) struct qcom_smd_channel *channel = qsept->qsch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) __poll_t mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) poll_wait(filp, &channel->fblockread_event, wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) if (qcom_smd_get_tx_avail(channel) > 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) mask |= EPOLLOUT | EPOLLWRNORM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) return mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) * Finds the device_node for the smd child interested in this channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) static struct device_node *qcom_smd_match_channel(struct device_node *edge_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) const char *channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) struct device_node *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) const char *key;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) for_each_available_child_of_node(edge_node, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) key = "qcom,smd-channels";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) ret = of_property_read_string(child, key, &name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) if (strcmp(name, channel) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) return child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) static int qcom_smd_announce_create(struct rpmsg_device *rpdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) struct qcom_smd_endpoint *qept = to_smd_endpoint(rpdev->ept);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) struct qcom_smd_channel *channel = qept->qsch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) bool kick_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) spin_lock_irqsave(&channel->recv_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) kick_state = qcom_smd_channel_intr(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) spin_unlock_irqrestore(&channel->recv_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) if (kick_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) schedule_work(&channel->edge->state_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) static const struct rpmsg_device_ops qcom_smd_device_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) .create_ept = qcom_smd_create_ept,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) .announce_create = qcom_smd_announce_create,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) static const struct rpmsg_endpoint_ops qcom_smd_endpoint_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) .destroy_ept = qcom_smd_destroy_ept,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) .send = qcom_smd_send,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) .trysend = qcom_smd_trysend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) .poll = qcom_smd_poll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) static void qcom_smd_release_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) struct rpmsg_device *rpdev = to_rpmsg_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) struct qcom_smd_device *qsdev = to_smd_device(rpdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) kfree(qsdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) * Create a smd client device for channel that is being opened.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) static int qcom_smd_create_device(struct qcom_smd_channel *channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) struct qcom_smd_device *qsdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) struct rpmsg_device *rpdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) struct qcom_smd_edge *edge = channel->edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) dev_dbg(&edge->dev, "registering '%s'\n", channel->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) qsdev = kzalloc(sizeof(*qsdev), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) if (!qsdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) /* Link qsdev to our SMD edge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) qsdev->edge = edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) /* Assign callbacks for rpmsg_device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) qsdev->rpdev.ops = &qcom_smd_device_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) /* Assign public information to the rpmsg_device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) rpdev = &qsdev->rpdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) strncpy(rpdev->id.name, channel->name, RPMSG_NAME_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) rpdev->src = RPMSG_ADDR_ANY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) rpdev->dst = RPMSG_ADDR_ANY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) rpdev->dev.of_node = qcom_smd_match_channel(edge->of_node, channel->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) rpdev->dev.parent = &edge->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) rpdev->dev.release = qcom_smd_release_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) return rpmsg_register_device(rpdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) static int qcom_smd_create_chrdev(struct qcom_smd_edge *edge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) struct qcom_smd_device *qsdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) qsdev = kzalloc(sizeof(*qsdev), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) if (!qsdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) qsdev->edge = edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) qsdev->rpdev.ops = &qcom_smd_device_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) qsdev->rpdev.dev.parent = &edge->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) qsdev->rpdev.dev.release = qcom_smd_release_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) return rpmsg_chrdev_register_device(&qsdev->rpdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) * Allocate the qcom_smd_channel object for a newly found smd channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) * retrieving and validating the smem items involved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) static struct qcom_smd_channel *qcom_smd_create_channel(struct qcom_smd_edge *edge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) unsigned smem_info_item,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) unsigned smem_fifo_item,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) struct qcom_smd_channel *channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) size_t fifo_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) size_t info_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) void *fifo_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) void *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) channel = kzalloc(sizeof(*channel), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) if (!channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) channel->edge = edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) channel->name = kstrdup(name, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) if (!channel->name) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) goto free_channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) spin_lock_init(&channel->tx_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) spin_lock_init(&channel->recv_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) init_waitqueue_head(&channel->fblockread_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) init_waitqueue_head(&channel->state_change_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) info = qcom_smem_get(edge->remote_pid, smem_info_item, &info_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) if (IS_ERR(info)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) ret = PTR_ERR(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) goto free_name_and_channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) * Use the size of the item to figure out which channel info struct to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) * use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) if (info_size == 2 * sizeof(struct smd_channel_info_word)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) channel->info_word = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) } else if (info_size == 2 * sizeof(struct smd_channel_info)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) channel->info = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) dev_err(&edge->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) "channel info of size %zu not supported\n", info_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) goto free_name_and_channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) fifo_base = qcom_smem_get(edge->remote_pid, smem_fifo_item, &fifo_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) if (IS_ERR(fifo_base)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) ret = PTR_ERR(fifo_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) goto free_name_and_channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) /* The channel consist of a rx and tx fifo of equal size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) fifo_size /= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) dev_dbg(&edge->dev, "new channel '%s' info-size: %zu fifo-size: %zu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) name, info_size, fifo_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) channel->tx_fifo = fifo_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) channel->rx_fifo = fifo_base + fifo_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) channel->fifo_size = fifo_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) qcom_smd_channel_reset(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) return channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) free_name_and_channel:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) kfree(channel->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) free_channel:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) kfree(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) * Scans the allocation table for any newly allocated channels, calls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) * qcom_smd_create_channel() to create representations of these and add
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) * them to the edge's list of channels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) static void qcom_channel_scan_worker(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) struct qcom_smd_edge *edge = container_of(work, struct qcom_smd_edge, scan_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) struct qcom_smd_alloc_entry *alloc_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) struct qcom_smd_alloc_entry *entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) struct qcom_smd_channel *channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) unsigned fifo_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) unsigned info_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) int tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) u32 eflags, cid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) for (tbl = 0; tbl < SMD_ALLOC_TBL_COUNT; tbl++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) alloc_tbl = qcom_smem_get(edge->remote_pid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) smem_items[tbl].alloc_tbl_id, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) if (IS_ERR(alloc_tbl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) for (i = 0; i < SMD_ALLOC_TBL_SIZE; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) entry = &alloc_tbl[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) eflags = le32_to_cpu(entry->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) if (test_bit(i, edge->allocated[tbl]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) if (entry->ref_count == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) if (!entry->name[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) if (!(eflags & SMD_CHANNEL_FLAGS_PACKET))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) if ((eflags & SMD_CHANNEL_FLAGS_EDGE_MASK) != edge->edge_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) cid = le32_to_cpu(entry->cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) info_id = smem_items[tbl].info_base_id + cid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) fifo_id = smem_items[tbl].fifo_base_id + cid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) channel = qcom_smd_create_channel(edge, info_id, fifo_id, entry->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) if (IS_ERR(channel))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) spin_lock_irqsave(&edge->channels_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) list_add(&channel->list, &edge->channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) spin_unlock_irqrestore(&edge->channels_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) dev_dbg(&edge->dev, "new channel found: '%s'\n", channel->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) set_bit(i, edge->allocated[tbl]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) wake_up_interruptible_all(&edge->new_channel_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) schedule_work(&edge->state_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) * This per edge worker scans smem for any new channels and register these. It
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) * then scans all registered channels for state changes that should be handled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) * by creating or destroying smd client devices for the registered channels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) * LOCKING: edge->channels_lock only needs to cover the list operations, as the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) * worker is killed before any channels are deallocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) static void qcom_channel_state_worker(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) struct qcom_smd_channel *channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) struct qcom_smd_edge *edge = container_of(work,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) struct qcom_smd_edge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) state_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) struct rpmsg_channel_info chinfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) unsigned remote_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) * Register a device for any closed channel where the remote processor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) * is showing interest in opening the channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) spin_lock_irqsave(&edge->channels_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) list_for_each_entry(channel, &edge->channels, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) if (channel->state != SMD_CHANNEL_CLOSED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) remote_state = GET_RX_CHANNEL_INFO(channel, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) if (remote_state != SMD_CHANNEL_OPENING &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) remote_state != SMD_CHANNEL_OPENED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) if (channel->registered)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) spin_unlock_irqrestore(&edge->channels_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) qcom_smd_create_device(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) channel->registered = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) spin_lock_irqsave(&edge->channels_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) channel->registered = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) * Unregister the device for any channel that is opened where the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) * remote processor is closing the channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) list_for_each_entry(channel, &edge->channels, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) if (channel->state != SMD_CHANNEL_OPENING &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) channel->state != SMD_CHANNEL_OPENED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) remote_state = GET_RX_CHANNEL_INFO(channel, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) if (remote_state == SMD_CHANNEL_OPENING ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) remote_state == SMD_CHANNEL_OPENED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) spin_unlock_irqrestore(&edge->channels_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) strncpy(chinfo.name, channel->name, sizeof(chinfo.name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) chinfo.src = RPMSG_ADDR_ANY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) chinfo.dst = RPMSG_ADDR_ANY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) rpmsg_unregister_device(&edge->dev, &chinfo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) channel->registered = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) spin_lock_irqsave(&edge->channels_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) spin_unlock_irqrestore(&edge->channels_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) * Parses an of_node describing an edge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) static int qcom_smd_parse_edge(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) struct device_node *node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) struct qcom_smd_edge *edge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) struct device_node *syscon_np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) const char *key;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) INIT_LIST_HEAD(&edge->channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) spin_lock_init(&edge->channels_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) INIT_WORK(&edge->scan_work, qcom_channel_scan_worker);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) INIT_WORK(&edge->state_work, qcom_channel_state_worker);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) edge->of_node = of_node_get(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) key = "qcom,smd-edge";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) ret = of_property_read_u32(node, key, &edge->edge_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) dev_err(dev, "edge missing %s property\n", key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) goto put_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) edge->remote_pid = QCOM_SMEM_HOST_ANY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) key = "qcom,remote-pid";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) of_property_read_u32(node, key, &edge->remote_pid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) edge->mbox_client.dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) edge->mbox_client.knows_txdone = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) edge->mbox_chan = mbox_request_channel(&edge->mbox_client, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) if (IS_ERR(edge->mbox_chan)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) if (PTR_ERR(edge->mbox_chan) != -ENODEV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) ret = PTR_ERR(edge->mbox_chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) goto put_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) edge->mbox_chan = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) syscon_np = of_parse_phandle(node, "qcom,ipc", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) if (!syscon_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) dev_err(dev, "no qcom,ipc node\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) goto put_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) edge->ipc_regmap = syscon_node_to_regmap(syscon_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) if (IS_ERR(edge->ipc_regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) ret = PTR_ERR(edge->ipc_regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) goto put_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) key = "qcom,ipc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) ret = of_property_read_u32_index(node, key, 1, &edge->ipc_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) dev_err(dev, "no offset in %s\n", key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) goto put_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) ret = of_property_read_u32_index(node, key, 2, &edge->ipc_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) dev_err(dev, "no bit in %s\n", key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) goto put_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) ret = of_property_read_string(node, "label", &edge->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) edge->name = node->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) irq = irq_of_parse_and_map(node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) if (irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) dev_err(dev, "required smd interrupt missing\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) ret = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) goto put_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) ret = devm_request_irq(dev, irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) qcom_smd_edge_intr, IRQF_TRIGGER_RISING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) node->name, edge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) dev_err(dev, "failed to request smd irq\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) goto put_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) edge->irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) put_node:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) of_node_put(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) edge->of_node = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) * Release function for an edge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) * Reset the state of each associated channel and free the edge context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) static void qcom_smd_edge_release(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) struct qcom_smd_channel *channel, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) struct qcom_smd_edge *edge = to_smd_edge(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) list_for_each_entry_safe(channel, tmp, &edge->channels, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) list_del(&channel->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) kfree(channel->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) kfree(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) kfree(edge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) static ssize_t rpmsg_name_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) struct qcom_smd_edge *edge = to_smd_edge(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) return sprintf(buf, "%s\n", edge->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) static DEVICE_ATTR_RO(rpmsg_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) static struct attribute *qcom_smd_edge_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) &dev_attr_rpmsg_name.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) ATTRIBUTE_GROUPS(qcom_smd_edge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) * qcom_smd_register_edge() - register an edge based on an device_node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) * @parent: parent device for the edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) * @node: device_node describing the edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) * Returns an edge reference, or negative ERR_PTR() on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) struct qcom_smd_edge *qcom_smd_register_edge(struct device *parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) struct qcom_smd_edge *edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) edge = kzalloc(sizeof(*edge), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) if (!edge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) init_waitqueue_head(&edge->new_channel_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) edge->dev.parent = parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) edge->dev.release = qcom_smd_edge_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) edge->dev.of_node = node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) edge->dev.groups = qcom_smd_edge_groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) dev_set_name(&edge->dev, "%s:%pOFn", dev_name(parent), node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) ret = device_register(&edge->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) pr_err("failed to register smd edge\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) put_device(&edge->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) ret = qcom_smd_parse_edge(&edge->dev, node, edge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) dev_err(&edge->dev, "failed to parse smd edge\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) goto unregister_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) ret = qcom_smd_create_chrdev(edge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) dev_err(&edge->dev, "failed to register chrdev for edge\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) goto unregister_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) schedule_work(&edge->scan_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) return edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) unregister_dev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) if (!IS_ERR_OR_NULL(edge->mbox_chan))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) mbox_free_channel(edge->mbox_chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) device_unregister(&edge->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) EXPORT_SYMBOL(qcom_smd_register_edge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) static int qcom_smd_remove_device(struct device *dev, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) device_unregister(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) * qcom_smd_unregister_edge() - release an edge and its children
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) * @edge: edge reference acquired from qcom_smd_register_edge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) int qcom_smd_unregister_edge(struct qcom_smd_edge *edge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) disable_irq(edge->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) cancel_work_sync(&edge->scan_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) cancel_work_sync(&edge->state_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) ret = device_for_each_child(&edge->dev, NULL, qcom_smd_remove_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) dev_warn(&edge->dev, "can't remove smd device: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) mbox_free_channel(edge->mbox_chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) device_unregister(&edge->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) EXPORT_SYMBOL(qcom_smd_unregister_edge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) static int qcom_smd_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) struct device_node *node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) void *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) /* Wait for smem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) p = qcom_smem_get(QCOM_SMEM_HOST_ANY, smem_items[0].alloc_tbl_id, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) if (PTR_ERR(p) == -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) return PTR_ERR(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) for_each_available_child_of_node(pdev->dev.of_node, node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) qcom_smd_register_edge(&pdev->dev, node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) static int qcom_smd_remove_edge(struct device *dev, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) struct qcom_smd_edge *edge = to_smd_edge(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) return qcom_smd_unregister_edge(edge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) * Shut down all smd clients by making sure that each edge stops processing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) * events and scanning for new channels, then call destroy on the devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) static int qcom_smd_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) ret = device_for_each_child(&pdev->dev, NULL, qcom_smd_remove_edge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) dev_warn(&pdev->dev, "can't remove smd device: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) static const struct of_device_id qcom_smd_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) { .compatible = "qcom,smd" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) MODULE_DEVICE_TABLE(of, qcom_smd_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) static struct platform_driver qcom_smd_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) .probe = qcom_smd_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) .remove = qcom_smd_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) .name = "qcom-smd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) .of_match_table = qcom_smd_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) static int __init qcom_smd_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) return platform_driver_register(&qcom_smd_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) subsys_initcall(qcom_smd_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) static void __exit qcom_smd_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) platform_driver_unregister(&qcom_smd_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) module_exit(qcom_smd_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) MODULE_DESCRIPTION("Qualcomm Shared Memory Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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