^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) Rockchip Electronics Co.Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Felix Zeng <felix.zeng@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef __LINUX_RKNPU_MM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define __LINUX_RKNPU_MM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/iommu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/dma-iommu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/iova.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "rknpu_drv.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct rknpu_mm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) void *bitmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) unsigned int chunk_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) unsigned int total_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) unsigned int free_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct rknpu_mm_obj {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) uint32_t range_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) uint32_t range_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) int rknpu_mm_create(unsigned int mem_size, unsigned int chunk_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct rknpu_mm **mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) void rknpu_mm_destroy(struct rknpu_mm *mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) int rknpu_mm_alloc(struct rknpu_mm *mm, unsigned int size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct rknpu_mm_obj **mm_obj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int rknpu_mm_free(struct rknpu_mm *mm, struct rknpu_mm_obj *mm_obj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int rknpu_mm_dump(struct seq_file *m, void *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) enum iommu_dma_cookie_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) IOMMU_DMA_IOVA_COOKIE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) IOMMU_DMA_MSI_COOKIE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct rknpu_iommu_dma_cookie {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) enum iommu_dma_cookie_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* Full allocator for IOMMU_DMA_IOVA_COOKIE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct iova_domain iovad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) dma_addr_t rknpu_iommu_dma_alloc_iova(struct iommu_domain *domain, size_t size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) u64 dma_limit, struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) void rknpu_iommu_dma_free_iova(struct rknpu_iommu_dma_cookie *cookie,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) dma_addr_t iova, size_t size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #endif