^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) Rockchip Electronics Co.Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Felix Zeng <felix.zeng@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef __LINUX_RKNPU_JOB_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define __LINUX_RKNPU_JOB_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/dma-fence.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <drm/drm_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "rknpu_ioctl.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define RKNPU_MAX_CORES 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define RKNPU_JOB_DONE (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define RKNPU_JOB_ASYNC (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define RKNPU_JOB_DETACHED (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define RKNPU_CORE_AUTO_MASK 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define RKNPU_CORE0_MASK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define RKNPU_CORE1_MASK 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define RKNPU_CORE2_MASK 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct rknpu_job {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct rknpu_device *rknpu_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct list_head head[RKNPU_MAX_CORES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct work_struct cleanup_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) bool in_queue[RKNPU_MAX_CORES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) bool irq_entry[RKNPU_MAX_CORES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) unsigned int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct rknpu_submit *args;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) bool args_owner;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct rknpu_task *first_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct rknpu_task *last_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) uint32_t int_mask[RKNPU_MAX_CORES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) uint32_t int_status[RKNPU_MAX_CORES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct dma_fence *fence;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) ktime_t timestamp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) uint32_t use_core_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) uint32_t run_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) uint32_t interrupt_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) ktime_t hw_recoder_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) irqreturn_t rknpu_core0_irq_handler(int irq, void *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) irqreturn_t rknpu_core1_irq_handler(int irq, void *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) irqreturn_t rknpu_core2_irq_handler(int irq, void *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #ifdef CONFIG_ROCKCHIP_RKNPU_DRM_GEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int rknpu_submit_ioctl(struct drm_device *dev, void *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct drm_file *file_priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #ifdef CONFIG_ROCKCHIP_RKNPU_DMA_HEAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) int rknpu_submit_ioctl(struct rknpu_device *rknpu_dev, unsigned long data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) int rknpu_get_hw_version(struct rknpu_device *rknpu_dev, uint32_t *version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int rknpu_get_bw_priority(struct rknpu_device *rknpu_dev, uint32_t *priority,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) uint32_t *expect, uint32_t *tw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) int rknpu_set_bw_priority(struct rknpu_device *rknpu_dev, uint32_t priority,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) uint32_t expect, uint32_t tw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) int rknpu_clear_rw_amount(struct rknpu_device *rknpu_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int rknpu_get_rw_amount(struct rknpu_device *rknpu_dev, uint32_t *dt_wr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) uint32_t *dt_rd, uint32_t *wd_rd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) int rknpu_get_total_rw_amount(struct rknpu_device *rknpu_dev, uint32_t *amount);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #endif /* __LINUX_RKNPU_JOB_H_ */