^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) /* Copyright (c) 2018 Rockchip Electronics Co. Ltd. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #ifndef __SFC_NAND_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define __SFC_NAND_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include "flash_com.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include "sfc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define SFC_NAND_WAIT_TIME_OUT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define SFC_NAND_PROG_ERASE_ERROR 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define SFC_NAND_HW_ERROR 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define SFC_NAND_ECC_ERROR NAND_ERROR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define SFC_NAND_ECC_REFRESH NAND_STS_REFRESH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define SFC_NAND_ECC_OK NAND_STS_OK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define SFC_NAND_PAGE_MAX_SIZE 4224
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define SFC_NAND_SECTOR_FULL_SIZE 528
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define SFC_NAND_SECTOR_SIZE 512
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define FEA_READ_STATUE_MASK (0x3 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define FEA_STATUE_MODE1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define FEA_STATUE_MODE2 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define FEA_4BIT_READ BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define FEA_4BIT_PROG BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define FEA_4BYTE_ADDR BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define FEA_4BYTE_ADDR_MODE BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define FEA_SOFT_QOP_BIT BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* Command Set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define CMD_READ_JEDECID (0x9F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define CMD_READ_DATA (0x03)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define CMD_READ_STATUS (0x05)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define CMD_WRITE_STATUS (0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define CMD_PAGE_PROG (0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define CMD_SECTOR_ERASE (0x20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define CMD_BLK64K_ERASE (0xD8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define CMD_BLK32K_ERASE (0x52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define CMD_CHIP_ERASE (0xC7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define CMD_WRITE_EN (0x06)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define CMD_WRITE_DIS (0x04)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define CMD_PAGE_READ (0x13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define CMD_GET_FEATURE (0x0F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define CMD_SET_FEATURE (0x1F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define CMD_PROG_LOAD (0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define CMD_PROG_EXEC (0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define CMD_BLOCK_ERASE (0xD8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define CMD_READ_DATA_X2 (0x3B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define CMD_READ_DATA_X4 (0x6B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define CMD_PROG_LOAD_X4 (0x32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define CMD_READ_STATUS2 (0x35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define CMD_READ_STATUS3 (0x15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define CMD_WRITE_STATUS2 (0x31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define CMD_WRITE_STATUS3 (0x11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define CMD_FAST_READ_X1 (0x0B) /* X1 cmd, X1 addr, X1 data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define CMD_FAST_READ_X2 (0x3B) /* X1 cmd, X1 addr, X2 data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* X1 cmd, X1 addr, X4 data SUPPORT GD MARCONIX WINBOND */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define CMD_FAST_READ_X4 (0x6B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* X1 cmd, X1 addr, X4 data SUPPORT GD MARCONIX WINBOND */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define CMD_FAST_4READ_X4 (0x6C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* X1 cmd, X4 addr, X4 data SUPPORT EON GD MARCONIX WINBOND */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define CMD_FAST_READ_A4 (0xEB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* X1 cmd, X1 addr, X4 data, SUPPORT GD WINBOND */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define CMD_PAGE_PROG_X4 (0x32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* X1 cmd, X4 addr, X4 data, SUPPORT MARCONIX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define CMD_PAGE_PROG_A4 (0x38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define CMD_RESET_NAND (0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define CMD_ENTER_4BYTE_MODE (0xB7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define CMD_EXIT_4BYTE_MODE (0xE9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define CMD_ENABLE_RESER (0x66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define CMD_RESET_DEVICE (0x99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct SFNAND_DEV {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) u32 capacity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u32 block_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) u16 page_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) u8 manufacturer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) u8 mem_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) u8 read_lines;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) u8 prog_lines;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) u8 page_read_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) u8 page_prog_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) u8 *recheck_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct nand_mega_area {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) u8 off0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) u8 off1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) u8 off2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) u8 off3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct nand_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) u8 id0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) u8 id1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) u8 id2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) u16 sec_per_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) u16 page_per_blk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) u16 plane_per_die;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) u16 blk_per_plane;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) u8 feature;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) u8 density; /* (1 << density) sectors*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) u8 max_ecc_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) u8 has_qe_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct nand_mega_area meta;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) u32 (*ecc_status)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) extern struct nand_phy_info g_nand_phy_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) extern struct nand_ops g_nand_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u32 sfc_nand_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) void sfc_nand_deinit(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) int sfc_nand_read_id(u8 *buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) u32 sfc_nand_erase_block(u8 cs, u32 addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) u32 sfc_nand_prog_page_raw(u8 cs, u32 addr, u32 *p_page_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) u32 sfc_nand_check_bad_block(u8 cs, u32 addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) u32 sfc_nand_mark_bad_block(u8 cs, u32 addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) void sfc_nand_ftl_ops_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) struct SFNAND_DEV *sfc_nand_get_private_dev(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) struct nand_info *sfc_nand_get_nand_info(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) u32 sfc_nand_read(u32 row, u32 *p_page_buf, u32 column, u32 len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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