^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) /* Copyright (c) 2018 Rockchip Electronics Co. Ltd. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include "sfc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define SFC_MAX_IOSIZE_VER3 (1024 * 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define SFC_MAX_IOSIZE_VER4 (0xFFFFFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) static void __iomem *g_sfc_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) static void sfc_reset(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) int timeout = 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) writel(SFC_RESET, g_sfc_reg + SFC_RCVR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) while ((readl(g_sfc_reg + SFC_RCVR) == SFC_RESET) && (timeout > 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) sfc_delay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) timeout--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u16 sfc_get_version(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) return (u32)(readl(g_sfc_reg + SFC_VER) & 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u32 sfc_get_max_iosize(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) if (sfc_get_version() >= SFC_VER_4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return SFC_MAX_IOSIZE_VER4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return SFC_MAX_IOSIZE_VER3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) u32 sfc_get_max_dll_cells(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) if (sfc_get_version() == SFC_VER_5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) return SCLK_SMP_SEL_MAX_V5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) else if (sfc_get_version() == SFC_VER_4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return SCLK_SMP_SEL_MAX_V4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) void sfc_set_delay_lines(u16 cells)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) u16 cell_max = (u16)sfc_get_max_dll_cells();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) u32 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) if (cells > cell_max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) cells = cell_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (cells)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) val = SCLK_SMP_SEL_EN | cells;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) writel(val, g_sfc_reg + SFC_DLL_CTRL0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int sfc_init(void __iomem *reg_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) g_sfc_reg = reg_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) writel(0, g_sfc_reg + SFC_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (sfc_get_version() >= SFC_VER_4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) writel(1, g_sfc_reg + SFC_LEN_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return SFC_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) void sfc_clean_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) writel(0xFFFFFFFF, g_sfc_reg + SFC_IMR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int ret = SFC_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) union SFCCMD_DATA cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) int timeout = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) reg = readl(g_sfc_reg + SFC_FSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (!(reg & SFC_TXEMPTY) || !(reg & SFC_RXEMPTY) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) (readl(g_sfc_reg + SFC_SR) & SFC_BUSY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) sfc_reset();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) cmd.d32 = op->sfcmd.d32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (cmd.b.addrbits == SFC_ADDR_XBITS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) union SFCCTRL_DATA ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) ctrl.d32 = op->sfctrl.d32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (!ctrl.b.addrbits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return SFC_PARAM_ERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* Controller plus 1 automatically */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) writel(ctrl.b.addrbits - 1, g_sfc_reg + SFC_ABIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* shift in the data at negedge sclk_out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) op->sfctrl.d32 |= 0x2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) cmd.b.datasize = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (sfc_get_version() >= SFC_VER_4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) writel(size, g_sfc_reg + SFC_LEN_EXT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) cmd.b.datasize = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) writel(op->sfctrl.d32, g_sfc_reg + SFC_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) writel(cmd.d32, g_sfc_reg + SFC_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (cmd.b.addrbits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) writel(addr, g_sfc_reg + SFC_ADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (!size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) goto exit_wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (op->sfctrl.b.enbledma) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) unsigned long dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) u8 direction = (cmd.b.rw == SFC_WRITE) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) dma_addr = rksfc_dma_map_single((unsigned long)data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) direction);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) rksfc_irq_flag_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) writel(~((u32)DMA_INT), g_sfc_reg + SFC_IMR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) writel((u32)dma_addr, g_sfc_reg + SFC_DMA_ADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) writel(SFC_DMA_START, g_sfc_reg + SFC_DMA_TRIGGER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) rksfc_wait_for_irq_completed();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) timeout = size * 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) while ((readl(g_sfc_reg + SFC_SR) & SFC_BUSY) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) (timeout-- > 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) sfc_delay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (timeout <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) ret = SFC_WAIT_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) direction = (cmd.b.rw == SFC_WRITE) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) rksfc_dma_unmap_single(dma_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) direction);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) u32 i, words, count, bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) union SFCFSR_DATA fifostat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) u32 *p_data = (u32 *)data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (cmd.b.rw == SFC_WRITE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) words = (size + 3) >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) while (words) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) fifostat.d32 = readl(g_sfc_reg + SFC_FSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (fifostat.b.txlevel > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) count = words < fifostat.b.txlevel ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) words : fifostat.b.txlevel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) for (i = 0; i < count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) writel(*p_data++,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) g_sfc_reg + SFC_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) words--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (words == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) timeout = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) sfc_delay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (timeout++ > 10000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) ret = SFC_TX_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) /* SFC_READ == cmd.b.rw */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) bytes = size & 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) words = size >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) while (words) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) fifostat.d32 = readl(g_sfc_reg + SFC_FSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (fifostat.b.rxlevel > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) u32 count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) count = words < fifostat.b.rxlevel ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) words : fifostat.b.rxlevel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) for (i = 0; i < count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) *p_data++ = readl(g_sfc_reg +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) SFC_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) words--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (words == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) timeout = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) sfc_delay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (timeout++ > 10000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) ret = SFC_RX_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) timeout = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) while (bytes) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) fifostat.d32 = readl(g_sfc_reg + SFC_FSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) if (fifostat.b.rxlevel > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) u8 *p_data1 = (u8 *)p_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) words = readl(g_sfc_reg + SFC_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) for (i = 0; i < bytes; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) p_data1[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) (u8)((words >> (i * 8)) & 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) sfc_delay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) if (timeout++ > 10000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) ret = SFC_RX_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) exit_wait:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) timeout = 0; /* wait cmd or data send complete */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) while (readl(g_sfc_reg + SFC_SR) & SFC_BUSY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) sfc_delay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (timeout++ > 100000) { /* wait 100ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) ret = SFC_TX_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) sfc_delay(1); /* CS# High Time (read/write) >100ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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