Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) /* Copyright (c) 2018 Rockchip Electronics Co. Ltd. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #ifndef __RK_FLASH_API_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #define __RK_FLASH_API_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifdef CONFIG_RK_NANDC_NAND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include "flash.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifdef CONFIG_RK_SFC_NAND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "sfc_nand.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #ifdef	CONFIG_RK_SFC_NOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "sfc_nor.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) enum flash_con_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	FLASH_CON_TYPE_NANDC = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	FLASH_CON_TYPE_SFC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	FLASH_CON_TYPE_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) enum flash_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	FLASH_TYPE_NANDC_NAND = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	FLASH_TYPE_SFC_NOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	FLASH_TYPE_SFC_NAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	FLASH_TYPE_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct flash_boot_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	int (*init)(void __iomem *reg_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	int (*read)(u32 sec, u32 n_sec, void *p_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	int (*write)(u32 sec, u32 n_sec, void *p_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	u32 (*get_capacity)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	void (*deinit)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	int (*resume)(void __iomem *reg_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	int (*vendor_read)(u32 sec, u32 n_sec, void *p_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	int (*vendor_write)(u32 sec, u32 n_sec, void *p_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	int (*gc)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	int (*discard)(u32 sec, u32 n_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #ifdef CONFIG_RK_NANDC_NAND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) extern const struct flash_boot_ops nandc_nand_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #ifdef CONFIG_RK_SFC_NOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) extern struct SFNOR_DEV *sfnor_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) extern const struct flash_boot_ops sfc_nor_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #ifdef	CONFIG_RK_SFC_NAND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) extern struct SFNAND_DEV *sfnand_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) extern const struct flash_boot_ops sfc_nand_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #endif