^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * drivers/reset/reset-oxnas.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2014 Ma Haijun <mahaijuns@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2009 Oxford Semiconductor Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/reset-controller.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* Regmap offsets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define RST_SET_REGOFFSET 0x34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define RST_CLR_REGOFFSET 0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct oxnas_reset {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct reset_controller_dev rcdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static int oxnas_reset_reset(struct reset_controller_dev *rcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned long id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct oxnas_reset *data =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) container_of(rcdev, struct oxnas_reset, rcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) regmap_write(data->regmap, RST_SET_REGOFFSET, BIT(id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) regmap_write(data->regmap, RST_CLR_REGOFFSET, BIT(id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static int oxnas_reset_assert(struct reset_controller_dev *rcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) unsigned long id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct oxnas_reset *data =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) container_of(rcdev, struct oxnas_reset, rcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) regmap_write(data->regmap, RST_SET_REGOFFSET, BIT(id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static int oxnas_reset_deassert(struct reset_controller_dev *rcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) unsigned long id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct oxnas_reset *data =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) container_of(rcdev, struct oxnas_reset, rcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) regmap_write(data->regmap, RST_CLR_REGOFFSET, BIT(id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static const struct reset_control_ops oxnas_reset_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .reset = oxnas_reset_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .assert = oxnas_reset_assert,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .deassert = oxnas_reset_deassert,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static const struct of_device_id oxnas_reset_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) { .compatible = "oxsemi,ox810se-reset", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) { .compatible = "oxsemi,ox820-reset", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) { /* sentinel */ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static int oxnas_reset_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct oxnas_reset *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct device *parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) parent = pdev->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (!parent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) dev_err(&pdev->dev, "no parent\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) data->regmap = syscon_node_to_regmap(parent->of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (IS_ERR(data->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) dev_err(&pdev->dev, "failed to get parent regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return PTR_ERR(data->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) platform_set_drvdata(pdev, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) data->rcdev.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) data->rcdev.nr_resets = 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) data->rcdev.ops = &oxnas_reset_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) data->rcdev.of_node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return devm_reset_controller_register(&pdev->dev, &data->rcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static struct platform_driver oxnas_reset_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .probe = oxnas_reset_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .name = "oxnas-reset",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .of_match_table = oxnas_reset_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) builtin_platform_driver(oxnas_reset_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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