Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * Copyright (C) 2017 Synopsys.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Synopsys AXS10x reset driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/reset-controller.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define to_axs10x_rst(p)	container_of((p), struct axs10x_rst, rcdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define AXS10X_MAX_RESETS	32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct axs10x_rst {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	void __iomem			*regs_rst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	spinlock_t			lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	struct reset_controller_dev	rcdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static int axs10x_reset_reset(struct reset_controller_dev *rcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 			      unsigned long id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	struct axs10x_rst *rst = to_axs10x_rst(rcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	spin_lock_irqsave(&rst->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	writel(BIT(id), rst->regs_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	spin_unlock_irqrestore(&rst->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static const struct reset_control_ops axs10x_reset_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	.reset	= axs10x_reset_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static int axs10x_reset_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	struct axs10x_rst *rst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	struct resource *mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	rst = devm_kzalloc(&pdev->dev, sizeof(*rst), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	if (!rst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	rst->regs_rst = devm_ioremap_resource(&pdev->dev, mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	if (IS_ERR(rst->regs_rst))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 		return PTR_ERR(rst->regs_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	spin_lock_init(&rst->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	rst->rcdev.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	rst->rcdev.ops = &axs10x_reset_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	rst->rcdev.of_node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	rst->rcdev.nr_resets = AXS10X_MAX_RESETS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	return devm_reset_controller_register(&pdev->dev, &rst->rcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static const struct of_device_id axs10x_reset_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	{ .compatible = "snps,axs10x-reset" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static struct platform_driver axs10x_reset_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	.probe	= axs10x_reset_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	.driver	= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 		.name = "axs10x-reset",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 		.of_match_table = axs10x_reset_dt_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) builtin_platform_driver(axs10x_reset_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MODULE_AUTHOR("Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MODULE_DESCRIPTION("Synopsys AXS10x reset driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) MODULE_LICENSE("GPL v2");