^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2016-2017 Linaro Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/reset-controller.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct hi3660_reset_controller {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) struct reset_controller_dev rst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct regmap *map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define to_hi3660_reset_controller(_rst) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) container_of(_rst, struct hi3660_reset_controller, rst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static int hi3660_reset_program_hw(struct reset_controller_dev *rcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) unsigned long idx, bool assert)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct hi3660_reset_controller *rc = to_hi3660_reset_controller(rcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned int offset = idx >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) unsigned int mask = BIT(idx & 0x1f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) if (assert)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) return regmap_write(rc->map, offset, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) return regmap_write(rc->map, offset + 4, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static int hi3660_reset_assert(struct reset_controller_dev *rcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned long idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return hi3660_reset_program_hw(rcdev, idx, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static int hi3660_reset_deassert(struct reset_controller_dev *rcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) unsigned long idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return hi3660_reset_program_hw(rcdev, idx, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static int hi3660_reset_dev(struct reset_controller_dev *rcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) unsigned long idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) err = hi3660_reset_assert(rcdev, idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return hi3660_reset_deassert(rcdev, idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static const struct reset_control_ops hi3660_reset_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .reset = hi3660_reset_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .assert = hi3660_reset_assert,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .deassert = hi3660_reset_deassert,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static int hi3660_reset_xlate(struct reset_controller_dev *rcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) const struct of_phandle_args *reset_spec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) unsigned int offset, bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) offset = reset_spec->args[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) bit = reset_spec->args[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return (offset << 8) | bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static int hi3660_reset_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct hi3660_reset_controller *rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct device_node *np = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) rc = devm_kzalloc(dev, sizeof(*rc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (!rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) rc->map = syscon_regmap_lookup_by_phandle(np, "hisi,rst-syscon");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (IS_ERR(rc->map)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) dev_err(dev, "failed to get hi3660,rst-syscon\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return PTR_ERR(rc->map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) rc->rst.ops = &hi3660_reset_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) rc->rst.of_node = np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) rc->rst.of_reset_n_cells = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) rc->rst.of_xlate = hi3660_reset_xlate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return reset_controller_register(&rc->rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static const struct of_device_id hi3660_reset_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) { .compatible = "hisilicon,hi3660-reset", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) MODULE_DEVICE_TABLE(of, hi3660_reset_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static struct platform_driver hi3660_reset_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .probe = hi3660_reset_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .name = "hi3660-reset",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .of_match_table = hi3660_reset_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static int __init hi3660_reset_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return platform_driver_register(&hi3660_reset_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) arch_initcall(hi3660_reset_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) MODULE_ALIAS("platform:hi3660-reset");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MODULE_DESCRIPTION("HiSilicon Hi3660 Reset Driver");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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