^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // wm831x-isink.c -- Current sink driver for the WM831x series
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright 2009 Wolfson Microelectronics PLC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) // Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mfd/wm831x/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mfd/wm831x/regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/mfd/wm831x/pdata.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define WM831X_ISINK_MAX_NAME 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct wm831x_isink {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) char name[WM831X_ISINK_MAX_NAME];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct regulator_desc desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct wm831x *wm831x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct regulator_dev *regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static int wm831x_isink_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct wm831x_isink *isink = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct wm831x *wm831x = isink->wm831x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* We have a two stage enable: first start the ISINK... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_ENA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) WM831X_CS1_ENA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* ...then enable drive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_DRIVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) WM831X_CS1_DRIVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_ENA, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static int wm831x_isink_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct wm831x_isink *isink = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct wm831x *wm831x = isink->wm831x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_DRIVE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_ENA, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static int wm831x_isink_is_enabled(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct wm831x_isink *isink = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct wm831x *wm831x = isink->wm831x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) ret = wm831x_reg_read(wm831x, isink->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if ((ret & (WM831X_CS1_ENA | WM831X_CS1_DRIVE)) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) (WM831X_CS1_ENA | WM831X_CS1_DRIVE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static const struct regulator_ops wm831x_isink_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .is_enabled = wm831x_isink_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .enable = wm831x_isink_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .disable = wm831x_isink_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .set_current_limit = regulator_set_current_limit_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .get_current_limit = regulator_get_current_limit_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static irqreturn_t wm831x_isink_irq(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct wm831x_isink *isink = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) regulator_notifier_call_chain(isink->regulator,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) REGULATOR_EVENT_OVER_CURRENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static int wm831x_isink_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct wm831x_isink *isink;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int id = pdev->id % ARRAY_SIZE(pdata->isink);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int ret, irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) dev_dbg(&pdev->dev, "Probing ISINK%d\n", id + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (pdata == NULL || pdata->isink[id] == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) isink = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_isink),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (!isink)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) isink->wm831x = wm831x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) res = platform_get_resource(pdev, IORESOURCE_REG, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) if (res == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) dev_err(&pdev->dev, "No REG resource\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) isink->reg = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /* For current parts this is correct; probably need to revisit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * in future.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) snprintf(isink->name, sizeof(isink->name), "ISINK%d", id + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) isink->desc.name = isink->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) isink->desc.id = id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) isink->desc.ops = &wm831x_isink_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) isink->desc.type = REGULATOR_CURRENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) isink->desc.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) isink->desc.curr_table = wm831x_isinkv_values,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) isink->desc.n_current_limits = ARRAY_SIZE(wm831x_isinkv_values),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) isink->desc.csel_reg = isink->reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) isink->desc.csel_mask = WM831X_CS1_ISEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) config.dev = pdev->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) config.init_data = pdata->isink[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) config.driver_data = isink;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) config.regmap = wm831x->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) isink->regulator = devm_regulator_register(&pdev->dev, &isink->desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (IS_ERR(isink->regulator)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) ret = PTR_ERR(isink->regulator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) dev_err(wm831x->dev, "Failed to register ISINK%d: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) id + 1, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) irq = wm831x_irq(wm831x, platform_get_irq(pdev, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) wm831x_isink_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) IRQF_TRIGGER_RISING | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) isink->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) isink);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) dev_err(&pdev->dev, "Failed to request ISINK IRQ %d: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) irq, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) platform_set_drvdata(pdev, isink);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static struct platform_driver wm831x_isink_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .probe = wm831x_isink_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .name = "wm831x-isink",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static int __init wm831x_isink_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ret = platform_driver_register(&wm831x_isink_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) pr_err("Failed to register WM831x ISINK driver: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) subsys_initcall(wm831x_isink_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static void __exit wm831x_isink_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) platform_driver_unregister(&wm831x_isink_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) module_exit(wm831x_isink_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /* Module information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) MODULE_AUTHOR("Mark Brown");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) MODULE_DESCRIPTION("WM831x current sink driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) MODULE_ALIAS("platform:wm831x-isink");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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