Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * tps65218-regulator.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Regulator driver for TPS65218 PMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * modify it under the terms of the GNU General Public License version 2 as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * published by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * kind, whether expressed or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * GNU General Public License version 2 for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/mfd/tps65218.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define TPS65218_REGULATOR(_name, _of, _id, _type, _ops, _n, _vr, _vm, _er, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 			   _em, _cr, _cm, _lr, _nlr, _delay, _fuv, _sr, _sm, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 			   _ct, _ncl) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	{							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		.name			= _name,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		.of_match		= _of,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		.id			= _id,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 		.ops			= &_ops,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		.n_voltages		= _n,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		.type			= _type,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		.owner			= THIS_MODULE,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		.vsel_reg		= _vr,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 		.vsel_mask		= _vm,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		.csel_reg		= _cr,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		.csel_mask		= _cm,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		.curr_table		= _ct,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		.n_current_limits	= _ncl,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		.enable_reg		= _er,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		.enable_mask		= _em,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		.volt_table		= NULL,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		.linear_ranges		= _lr,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		.n_linear_ranges	= _nlr,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		.ramp_delay		= _delay,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		.fixed_uV		= _fuv,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		.bypass_reg	= _sr,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		.bypass_mask	= _sm,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	}							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) static const struct linear_range dcdc1_dcdc2_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	REGULATOR_LINEAR_RANGE(850000, 0x0, 0x32, 10000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	REGULATOR_LINEAR_RANGE(1375000, 0x33, 0x3f, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) static const struct linear_range ldo1_dcdc3_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	REGULATOR_LINEAR_RANGE(900000, 0x0, 0x1a, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	REGULATOR_LINEAR_RANGE(1600000, 0x1b, 0x3f, 50000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) static const struct linear_range dcdc4_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	REGULATOR_LINEAR_RANGE(1175000, 0x0, 0xf, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	REGULATOR_LINEAR_RANGE(1600000, 0x10, 0x34, 50000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) static int tps65218_pmic_set_voltage_sel(struct regulator_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 					 unsigned selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	struct tps65218 *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	unsigned int rid = rdev_get_id(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	/* Set the voltage based on vsel value and write protect level is 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	ret = tps65218_set_bits(tps, dev->desc->vsel_reg, dev->desc->vsel_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 				selector, TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	/* Set GO bit for DCDC1/2 to initiate voltage transistion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	switch (rid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	case TPS65218_DCDC_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	case TPS65218_DCDC_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		ret = tps65218_set_bits(tps, TPS65218_REG_CONTRL_SLEW_RATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 					TPS65218_SLEW_RATE_GO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 					TPS65218_SLEW_RATE_GO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 					TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static int tps65218_pmic_enable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	struct tps65218 *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	int rid = rdev_get_id(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	/* Enable the regulator and password protection is level 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	return tps65218_set_bits(tps, dev->desc->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 				 dev->desc->enable_mask, dev->desc->enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 				 TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static int tps65218_pmic_disable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	struct tps65218 *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	int rid = rdev_get_id(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	/* Disable the regulator and password protection is level 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	return tps65218_clear_bits(tps, dev->desc->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 				   dev->desc->enable_mask, TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static int tps65218_pmic_set_suspend_enable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	struct tps65218 *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	unsigned int rid = rdev_get_id(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	if (rid > TPS65218_LDO_1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	return tps65218_clear_bits(tps, dev->desc->bypass_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 				   dev->desc->bypass_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 				   TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static int tps65218_pmic_set_suspend_disable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	struct tps65218 *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	unsigned int rid = rdev_get_id(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	if (rid > TPS65218_LDO_1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	 * Certain revisions of TPS65218 will need to have DCDC3 regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	 * enabled always, otherwise an immediate system reboot will occur
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	 * during poweroff.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	if (rid == TPS65218_DCDC_3 && tps->rev == TPS65218_REV_2_1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	if (!tps->strobes[rid]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		if (rid == TPS65218_DCDC_3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			tps->strobes[rid] = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	return tps65218_set_bits(tps, dev->desc->bypass_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 				 dev->desc->bypass_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 				 tps->strobes[rid], TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /* Operations permitted on DCDC1, DCDC2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static const struct regulator_ops tps65218_dcdc12_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	.is_enabled		= regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	.enable			= tps65218_pmic_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	.disable		= tps65218_pmic_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	.set_voltage_sel	= tps65218_pmic_set_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	.list_voltage		= regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	.map_voltage		= regulator_map_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	.set_suspend_enable	= tps65218_pmic_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	.set_suspend_disable	= tps65218_pmic_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /* Operations permitted on DCDC3, DCDC4 and LDO1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static const struct regulator_ops tps65218_ldo1_dcdc34_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	.is_enabled		= regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	.enable			= tps65218_pmic_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	.disable		= tps65218_pmic_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	.set_voltage_sel	= tps65218_pmic_set_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	.list_voltage		= regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	.map_voltage		= regulator_map_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	.set_suspend_enable	= tps65218_pmic_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	.set_suspend_disable	= tps65218_pmic_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static const unsigned int ls3_currents[] = { 100000, 200000, 500000, 1000000 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static int tps65218_pmic_set_input_current_lim(struct regulator_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 					       int lim_uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	unsigned int index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	unsigned int num_currents = ARRAY_SIZE(ls3_currents);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	struct tps65218 *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	while (index < num_currents && ls3_currents[index] != lim_uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	if (index == num_currents)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	return tps65218_set_bits(tps, dev->desc->csel_reg, dev->desc->csel_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 				 index << __builtin_ctz(dev->desc->csel_mask),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 				 TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static int tps65218_pmic_set_current_limit(struct regulator_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 					   int min_uA, int max_uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	int index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	unsigned int num_currents = ARRAY_SIZE(ls3_currents);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	struct tps65218 *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	while (index < num_currents && ls3_currents[index] <= max_uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	index--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	if (index < 0 || ls3_currents[index] < min_uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	return tps65218_set_bits(tps, dev->desc->csel_reg, dev->desc->csel_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 				 index << __builtin_ctz(dev->desc->csel_mask),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 				 TPS65218_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static const struct regulator_ops tps65218_ls23_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	.is_enabled		= regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	.enable			= tps65218_pmic_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	.disable		= tps65218_pmic_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	.set_input_current_limit = tps65218_pmic_set_input_current_lim,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	.set_current_limit	= tps65218_pmic_set_current_limit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	.get_current_limit	= regulator_get_current_limit_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) /* Operations permitted on DCDC5, DCDC6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static const struct regulator_ops tps65218_dcdc56_pmic_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	.is_enabled		= regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	.enable			= tps65218_pmic_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	.disable		= tps65218_pmic_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	.set_suspend_enable	= tps65218_pmic_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	.set_suspend_disable	= tps65218_pmic_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static const struct regulator_desc regulators[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	TPS65218_REGULATOR("DCDC1", "regulator-dcdc1", TPS65218_DCDC_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 			   REGULATOR_VOLTAGE, tps65218_dcdc12_ops, 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 			   TPS65218_REG_CONTROL_DCDC1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 			   TPS65218_CONTROL_DCDC1_MASK, TPS65218_REG_ENABLE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 			   TPS65218_ENABLE1_DC1_EN, 0, 0, dcdc1_dcdc2_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 			   2, 4000, 0, TPS65218_REG_SEQ3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 			   TPS65218_SEQ3_DC1_SEQ_MASK, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	TPS65218_REGULATOR("DCDC2", "regulator-dcdc2", TPS65218_DCDC_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 			   REGULATOR_VOLTAGE, tps65218_dcdc12_ops, 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			   TPS65218_REG_CONTROL_DCDC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 			   TPS65218_CONTROL_DCDC2_MASK, TPS65218_REG_ENABLE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 			   TPS65218_ENABLE1_DC2_EN, 0, 0, dcdc1_dcdc2_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 			   2, 4000, 0, TPS65218_REG_SEQ3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 			   TPS65218_SEQ3_DC2_SEQ_MASK, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	TPS65218_REGULATOR("DCDC3", "regulator-dcdc3", TPS65218_DCDC_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 			   REGULATOR_VOLTAGE, tps65218_ldo1_dcdc34_ops, 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 			   TPS65218_REG_CONTROL_DCDC3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 			   TPS65218_CONTROL_DCDC3_MASK, TPS65218_REG_ENABLE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 			   TPS65218_ENABLE1_DC3_EN, 0, 0, ldo1_dcdc3_ranges, 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 			   0, 0, TPS65218_REG_SEQ4, TPS65218_SEQ4_DC3_SEQ_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 			   NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	TPS65218_REGULATOR("DCDC4", "regulator-dcdc4", TPS65218_DCDC_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 			   REGULATOR_VOLTAGE, tps65218_ldo1_dcdc34_ops, 53,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 			   TPS65218_REG_CONTROL_DCDC4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 			   TPS65218_CONTROL_DCDC4_MASK, TPS65218_REG_ENABLE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 			   TPS65218_ENABLE1_DC4_EN, 0, 0, dcdc4_ranges, 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 			   0, 0, TPS65218_REG_SEQ4, TPS65218_SEQ4_DC4_SEQ_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 			   NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	TPS65218_REGULATOR("DCDC5", "regulator-dcdc5", TPS65218_DCDC_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 			   REGULATOR_VOLTAGE, tps65218_dcdc56_pmic_ops, 1, -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 			   -1, TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC5_EN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 			   0, NULL, 0, 0, 1000000, TPS65218_REG_SEQ5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 			   TPS65218_SEQ5_DC5_SEQ_MASK, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	TPS65218_REGULATOR("DCDC6", "regulator-dcdc6", TPS65218_DCDC_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 			   REGULATOR_VOLTAGE, tps65218_dcdc56_pmic_ops, 1, -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 			   -1, TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC6_EN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 			   0, NULL, 0, 0, 1800000, TPS65218_REG_SEQ5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 			   TPS65218_SEQ5_DC6_SEQ_MASK, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	TPS65218_REGULATOR("LDO1", "regulator-ldo1", TPS65218_LDO_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 			   REGULATOR_VOLTAGE, tps65218_ldo1_dcdc34_ops, 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 			   TPS65218_REG_CONTROL_LDO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 			   TPS65218_CONTROL_LDO1_MASK, TPS65218_REG_ENABLE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 			   TPS65218_ENABLE2_LDO1_EN, 0, 0, ldo1_dcdc3_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 			   2, 0, 0, TPS65218_REG_SEQ6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 			   TPS65218_SEQ6_LDO1_SEQ_MASK, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	TPS65218_REGULATOR("LS2", "regulator-ls2", TPS65218_LS_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 			   REGULATOR_CURRENT, tps65218_ls23_ops, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 			   TPS65218_REG_ENABLE2, TPS65218_ENABLE2_LS2_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 			   TPS65218_REG_CONFIG2, TPS65218_CONFIG2_LS2ILIM_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 			   NULL, 0, 0, 0, 0, 0, ls3_currents,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 			   ARRAY_SIZE(ls3_currents)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	TPS65218_REGULATOR("LS3", "regulator-ls3", TPS65218_LS_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 			   REGULATOR_CURRENT, tps65218_ls23_ops, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 			   TPS65218_REG_ENABLE2, TPS65218_ENABLE2_LS3_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 			   TPS65218_REG_CONFIG2, TPS65218_CONFIG2_LS3ILIM_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 			   NULL, 0, 0, 0, 0, 0, ls3_currents,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 			   ARRAY_SIZE(ls3_currents)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static int tps65218_regulator_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	struct tps65218 *tps = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	config.dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	config.dev->of_node = tps->dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	config.driver_data = tps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	config.regmap = tps->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	/* Allocate memory for strobes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	tps->strobes = devm_kcalloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 				    TPS65218_NUM_REGULATOR, sizeof(u8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 				    GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	if (!tps->strobes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	for (i = 0; i < ARRAY_SIZE(regulators); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 		rdev = devm_regulator_register(&pdev->dev, &regulators[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 					       &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 		if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 			dev_err(tps->dev, "failed to register %s regulator\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 				pdev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 			return PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 		ret = regmap_read(tps->regmap, regulators[i].bypass_reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 		tps->strobes[i] = val & regulators[i].bypass_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) static const struct platform_device_id tps65218_regulator_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	{ "tps65218-regulator", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	{ /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) MODULE_DEVICE_TABLE(platform, tps65218_regulator_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static struct platform_driver tps65218_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 		.name = "tps65218-pmic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	.probe = tps65218_regulator_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	.id_table = tps65218_regulator_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) module_platform_driver(tps65218_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) MODULE_AUTHOR("J Keerthy <j-keerthy@ti.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) MODULE_DESCRIPTION("TPS65218 voltage regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) MODULE_ALIAS("platform:tps65218-pmic");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) MODULE_LICENSE("GPL v2");