^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * tps65217-regulator.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Regulator driver for TPS65217 PMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * modify it under the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * published by the Free Software Foundation version 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * This program is distributed "as is" WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * kind, whether express or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/mfd/tps65217.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define TPS65217_REGULATOR(_name, _id, _of_match, _ops, _n, _vr, _vm, _em, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) _t, _lr, _nlr, _sr, _sm) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .name = _name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .id = _id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .of_match = of_match_ptr(_of_match), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .regulators_node= of_match_ptr("regulators"), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .ops = &_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .n_voltages = _n, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .vsel_reg = _vr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .vsel_mask = _vm, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .enable_reg = TPS65217_REG_ENABLE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .enable_mask = _em, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .volt_table = _t, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .linear_ranges = _lr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .n_linear_ranges = _nlr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .bypass_reg = _sr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .bypass_mask = _sm, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static const unsigned int LDO1_VSEL_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 1000000, 1100000, 1200000, 1250000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 1300000, 1350000, 1400000, 1500000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 1600000, 1800000, 2500000, 2750000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 2800000, 3000000, 3100000, 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static const struct linear_range tps65217_uv1_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) REGULATOR_LINEAR_RANGE(900000, 0, 24, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) REGULATOR_LINEAR_RANGE(1550000, 25, 52, 50000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) REGULATOR_LINEAR_RANGE(3000000, 53, 55, 100000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) REGULATOR_LINEAR_RANGE(3300000, 56, 63, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static const struct linear_range tps65217_uv2_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) REGULATOR_LINEAR_RANGE(1500000, 0, 8, 50000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) REGULATOR_LINEAR_RANGE(2000000, 9, 13, 100000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) REGULATOR_LINEAR_RANGE(2450000, 14, 31, 50000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static int tps65217_pmic_enable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct tps65217 *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int rid = rdev_get_id(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (rid < TPS65217_DCDC_1 || rid > TPS65217_LDO_4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* Enable the regulator and password protection is level 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return tps65217_set_bits(tps, TPS65217_REG_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) dev->desc->enable_mask, dev->desc->enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) TPS65217_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static int tps65217_pmic_disable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct tps65217 *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) int rid = rdev_get_id(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (rid < TPS65217_DCDC_1 || rid > TPS65217_LDO_4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* Disable the regulator and password protection is level 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return tps65217_clear_bits(tps, TPS65217_REG_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) dev->desc->enable_mask, TPS65217_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static int tps65217_pmic_set_voltage_sel(struct regulator_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) unsigned selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct tps65217 *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) unsigned int rid = rdev_get_id(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* Set the voltage based on vsel value and write protect level is 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ret = tps65217_set_bits(tps, dev->desc->vsel_reg, dev->desc->vsel_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) selector, TPS65217_PROTECT_L2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* Set GO bit for DCDCx to initiate voltage transistion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) switch (rid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) case TPS65217_DCDC_1 ... TPS65217_DCDC_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) ret = tps65217_set_bits(tps, TPS65217_REG_DEFSLEW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) TPS65217_DEFSLEW_GO, TPS65217_DEFSLEW_GO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) TPS65217_PROTECT_L2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int tps65217_pmic_set_suspend_enable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct tps65217 *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) unsigned int rid = rdev_get_id(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (rid > TPS65217_LDO_4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return tps65217_clear_bits(tps, dev->desc->bypass_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) dev->desc->bypass_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) TPS65217_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static int tps65217_pmic_set_suspend_disable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct tps65217 *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) unsigned int rid = rdev_get_id(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (rid > TPS65217_LDO_4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if (!tps->strobes[rid])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return tps65217_set_bits(tps, dev->desc->bypass_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) dev->desc->bypass_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) tps->strobes[rid], TPS65217_PROTECT_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* Operations permitted on DCDCx, LDO2, LDO3 and LDO4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static const struct regulator_ops tps65217_pmic_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .enable = tps65217_pmic_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .disable = tps65217_pmic_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .set_voltage_sel = tps65217_pmic_set_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .list_voltage = regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .map_voltage = regulator_map_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .set_suspend_enable = tps65217_pmic_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .set_suspend_disable = tps65217_pmic_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /* Operations permitted on LDO1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static const struct regulator_ops tps65217_pmic_ldo1_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .enable = tps65217_pmic_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .disable = tps65217_pmic_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .set_voltage_sel = tps65217_pmic_set_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .list_voltage = regulator_list_voltage_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .map_voltage = regulator_map_voltage_ascend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .set_suspend_enable = tps65217_pmic_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .set_suspend_disable = tps65217_pmic_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static const struct regulator_desc regulators[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) TPS65217_REGULATOR("DCDC1", TPS65217_DCDC_1, "dcdc1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) tps65217_pmic_ops, 64, TPS65217_REG_DEFDCDC1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) TPS65217_DEFDCDCX_DCDC_MASK, TPS65217_ENABLE_DC1_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) NULL, tps65217_uv1_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) ARRAY_SIZE(tps65217_uv1_ranges), TPS65217_REG_SEQ1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) TPS65217_SEQ1_DC1_SEQ_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) TPS65217_REGULATOR("DCDC2", TPS65217_DCDC_2, "dcdc2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) tps65217_pmic_ops, 64, TPS65217_REG_DEFDCDC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) TPS65217_DEFDCDCX_DCDC_MASK, TPS65217_ENABLE_DC2_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) NULL, tps65217_uv1_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) ARRAY_SIZE(tps65217_uv1_ranges), TPS65217_REG_SEQ1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) TPS65217_SEQ1_DC2_SEQ_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) TPS65217_REGULATOR("DCDC3", TPS65217_DCDC_3, "dcdc3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) tps65217_pmic_ops, 64, TPS65217_REG_DEFDCDC3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) TPS65217_DEFDCDCX_DCDC_MASK, TPS65217_ENABLE_DC3_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) NULL, tps65217_uv1_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) ARRAY_SIZE(tps65217_uv1_ranges), TPS65217_REG_SEQ2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) TPS65217_SEQ2_DC3_SEQ_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) TPS65217_REGULATOR("LDO1", TPS65217_LDO_1, "ldo1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) tps65217_pmic_ldo1_ops, 16, TPS65217_REG_DEFLDO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) TPS65217_DEFLDO1_LDO1_MASK, TPS65217_ENABLE_LDO1_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) LDO1_VSEL_table, NULL, 0, TPS65217_REG_SEQ2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) TPS65217_SEQ2_LDO1_SEQ_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) TPS65217_REGULATOR("LDO2", TPS65217_LDO_2, "ldo2", tps65217_pmic_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 64, TPS65217_REG_DEFLDO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) TPS65217_DEFLDO2_LDO2_MASK, TPS65217_ENABLE_LDO2_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) NULL, tps65217_uv1_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) ARRAY_SIZE(tps65217_uv1_ranges), TPS65217_REG_SEQ3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) TPS65217_SEQ3_LDO2_SEQ_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) TPS65217_REGULATOR("LDO3", TPS65217_LDO_3, "ldo3", tps65217_pmic_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 32, TPS65217_REG_DEFLS1, TPS65217_DEFLDO3_LDO3_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) TPS65217_ENABLE_LS1_EN | TPS65217_DEFLDO3_LDO3_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) NULL, tps65217_uv2_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) ARRAY_SIZE(tps65217_uv2_ranges), TPS65217_REG_SEQ3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) TPS65217_SEQ3_LDO3_SEQ_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) TPS65217_REGULATOR("LDO4", TPS65217_LDO_4, "ldo4", tps65217_pmic_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 32, TPS65217_REG_DEFLS2, TPS65217_DEFLDO4_LDO4_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) TPS65217_ENABLE_LS2_EN | TPS65217_DEFLDO4_LDO4_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) NULL, tps65217_uv2_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ARRAY_SIZE(tps65217_uv2_ranges), TPS65217_REG_SEQ4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) TPS65217_SEQ4_LDO4_SEQ_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static int tps65217_regulator_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) struct tps65217 *tps = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) struct tps65217_board *pdata = dev_get_platdata(tps->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /* Allocate memory for strobes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) tps->strobes = devm_kcalloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) TPS65217_NUM_REGULATOR, sizeof(u8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (!tps->strobes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) platform_set_drvdata(pdev, tps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) for (i = 0; i < TPS65217_NUM_REGULATOR; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) /* Register the regulators */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) config.dev = tps->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) config.init_data = pdata->tps65217_init_data[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) config.driver_data = tps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) config.regmap = tps->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) rdev = devm_regulator_register(&pdev->dev, ®ulators[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) dev_err(tps->dev, "failed to register %s regulator\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) pdev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /* Store default strobe info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) ret = tps65217_reg_read(tps, regulators[i].bypass_reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) tps->strobes[i] = val & regulators[i].bypass_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static struct platform_driver tps65217_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .name = "tps65217-pmic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .probe = tps65217_regulator_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static int __init tps65217_regulator_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return platform_driver_register(&tps65217_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) subsys_initcall(tps65217_regulator_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static void __exit tps65217_regulator_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) platform_driver_unregister(&tps65217_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) module_exit(tps65217_regulator_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) MODULE_AUTHOR("AnilKumar Ch <anilkumar@ti.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) MODULE_DESCRIPTION("TPS65217 voltage regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) MODULE_ALIAS("platform:tps65217-pmic");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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