^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * TI TPS65132 Regulator driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2017 NVIDIA CORPORATION. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Venkat Reddy Talla <vreddytalla@nvidia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Laxman Dewangan <ldewangan@nvidia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * modify it under the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * published by the Free Software Foundation; either version 2 of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * License, or (at your option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * whether express or implied; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define TPS65132_REG_VPOS 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define TPS65132_REG_VNEG 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define TPS65132_REG_APPS_DISP_DISN 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define TPS65132_REG_CONTROL 0x0FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define TPS65132_VOUT_MASK 0x1F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define TPS65132_VOUT_N_VOLTAGE 0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define TPS65132_VOUT_VMIN 4000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define TPS65132_VOUT_VMAX 6000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define TPS65132_VOUT_STEP 100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define TPS65132_REG_APPS_DIS_VPOS BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define TPS65132_REG_APPS_DIS_VNEG BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define TPS65132_REGULATOR_ID_VPOS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define TPS65132_REGULATOR_ID_VNEG 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define TPS65132_MAX_REGULATORS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define TPS65132_ACT_DIS_TIME_SLACK 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct tps65132_reg_pdata {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct gpio_desc *en_gpiod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct gpio_desc *act_dis_gpiod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) unsigned int act_dis_time_us;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int ena_gpio_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct tps65132_regulator {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct tps65132_reg_pdata reg_pdata[TPS65132_MAX_REGULATORS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static int tps65132_regulator_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct tps65132_regulator *tps = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (!IS_ERR(rpdata->en_gpiod)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) gpiod_set_value_cansleep(rpdata->en_gpiod, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) rpdata->ena_gpio_state = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* Hardware automatically enable discharge bit in enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (rdev->constraints->active_discharge ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) REGULATOR_ACTIVE_DISCHARGE_DISABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ret = regulator_set_active_discharge_regmap(rdev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) dev_err(tps->dev, "Failed to disable active discharge: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static int tps65132_regulator_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct tps65132_regulator *tps = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (!IS_ERR(rpdata->en_gpiod)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) gpiod_set_value_cansleep(rpdata->en_gpiod, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) rpdata->ena_gpio_state = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (!IS_ERR(rpdata->act_dis_gpiod)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) gpiod_set_value_cansleep(rpdata->act_dis_gpiod, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) usleep_range(rpdata->act_dis_time_us, rpdata->act_dis_time_us +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) TPS65132_ACT_DIS_TIME_SLACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) gpiod_set_value_cansleep(rpdata->act_dis_gpiod, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static int tps65132_regulator_is_enabled(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct tps65132_regulator *tps = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (!IS_ERR(rpdata->en_gpiod))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return rpdata->ena_gpio_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static const struct regulator_ops tps65132_regulator_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .enable = tps65132_regulator_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .disable = tps65132_regulator_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .is_enabled = tps65132_regulator_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .map_voltage = regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .set_active_discharge = regulator_set_active_discharge_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static int tps65132_of_parse_cb(struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) const struct regulator_desc *desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct regulator_config *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct tps65132_regulator *tps = config->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct tps65132_reg_pdata *rpdata = &tps->reg_pdata[desc->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) rpdata->en_gpiod = devm_fwnode_gpiod_get(tps->dev, of_fwnode_handle(np),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) "enable", GPIOD_ASIS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) "enable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (IS_ERR(rpdata->en_gpiod)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) ret = PTR_ERR(rpdata->en_gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* Ignore the error other than probe defer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (ret == -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) rpdata->act_dis_gpiod = devm_fwnode_gpiod_get(tps->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) of_fwnode_handle(np),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) "active-discharge",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) GPIOD_ASIS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) "active-discharge");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (IS_ERR(rpdata->act_dis_gpiod)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) ret = PTR_ERR(rpdata->act_dis_gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /* Ignore the error other than probe defer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (ret == -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) ret = of_property_read_u32(np, "ti,active-discharge-time-us",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) &rpdata->act_dis_time_us);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) dev_err(tps->dev, "Failed to read active discharge time:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define TPS65132_REGULATOR_DESC(_id, _name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) [TPS65132_REGULATOR_ID_##_id] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .name = "tps65132-"#_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .supply_name = "vin", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .id = TPS65132_REGULATOR_ID_##_id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) .of_match = of_match_ptr(#_name), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .of_parse_cb = tps65132_of_parse_cb, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .ops = &tps65132_regulator_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .n_voltages = TPS65132_VOUT_N_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .min_uV = TPS65132_VOUT_VMIN, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .uV_step = TPS65132_VOUT_STEP, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .enable_time = 500, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .vsel_mask = TPS65132_VOUT_MASK, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .vsel_reg = TPS65132_REG_##_id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .active_discharge_off = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .active_discharge_on = TPS65132_REG_APPS_DIS_##_id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .active_discharge_mask = TPS65132_REG_APPS_DIS_##_id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .active_discharge_reg = TPS65132_REG_APPS_DISP_DISN, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static const struct regulator_desc tps_regs_desc[TPS65132_MAX_REGULATORS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) TPS65132_REGULATOR_DESC(VPOS, outp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) TPS65132_REGULATOR_DESC(VNEG, outn),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static const struct regmap_range tps65132_no_reg_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) regmap_reg_range(TPS65132_REG_APPS_DISP_DISN + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) TPS65132_REG_CONTROL - 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static const struct regmap_access_table tps65132_no_reg_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .no_ranges = tps65132_no_reg_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .n_no_ranges = ARRAY_SIZE(tps65132_no_reg_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static const struct regmap_config tps65132_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .max_register = TPS65132_REG_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .cache_type = REGCACHE_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .rd_table = &tps65132_no_reg_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .wr_table = &tps65132_no_reg_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static int tps65132_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct tps65132_regulator *tps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct regmap *rmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) tps = devm_kzalloc(dev, sizeof(*tps), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (!tps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) rmap = devm_regmap_init_i2c(client, &tps65132_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) if (IS_ERR(rmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ret = PTR_ERR(rmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) dev_err(dev, "regmap init failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) i2c_set_clientdata(client, tps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) tps->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) for (id = 0; id < TPS65132_MAX_REGULATORS; ++id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) config.regmap = rmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) config.dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) config.driver_data = tps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) rdev = devm_regulator_register(dev, &tps_regs_desc[id],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) ret = PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) dev_err(dev, "regulator %s register failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) tps_regs_desc[id].name, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static const struct i2c_device_id tps65132_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {.name = "tps65132",},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) MODULE_DEVICE_TABLE(i2c, tps65132_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static struct i2c_driver tps65132_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .name = "tps65132",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .probe_new = tps65132_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .id_table = tps65132_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) module_i2c_driver(tps65132_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) MODULE_DESCRIPTION("tps65132 regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) MODULE_AUTHOR("Venkat Reddy Talla <vreddytalla@nvidia.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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