^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Regulator driver for tps65090 power management chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mfd/tps65090.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define MAX_CTRL_READ_TRIES 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MAX_FET_ENABLE_TRIES 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define CTRL_EN_BIT 0 /* Regulator enable bit, active high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define CTRL_WT_BIT 2 /* Regulator wait time 0 bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define CTRL_PG_BIT 4 /* Regulator power good bit, 1=good */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define CTRL_TO_BIT 7 /* Regulator timeout bit, 1=wait */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define MAX_OVERCURRENT_WAIT 3 /* Overcurrent wait must be <= this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * struct tps65090_regulator - Per-regulator data for a tps65090 regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * @dev: Pointer to our device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * @desc: The struct regulator_desc for the regulator.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * @rdev: The struct regulator_dev for the regulator.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * @overcurrent_wait_valid: True if overcurrent_wait is valid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * @overcurrent_wait: For FETs, the value to put in the WTFET bitfield.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct tps65090_regulator {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct regulator_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) bool overcurrent_wait_valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int overcurrent_wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static const struct regulator_ops tps65090_ext_control_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * tps65090_reg_set_overcurrent_wait - Setup overcurrent wait
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * This will set the overcurrent wait time based on what's in the regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * info.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * @ri: Overall regulator data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * @rdev: Regulator device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * Return: 0 if no error, non-zero if there was an error writing the register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static int tps65090_reg_set_overcurrent_wait(struct tps65090_regulator *ri,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) MAX_OVERCURRENT_WAIT << CTRL_WT_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ri->overcurrent_wait << CTRL_WT_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) dev_err(&rdev->dev, "Error updating overcurrent wait %#x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) rdev->desc->enable_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * tps65090_try_enable_fet - Try to enable a FET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * @rdev: Regulator device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * Return: 0 if ok, -ENOTRECOVERABLE if the FET power good bit did not get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * set, or some other -ve value if another error occurred (e.g. i2c error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static int tps65090_try_enable_fet(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) unsigned int control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) rdev->desc->enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) rdev->desc->enable_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) dev_err(&rdev->dev, "Error in updating reg %#x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) rdev->desc->enable_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) for (i = 0; i < MAX_CTRL_READ_TRIES; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ret = regmap_read(rdev->regmap, rdev->desc->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) &control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (!(control & BIT(CTRL_TO_BIT)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) usleep_range(1000, 1500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (!(control & BIT(CTRL_PG_BIT)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return -ENOTRECOVERABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * tps65090_fet_enable - Enable a FET, trying a few times if it fails
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * Some versions of the tps65090 have issues when turning on the FETs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * This function goes through several steps to ensure the best chance of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * FET going on. Specifically:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * - We'll make sure that we bump the "overcurrent wait" to the maximum, which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * increases the chances that we'll turn on properly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * - We'll retry turning the FET on multiple times (turning off in between).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * @rdev: Regulator device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * Return: 0 if ok, non-zero if it fails.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static int tps65090_fet_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) int ret, tries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * Try enabling multiple times until we succeed since sometimes the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * first try times out.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) tries = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) while (true) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) ret = tps65090_try_enable_fet(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (ret != -ENOTRECOVERABLE || tries == MAX_FET_ENABLE_TRIES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* Try turning the FET off (and then on again) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) rdev->desc->enable_mask, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) tries++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (tries)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) dev_warn(&rdev->dev, "reg %#x enable ok after %d tries\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) rdev->desc->enable_reg, tries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) dev_warn(&rdev->dev, "reg %#x enable failed\n", rdev->desc->enable_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) WARN_ON(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static const struct regulator_ops tps65090_reg_control_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static const struct regulator_ops tps65090_fet_control_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .enable = tps65090_fet_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static const struct regulator_ops tps65090_ldo_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define tps65090_REG_DESC(_id, _sname, _en_reg, _en_bits, _nvolt, _volt, _ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .name = "TPS65090_RAILS"#_id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .supply_name = _sname, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .id = TPS65090_REGULATOR_##_id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .n_voltages = _nvolt, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .ops = &_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .fixed_uV = _volt, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .enable_reg = _en_reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .enable_val = _en_bits, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .enable_mask = _en_bits, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define tps65090_REG_FIXEDV(_id, _sname, en_reg, _en_bits, _volt, _ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) tps65090_REG_DESC(_id, _sname, en_reg, _en_bits, 1, _volt, _ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #define tps65090_REG_SWITCH(_id, _sname, en_reg, _en_bits, _ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) tps65090_REG_DESC(_id, _sname, en_reg, _en_bits, 0, 0, _ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static struct regulator_desc tps65090_regulator_desc[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) tps65090_REG_FIXEDV(DCDC1, "vsys1", 0x0C, BIT(CTRL_EN_BIT), 5000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) tps65090_reg_control_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) tps65090_REG_FIXEDV(DCDC2, "vsys2", 0x0D, BIT(CTRL_EN_BIT), 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) tps65090_reg_control_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) tps65090_REG_SWITCH(DCDC3, "vsys3", 0x0E, BIT(CTRL_EN_BIT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) tps65090_reg_control_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) tps65090_REG_SWITCH(FET1, "infet1", 0x0F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) tps65090_fet_control_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) tps65090_REG_SWITCH(FET2, "infet2", 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) tps65090_fet_control_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) tps65090_REG_SWITCH(FET3, "infet3", 0x11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) tps65090_fet_control_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) tps65090_REG_SWITCH(FET4, "infet4", 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) tps65090_fet_control_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) tps65090_REG_SWITCH(FET5, "infet5", 0x13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) tps65090_fet_control_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) tps65090_REG_SWITCH(FET6, "infet6", 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) tps65090_fet_control_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) tps65090_REG_SWITCH(FET7, "infet7", 0x15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) tps65090_fet_control_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) tps65090_REG_FIXEDV(LDO1, "vsys-l1", 0, 0, 5000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) tps65090_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) tps65090_REG_FIXEDV(LDO2, "vsys-l2", 0, 0, 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) tps65090_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static inline bool is_dcdc(int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) switch (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) case TPS65090_REGULATOR_DCDC1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) case TPS65090_REGULATOR_DCDC2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) case TPS65090_REGULATOR_DCDC3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static int tps65090_config_ext_control(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) struct tps65090_regulator *ri, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) struct device *parent = ri->dev->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) unsigned int reg_en_reg = ri->desc->enable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) ret = tps65090_set_bits(parent, reg_en_reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) ret = tps65090_clr_bits(parent, reg_en_reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) dev_err(ri->dev, "Error in updating reg 0x%x\n", reg_en_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static int tps65090_regulator_disable_ext_control(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) struct tps65090_regulator *ri,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) struct tps65090_regulator_plat_data *tps_pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) struct device *parent = ri->dev->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) unsigned int reg_en_reg = ri->desc->enable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) * First enable output for internal control if require.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) * And then disable external control.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) if (tps_pdata->reg_init_data->constraints.always_on ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) tps_pdata->reg_init_data->constraints.boot_on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) ret = tps65090_set_bits(parent, reg_en_reg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) dev_err(ri->dev, "Error in set reg 0x%x\n", reg_en_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return tps65090_config_ext_control(ri, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static struct of_regulator_match tps65090_matches[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) { .name = "dcdc1", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) { .name = "dcdc2", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) { .name = "dcdc3", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) { .name = "fet1", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) { .name = "fet2", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) { .name = "fet3", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) { .name = "fet4", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) { .name = "fet5", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) { .name = "fet6", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) { .name = "fet7", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) { .name = "ldo1", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) { .name = "ldo2", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static struct tps65090_platform_data *tps65090_parse_dt_reg_data(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) struct of_regulator_match **tps65090_reg_matches)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) struct tps65090_platform_data *tps65090_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) struct device_node *np = pdev->dev.parent->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) struct device_node *regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) int idx = 0, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) struct tps65090_regulator_plat_data *reg_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) tps65090_pdata = devm_kzalloc(&pdev->dev, sizeof(*tps65090_pdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) if (!tps65090_pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) reg_pdata = devm_kcalloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) TPS65090_REGULATOR_MAX, sizeof(*reg_pdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (!reg_pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) regulators = of_get_child_by_name(np, "regulators");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (!regulators) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) dev_err(&pdev->dev, "regulator node not found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) return ERR_PTR(-ENODEV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ret = of_regulator_match(&pdev->dev, regulators, tps65090_matches,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) ARRAY_SIZE(tps65090_matches));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) of_node_put(regulators);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) "Error parsing regulator init data: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) *tps65090_reg_matches = tps65090_matches;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) for (idx = 0; idx < ARRAY_SIZE(tps65090_matches); idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) struct regulator_init_data *ri_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) struct tps65090_regulator_plat_data *rpdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) rpdata = ®_pdata[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) ri_data = tps65090_matches[idx].init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (!ri_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) np = tps65090_matches[idx].of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (!np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) rpdata->reg_init_data = ri_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) rpdata->enable_ext_control = of_property_read_bool(np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) "ti,enable-ext-control");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (rpdata->enable_ext_control) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) enum gpiod_flags gflags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (ri_data->constraints.always_on ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) ri_data->constraints.boot_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) gflags = GPIOD_OUT_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) gflags = GPIOD_OUT_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) gflags |= GPIOD_FLAGS_BIT_NONEXCLUSIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) rpdata->gpiod = devm_fwnode_gpiod_get(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) &pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) of_fwnode_handle(np),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) "dcdc-ext-control",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) gflags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) "tps65090");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (PTR_ERR(rpdata->gpiod) == -ENOENT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) "could not find DCDC external control GPIO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) rpdata->gpiod = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) } else if (IS_ERR(rpdata->gpiod))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) return ERR_CAST(rpdata->gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) if (of_property_read_u32(np, "ti,overcurrent-wait",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) &rpdata->overcurrent_wait) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) rpdata->overcurrent_wait_valid = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) tps65090_pdata->reg_pdata[idx] = rpdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) return tps65090_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static inline struct tps65090_platform_data *tps65090_parse_dt_reg_data(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) struct of_regulator_match **tps65090_reg_matches)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) *tps65090_reg_matches = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) static int tps65090_regulator_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) struct tps65090 *tps65090_mfd = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) struct tps65090_regulator *ri = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) struct tps65090_regulator_plat_data *tps_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) struct tps65090_regulator *pmic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) struct tps65090_platform_data *tps65090_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) struct of_regulator_match *tps65090_reg_matches = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) int num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) dev_dbg(&pdev->dev, "Probing regulator\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) tps65090_pdata = dev_get_platdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) if (!tps65090_pdata && tps65090_mfd->dev->of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) tps65090_pdata = tps65090_parse_dt_reg_data(pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) &tps65090_reg_matches);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) if (IS_ERR_OR_NULL(tps65090_pdata)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) dev_err(&pdev->dev, "Platform data missing\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) return tps65090_pdata ? PTR_ERR(tps65090_pdata) : -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) pmic = devm_kcalloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) TPS65090_REGULATOR_MAX, sizeof(*pmic),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (!pmic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) for (num = 0; num < TPS65090_REGULATOR_MAX; num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) tps_pdata = tps65090_pdata->reg_pdata[num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) ri = &pmic[num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) ri->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) ri->desc = &tps65090_regulator_desc[num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) if (tps_pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) ri->overcurrent_wait_valid =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) tps_pdata->overcurrent_wait_valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) ri->overcurrent_wait = tps_pdata->overcurrent_wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) * TPS5090 DCDC support the control from external digital input.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) * Configure it as per platform data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) if (tps_pdata && is_dcdc(num) && tps_pdata->reg_init_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (tps_pdata->enable_ext_control) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) config.ena_gpiod = tps_pdata->gpiod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) ri->desc->ops = &tps65090_ext_control_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) ret = tps65090_regulator_disable_ext_control(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) ri, tps_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) "failed disable ext control\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) config.dev = pdev->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) config.driver_data = ri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) config.regmap = tps65090_mfd->rmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) if (tps_pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) config.init_data = tps_pdata->reg_init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) config.init_data = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) if (tps65090_reg_matches)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) config.of_node = tps65090_reg_matches[num].of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) config.of_node = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) * Hand the GPIO descriptor management over to the regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) * core, remove it from devres management.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) if (config.ena_gpiod)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) devm_gpiod_unhinge(&pdev->dev, config.ena_gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) rdev = devm_regulator_register(&pdev->dev, ri->desc, &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) dev_err(&pdev->dev, "failed to register regulator %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) ri->desc->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) ri->rdev = rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) if (ri->overcurrent_wait_valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) ret = tps65090_reg_set_overcurrent_wait(ri, rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /* Enable external control if it is require */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) if (tps_pdata && is_dcdc(num) && tps_pdata->reg_init_data &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) tps_pdata->enable_ext_control) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) ret = tps65090_config_ext_control(ri, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) platform_set_drvdata(pdev, pmic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static struct platform_driver tps65090_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) .name = "tps65090-pmic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) .probe = tps65090_regulator_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) static int __init tps65090_regulator_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) return platform_driver_register(&tps65090_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) subsys_initcall(tps65090_regulator_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) static void __exit tps65090_regulator_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) platform_driver_unregister(&tps65090_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) module_exit(tps65090_regulator_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) MODULE_DESCRIPTION("tps65090 regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) MODULE_AUTHOR("Venu Byravarasu <vbyravarasu@nvidia.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) MODULE_ALIAS("platform:tps65090-pmic");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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