^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * tps6507x-regulator.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Regulator driver for TPS65073 PMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2009 Texas Instrument Incorporated - https://www.ti.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * modify it under the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * published by the Free Software Foundation version 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * whether express or implied; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/regulator/tps6507x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/mfd/tps6507x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* DCDC's */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define TPS6507X_DCDC_1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define TPS6507X_DCDC_2 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define TPS6507X_DCDC_3 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* LDOs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define TPS6507X_LDO_1 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define TPS6507X_LDO_2 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define TPS6507X_MAX_REG_ID TPS6507X_LDO_2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* Number of step-down converters available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define TPS6507X_NUM_DCDC 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* Number of LDO voltage regulators available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define TPS6507X_NUM_LDO 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* Number of total regulators available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define TPS6507X_NUM_REGULATOR (TPS6507X_NUM_DCDC + TPS6507X_NUM_LDO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* Supported voltage values for regulators (in microVolts) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static const unsigned int VDCDCx_VSEL_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 725000, 750000, 775000, 800000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 825000, 850000, 875000, 900000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 925000, 950000, 975000, 1000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 1025000, 1050000, 1075000, 1100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 1125000, 1150000, 1175000, 1200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 1225000, 1250000, 1275000, 1300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 1325000, 1350000, 1375000, 1400000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 1425000, 1450000, 1475000, 1500000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 1550000, 1600000, 1650000, 1700000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 1750000, 1800000, 1850000, 1900000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 1950000, 2000000, 2050000, 2100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 2150000, 2200000, 2250000, 2300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 2350000, 2400000, 2450000, 2500000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 2550000, 2600000, 2650000, 2700000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 2750000, 2800000, 2850000, 2900000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 3000000, 3100000, 3200000, 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static const unsigned int LDO1_VSEL_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 1000000, 1100000, 1200000, 1250000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 1300000, 1350000, 1400000, 1500000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 1600000, 1800000, 2500000, 2750000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 2800000, 3000000, 3100000, 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* The voltage mapping table for LDO2 is the same as VDCDCx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define LDO2_VSEL_table VDCDCx_VSEL_table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct tps_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) u8 table_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) const unsigned int *table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* Does DCDC high or the low register defines output voltage? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) bool defdcdc_default;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static struct tps_info tps6507x_pmic_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .name = "VDCDC1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .table_len = ARRAY_SIZE(VDCDCx_VSEL_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .table = VDCDCx_VSEL_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .name = "VDCDC2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .table_len = ARRAY_SIZE(VDCDCx_VSEL_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .table = VDCDCx_VSEL_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .name = "VDCDC3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .table_len = ARRAY_SIZE(VDCDCx_VSEL_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .table = VDCDCx_VSEL_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .name = "LDO1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .table_len = ARRAY_SIZE(LDO1_VSEL_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .table = LDO1_VSEL_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .name = "LDO2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .table_len = ARRAY_SIZE(LDO2_VSEL_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .table = LDO2_VSEL_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct tps6507x_pmic {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct regulator_desc desc[TPS6507X_NUM_REGULATOR];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct tps6507x_dev *mfd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct tps_info *info[TPS6507X_NUM_REGULATOR];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct mutex io_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static inline int tps6507x_pmic_read(struct tps6507x_pmic *tps, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) err = tps->mfd->read_dev(tps->mfd, reg, 1, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static inline int tps6507x_pmic_write(struct tps6507x_pmic *tps, u8 reg, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return tps->mfd->write_dev(tps->mfd, reg, 1, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static int tps6507x_pmic_set_bits(struct tps6507x_pmic *tps, u8 reg, u8 mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) int err, data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) mutex_lock(&tps->io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) data = tps6507x_pmic_read(tps, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (data < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) dev_err(tps->mfd->dev, "Read from reg 0x%x failed\n", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) err = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) data |= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) err = tps6507x_pmic_write(tps, reg, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) dev_err(tps->mfd->dev, "Write for reg 0x%x failed\n", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) mutex_unlock(&tps->io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static int tps6507x_pmic_clear_bits(struct tps6507x_pmic *tps, u8 reg, u8 mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int err, data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) mutex_lock(&tps->io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) data = tps6507x_pmic_read(tps, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) if (data < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) dev_err(tps->mfd->dev, "Read from reg 0x%x failed\n", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) err = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) data &= ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) err = tps6507x_pmic_write(tps, reg, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) dev_err(tps->mfd->dev, "Write for reg 0x%x failed\n", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) mutex_unlock(&tps->io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static int tps6507x_pmic_reg_read(struct tps6507x_pmic *tps, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) int data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) mutex_lock(&tps->io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) data = tps6507x_pmic_read(tps, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (data < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) dev_err(tps->mfd->dev, "Read from reg 0x%x failed\n", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) mutex_unlock(&tps->io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static int tps6507x_pmic_reg_write(struct tps6507x_pmic *tps, u8 reg, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) mutex_lock(&tps->io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) err = tps6507x_pmic_write(tps, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) dev_err(tps->mfd->dev, "Write for reg 0x%x failed\n", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) mutex_unlock(&tps->io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static int tps6507x_pmic_is_enabled(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) struct tps6507x_pmic *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) int data, rid = rdev_get_id(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) u8 shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (rid < TPS6507X_DCDC_1 || rid > TPS6507X_LDO_2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) shift = TPS6507X_MAX_REG_ID - rid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) data = tps6507x_pmic_reg_read(tps, TPS6507X_REG_CON_CTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) if (data < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) return (data & 1<<shift) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static int tps6507x_pmic_enable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) struct tps6507x_pmic *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) int rid = rdev_get_id(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) u8 shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (rid < TPS6507X_DCDC_1 || rid > TPS6507X_LDO_2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) shift = TPS6507X_MAX_REG_ID - rid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return tps6507x_pmic_set_bits(tps, TPS6507X_REG_CON_CTRL1, 1 << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static int tps6507x_pmic_disable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) struct tps6507x_pmic *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) int rid = rdev_get_id(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) u8 shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (rid < TPS6507X_DCDC_1 || rid > TPS6507X_LDO_2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) shift = TPS6507X_MAX_REG_ID - rid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return tps6507x_pmic_clear_bits(tps, TPS6507X_REG_CON_CTRL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 1 << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static int tps6507x_pmic_get_voltage_sel(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) struct tps6507x_pmic *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) int data, rid = rdev_get_id(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) u8 reg, mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) switch (rid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) case TPS6507X_DCDC_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) reg = TPS6507X_REG_DEFDCDC1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) mask = TPS6507X_DEFDCDCX_DCDC_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) case TPS6507X_DCDC_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (tps->info[rid]->defdcdc_default)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) reg = TPS6507X_REG_DEFDCDC2_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) reg = TPS6507X_REG_DEFDCDC2_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) mask = TPS6507X_DEFDCDCX_DCDC_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) case TPS6507X_DCDC_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if (tps->info[rid]->defdcdc_default)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) reg = TPS6507X_REG_DEFDCDC3_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) reg = TPS6507X_REG_DEFDCDC3_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) mask = TPS6507X_DEFDCDCX_DCDC_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) case TPS6507X_LDO_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) reg = TPS6507X_REG_LDO_CTRL1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) mask = TPS6507X_REG_LDO_CTRL1_LDO1_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) case TPS6507X_LDO_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) reg = TPS6507X_REG_DEFLDO2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) mask = TPS6507X_REG_DEFLDO2_LDO2_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) data = tps6507x_pmic_reg_read(tps, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (data < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) data &= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static int tps6507x_pmic_set_voltage_sel(struct regulator_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) unsigned selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) struct tps6507x_pmic *tps = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) int data, rid = rdev_get_id(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) u8 reg, mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) switch (rid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) case TPS6507X_DCDC_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) reg = TPS6507X_REG_DEFDCDC1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) mask = TPS6507X_DEFDCDCX_DCDC_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) case TPS6507X_DCDC_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) if (tps->info[rid]->defdcdc_default)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) reg = TPS6507X_REG_DEFDCDC2_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) reg = TPS6507X_REG_DEFDCDC2_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) mask = TPS6507X_DEFDCDCX_DCDC_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) case TPS6507X_DCDC_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) if (tps->info[rid]->defdcdc_default)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) reg = TPS6507X_REG_DEFDCDC3_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) reg = TPS6507X_REG_DEFDCDC3_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) mask = TPS6507X_DEFDCDCX_DCDC_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) case TPS6507X_LDO_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) reg = TPS6507X_REG_LDO_CTRL1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) mask = TPS6507X_REG_LDO_CTRL1_LDO1_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) case TPS6507X_LDO_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) reg = TPS6507X_REG_DEFLDO2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) mask = TPS6507X_REG_DEFLDO2_LDO2_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) data = tps6507x_pmic_reg_read(tps, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) if (data < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) data &= ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) data |= selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) return tps6507x_pmic_reg_write(tps, reg, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) static const struct regulator_ops tps6507x_pmic_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .is_enabled = tps6507x_pmic_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) .enable = tps6507x_pmic_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .disable = tps6507x_pmic_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .get_voltage_sel = tps6507x_pmic_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .set_voltage_sel = tps6507x_pmic_set_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .list_voltage = regulator_list_voltage_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .map_voltage = regulator_map_voltage_ascend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) static int tps6507x_pmic_of_parse_cb(struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) const struct regulator_desc *desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) struct regulator_config *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) struct tps6507x_pmic *tps = config->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) struct tps_info *info = tps->info[desc->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) u32 prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) ret = of_property_read_u32(np, "ti,defdcdc_default", &prop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) info->defdcdc_default = prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) static int tps6507x_pmic_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) struct tps6507x_dev *tps6507x_dev = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) struct tps_info *info = &tps6507x_pmic_regs[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) struct regulator_init_data *init_data = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) struct tps6507x_pmic *tps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) struct tps6507x_board *tps_board;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) * tps_board points to pmic related constants
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) * coming from the board-evm file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) tps_board = dev_get_platdata(tps6507x_dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) if (tps_board)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) init_data = tps_board->tps6507x_pmic_init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) tps = devm_kzalloc(&pdev->dev, sizeof(*tps), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) if (!tps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) mutex_init(&tps->io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) /* common for all regulators */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) tps->mfd = tps6507x_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) for (i = 0; i < TPS6507X_NUM_REGULATOR; i++, info++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) /* Register the regulators */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) tps->info[i] = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) if (init_data && init_data[i].driver_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) struct tps6507x_reg_platform_data *data =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) init_data[i].driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) info->defdcdc_default = data->defdcdc_default;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) tps->desc[i].name = info->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) tps->desc[i].of_match = of_match_ptr(info->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) tps->desc[i].regulators_node = of_match_ptr("regulators");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) tps->desc[i].of_parse_cb = tps6507x_pmic_of_parse_cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) tps->desc[i].id = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) tps->desc[i].n_voltages = info->table_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) tps->desc[i].volt_table = info->table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) tps->desc[i].ops = &tps6507x_pmic_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) tps->desc[i].type = REGULATOR_VOLTAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) tps->desc[i].owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) config.dev = tps6507x_dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) config.init_data = init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) config.driver_data = tps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) rdev = devm_regulator_register(&pdev->dev, &tps->desc[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) dev_err(tps6507x_dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) "failed to register %s regulator\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) pdev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) tps6507x_dev->pmic = tps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) platform_set_drvdata(pdev, tps6507x_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static struct platform_driver tps6507x_pmic_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) .name = "tps6507x-pmic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .probe = tps6507x_pmic_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) static int __init tps6507x_pmic_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) return platform_driver_register(&tps6507x_pmic_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) subsys_initcall(tps6507x_pmic_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) static void __exit tps6507x_pmic_cleanup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) platform_driver_unregister(&tps6507x_pmic_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) module_exit(tps6507x_pmic_cleanup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) MODULE_AUTHOR("Texas Instruments");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) MODULE_DESCRIPTION("TPS6507x voltage regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) MODULE_ALIAS("platform:tps6507x-pmic");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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