Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Copyright (c) 2017-2018 Rockchip Electronics Co. Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Author: XiaoDong Huang <derrick.huang@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * the Free Software Foundation; either version 2 of the License, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * (at your option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/bug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/debugfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define TPS549b22_REG_OPERATION		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define TPS549b22_REG_ON_OFF_CFG	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define TPS549b22_REG_WRITE_PROTECT	0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define TPS549b22_REG_COMMAND		0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define TPS549b22_REG_MRG_H		0x25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define TPS549b22_REG_MRG_L		0x26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define TPS549b22_REG_ST_BYTE		0x78
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define TPS549b22_REG_MFR_SPC_44	0xfc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define TPS549b22_ID			0x0200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define VOL_MSK				0x3ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define VOL_OFF_MSK			0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define OPERATION_ON_MSK		0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define OPERATION_MRG_MSK		0x3c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define ON_OFF_CFG_OPT_MSK		0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define VOL_MIN_IDX			0x133
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define VOL_MAX_IDX			0x266
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define VOL_STEP_DEF			2500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define VOL2REG(vol_sel, vol_step) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		((vol_sel) / (vol_step) & VOL_MSK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define REG2VOL(val, vol_step) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		((vol_step) * ((val) & VOL_MSK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define TPS549b22_NUM_REGULATORS	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) struct tps549b22 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	struct i2c_client *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	int num_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	struct regulator_dev **rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	struct regmap *regmap_8bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	struct regmap *regmap_16bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	int vol_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) struct tps549b22_board {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	struct regulator_init_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		*tps549b22_init_data[TPS549b22_NUM_REGULATORS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	struct device_node *of_node[TPS549b22_NUM_REGULATORS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) struct tps549b22_regulator_subdev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	struct regulator_init_data *initdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	struct device_node *reg_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) static int tps549b22_dcdc_list_voltage(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 				       unsigned int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	struct tps549b22 *tps549b22 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	if (index + VOL_MIN_IDX > VOL_MAX_IDX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	return REG2VOL(index + VOL_MIN_IDX, tps549b22->vol_step);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) static int tps549b22_reg_init(struct tps549b22 *tps549b22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	if (regmap_update_bits(tps549b22->regmap_8bits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 			       TPS549b22_REG_OPERATION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 			       OPERATION_ON_MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 			       0x80) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		return regmap_update_bits(tps549b22->regmap_8bits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 					  TPS549b22_REG_ON_OFF_CFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 					  ON_OFF_CFG_OPT_MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 					  0x0c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	dev_err(tps549b22->dev, "regulator init err\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static int tps549b22dcdc_is_enabled(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	struct tps549b22 *tps549b22 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	err = regmap_read(tps549b22->regmap_8bits, TPS549b22_REG_ST_BYTE, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	return !(val & VOL_OFF_MSK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static int tps549b22dcdc_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	struct tps549b22 *tps549b22 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	return regmap_update_bits(tps549b22->regmap_8bits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 				  TPS549b22_REG_OPERATION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 				  OPERATION_ON_MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 				  0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static int tps549b22dcdc_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	struct tps549b22 *tps549b22 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	return regmap_update_bits(tps549b22->regmap_8bits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 				  TPS549b22_REG_OPERATION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 				  OPERATION_ON_MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 				  0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static int tps549b22dcdc_get_voltage(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	struct tps549b22 *tps549b22 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	u32 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	err = regmap_read(tps549b22->regmap_16bits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 			  TPS549b22_REG_COMMAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 			  &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	if (!err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		return REG2VOL(val, tps549b22->vol_step);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static int tps549b22dcdc_set_voltage(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 				     int min_uV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 				     int max_uV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 				     unsigned int *selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	struct tps549b22 *tps549b22 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	if (min_uV < REG2VOL(VOL_MIN_IDX, tps549b22->vol_step) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	    min_uV > REG2VOL(VOL_MAX_IDX, tps549b22->vol_step)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		dev_warn(rdev_get_dev(rdev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			 "this voltage is out of limit! voltage set is %d mv\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 			 REG2VOL(min_uV, tps549b22->vol_step));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	for (val = VOL_MIN_IDX; val <= VOL_MAX_IDX; val++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		if (REG2VOL(val, tps549b22->vol_step) >= min_uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	if (REG2VOL(val, tps549b22->vol_step) > max_uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		dev_warn(rdev_get_dev(rdev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			 "this voltage is not support! voltage set is %d mv\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			 REG2VOL(val, tps549b22->vol_step));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	err = regmap_update_bits(tps549b22->regmap_16bits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 				 TPS549b22_REG_COMMAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 				 VOL_MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 				 val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		dev_err(rdev_get_dev(rdev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 			"set voltage is error! voltage set is %d mv\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 			REG2VOL(val, tps549b22->vol_step));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static struct regulator_ops tps549b22dcdc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	.set_voltage = tps549b22dcdc_set_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	.get_voltage = tps549b22dcdc_get_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	.is_enabled = tps549b22dcdc_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	.enable = tps549b22dcdc_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	.disable = tps549b22dcdc_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	.list_voltage = tps549b22_dcdc_list_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static struct regulator_desc regulators[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		.name = "tps549b22_DCDC1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		.id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		.ops = &tps549b22dcdc_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		.n_voltages = VOL_MAX_IDX - VOL_MIN_IDX + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		.type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static struct of_regulator_match tps549b22_reg_matches[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	{ .name = "tps549b22_dcdc1", .driver_data = (void *)0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static struct tps549b22_board *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) tps549b22_parse_dt(struct tps549b22 *tps549b22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	struct tps549b22_board *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	struct device_node *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	struct device_node *tps549b22_np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	tps549b22_np = of_node_get(tps549b22->dev->of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	if (!tps549b22_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		pr_err("could not find pmic sub-node\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	regs = of_get_child_by_name(tps549b22_np, "regulators");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	if (!regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	count = of_regulator_match(tps549b22->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 				   regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 				   tps549b22_reg_matches,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 				   TPS549b22_NUM_REGULATORS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	if (of_property_read_u32(tps549b22_reg_matches[0].of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 				 "voltage-step",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 				 &tps549b22->vol_step))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		tps549b22->vol_step = VOL_STEP_DEF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	dev_info(tps549b22->dev, "voltage-step: %duV\n", tps549b22->vol_step);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	of_node_put(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	of_node_put(tps549b22_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	if (count <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	pdata = devm_kzalloc(tps549b22->dev, sizeof(*pdata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	if (!pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	pdata->tps549b22_init_data[0] = tps549b22_reg_matches[0].init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	pdata->of_node[0] = tps549b22_reg_matches[0].of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	return pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static const struct of_device_id tps549b22_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	{.compatible = "ti,tps549b22"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) MODULE_DEVICE_TABLE(of, tps549b22_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static const struct regmap_config tps549b22_8bits_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	.max_register = TPS549b22_REG_MFR_SPC_44 + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	.cache_type = REGCACHE_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static const struct regmap_config tps549b22_16bits_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	.val_bits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	.max_register = TPS549b22_REG_MFR_SPC_44 + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	.cache_type = REGCACHE_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	.val_format_endian = REGMAP_ENDIAN_LITTLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static int tps549b22_i2c_probe(struct i2c_client *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 			       const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	struct tps549b22 *tps549b22;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	struct tps549b22_board *pdev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	const struct of_device_id *match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	struct regulator_init_data *reg_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	if (i2c->dev.of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 		match = of_match_device(tps549b22_of_match, &i2c->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		if (!match) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 			pr_err("Failed to find matching dt id\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	tps549b22 = devm_kzalloc(&i2c->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 				 sizeof(struct tps549b22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 				 GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	if (!tps549b22) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 		ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	tps549b22->regmap_8bits =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 		devm_regmap_init_i2c(i2c, &tps549b22_8bits_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	if (IS_ERR(tps549b22->regmap_8bits)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		dev_err(&i2c->dev, "8 bits regmap initialization failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		return PTR_ERR(tps549b22->regmap_8bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	tps549b22->regmap_16bits =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		devm_regmap_init_i2c(i2c, &tps549b22_16bits_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	if (IS_ERR(tps549b22->regmap_16bits)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		dev_err(&i2c->dev, "16 bits regmap initialization failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		return PTR_ERR(tps549b22->regmap_16bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	tps549b22->i2c = i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	tps549b22->dev = &i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	i2c_set_clientdata(i2c, tps549b22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	ret = regmap_read(tps549b22->regmap_16bits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 			  TPS549b22_REG_MFR_SPC_44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 			  &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 		if (val != TPS549b22_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 			dev_warn(tps549b22->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 				 "The device is not tps549b22 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 				 val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 		dev_err(tps549b22->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 			"Tps549b22_reg_read err, ret = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 			ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	tps549b22_reg_init(tps549b22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	if (tps549b22->dev->of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 		pdev = tps549b22_parse_dt(tps549b22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	if (pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 		tps549b22->num_regulators = TPS549b22_NUM_REGULATORS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 		tps549b22->rdev =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 			devm_kmalloc_array(tps549b22->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 					   TPS549b22_NUM_REGULATORS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 					   sizeof(struct regulator_dev *),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 					   GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		if (!tps549b22->rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 			return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 		/* Instantiate the regulators */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 		reg_data = pdev->tps549b22_init_data[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		config.dev = tps549b22->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 		config.driver_data = tps549b22;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 		if (tps549b22->dev->of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 			config.of_node = pdev->of_node[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		config.init_data = reg_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 		rdev = devm_regulator_register(tps549b22->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 					       &regulators[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 					       &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 		if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 			pr_err("failed to register regulator\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 			goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		tps549b22->rdev[0] = rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static int tps549b22_i2c_remove(struct i2c_client *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	i2c_set_clientdata(i2c, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static const struct i2c_device_id tps549b22_i2c_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	{"tps549b22", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) MODULE_DEVICE_TABLE(i2c, tps549b22_i2c_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) static struct i2c_driver tps549b22_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 		.name = "tps549b22",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 		.of_match_table = of_match_ptr(tps549b22_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	.probe = tps549b22_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	.remove = tps549b22_i2c_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	.id_table = tps549b22_i2c_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static int __init tps549b22_module_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	ret = i2c_add_driver(&tps549b22_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 		pr_err("Failed to register I2C driver: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) subsys_initcall_sync(tps549b22_module_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static void __exit tps549b22_module_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	i2c_del_driver(&tps549b22_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) module_exit(tps549b22_module_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) MODULE_AUTHOR("derrick.huang@rock-chips.com");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) MODULE_DESCRIPTION("   tps549b22 dcdc driver");