^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Texas Instruments SoC Adaptive Body Bias(ABB) Regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2011 Texas Instruments, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Mike Turquette <mturquette@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2012-2013 Texas Instruments, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Nishanth Menon <nm@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * it under the terms of the GNU General Public License version 2 as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * published by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * This program is distributed "as is" WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * kind, whether express or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * ABB LDO operating states:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * NOMINAL_OPP: bypasses the ABB LDO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * FAST_OPP: sets ABB LDO to Forward Body-Bias
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * SLOW_OPP: sets ABB LDO to Reverse Body-Bias
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define TI_ABB_NOMINAL_OPP 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define TI_ABB_FAST_OPP 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define TI_ABB_SLOW_OPP 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * struct ti_abb_info - ABB information per voltage setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * @opp_sel: one of TI_ABB macro
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * @vset: (optional) vset value that LDOVBB needs to be overriden with.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * Array of per voltage entries organized in the same order as regulator_desc's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * volt_table list. (selector is used to index from this array)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct ti_abb_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) u32 opp_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u32 vset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * struct ti_abb_reg - Register description for ABB block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * @setup_off: setup register offset from base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @control_off: control register offset from base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * @sr2_wtcnt_value_mask: setup register- sr2_wtcnt_value mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * @fbb_sel_mask: setup register- FBB sel mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * @rbb_sel_mask: setup register- RBB sel mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * @sr2_en_mask: setup register- enable mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * @opp_change_mask: control register - mask to trigger LDOVBB change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * @opp_sel_mask: control register - mask for mode to operate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct ti_abb_reg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) u32 setup_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) u32 control_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* Setup register fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) u32 sr2_wtcnt_value_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) u32 fbb_sel_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) u32 rbb_sel_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) u32 sr2_en_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* Control register fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u32 opp_change_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) u32 opp_sel_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * struct ti_abb - ABB instance data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * @rdesc: regulator descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * @clk: clock(usually sysclk) supplying ABB block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * @base: base address of ABB block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * @setup_reg: setup register of ABB block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * @control_reg: control register of ABB block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * @int_base: interrupt register base address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * @efuse_base: (optional) efuse base address for ABB modes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * @ldo_base: (optional) LDOVBB vset override base address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * @regs: pointer to struct ti_abb_reg for ABB block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * @txdone_mask: mask on int_base for tranxdone interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * @ldovbb_override_mask: mask to ldo_base for overriding default LDO VBB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * vset with value from efuse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * @ldovbb_vset_mask: mask to ldo_base for providing the VSET override
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * @info: array to per voltage ABB configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * @current_info_idx: current index to info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * @settling_time: SoC specific settling time for LDO VBB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct ti_abb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct regulator_desc rdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) void __iomem *setup_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) void __iomem *control_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) void __iomem *int_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) void __iomem *efuse_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) void __iomem *ldo_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) const struct ti_abb_reg *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u32 txdone_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) u32 ldovbb_override_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) u32 ldovbb_vset_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct ti_abb_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) int current_info_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u32 settling_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * ti_abb_rmw() - handy wrapper to set specific register bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * @mask: mask for register field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * @value: value shifted to mask location and written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * @reg: register address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * Return: final register value (may be unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static inline u32 ti_abb_rmw(u32 mask, u32 value, void __iomem *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) val = readl(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) val &= ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) val |= (value << __ffs(mask)) & mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) writel(val, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * ti_abb_check_txdone() - handy wrapper to check ABB tranxdone status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * @abb: pointer to the abb instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * Return: true or false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static inline bool ti_abb_check_txdone(const struct ti_abb *abb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return !!(readl(abb->int_base) & abb->txdone_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * ti_abb_clear_txdone() - handy wrapper to clear ABB tranxdone status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * @abb: pointer to the abb instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static inline void ti_abb_clear_txdone(const struct ti_abb *abb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) writel(abb->txdone_mask, abb->int_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * ti_abb_wait_tranx() - waits for ABB tranxdone event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * @dev: device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * @abb: pointer to the abb instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * Return: 0 on success or -ETIMEDOUT if the event is not cleared on time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static int ti_abb_wait_txdone(struct device *dev, struct ti_abb *abb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) int timeout = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) bool status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) while (timeout++ <= abb->settling_time) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) status = ti_abb_check_txdone(abb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) dev_warn_ratelimited(dev, "%s:TRANXDONE timeout(%duS) int=0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) __func__, timeout, readl(abb->int_base));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * ti_abb_clear_all_txdone() - clears ABB tranxdone event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * @dev: device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * @abb: pointer to the abb instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * Return: 0 on success or -ETIMEDOUT if the event is not cleared on time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static int ti_abb_clear_all_txdone(struct device *dev, const struct ti_abb *abb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) int timeout = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) bool status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) while (timeout++ <= abb->settling_time) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) ti_abb_clear_txdone(abb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) status = ti_abb_check_txdone(abb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) if (!status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) dev_warn_ratelimited(dev, "%s:TRANXDONE timeout(%duS) int=0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) __func__, timeout, readl(abb->int_base));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * ti_abb_program_ldovbb() - program LDOVBB register for override value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * @dev: device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * @abb: pointer to the abb instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * @info: ABB info to program
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) static void ti_abb_program_ldovbb(struct device *dev, const struct ti_abb *abb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) struct ti_abb_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) val = readl(abb->ldo_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /* clear up previous values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) val &= ~(abb->ldovbb_override_mask | abb->ldovbb_vset_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) switch (info->opp_sel) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) case TI_ABB_SLOW_OPP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) case TI_ABB_FAST_OPP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) val |= abb->ldovbb_override_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) val |= info->vset << __ffs(abb->ldovbb_vset_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) writel(val, abb->ldo_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * ti_abb_set_opp() - Setup ABB and LDO VBB for required bias
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * @rdev: regulator device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) * @abb: pointer to the abb instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) * @info: ABB info to program
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) * Return: 0 on success or appropriate error value when fails
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static int ti_abb_set_opp(struct regulator_dev *rdev, struct ti_abb *abb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) struct ti_abb_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) const struct ti_abb_reg *regs = abb->regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) struct device *dev = &rdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) ret = ti_abb_clear_all_txdone(dev, abb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) ti_abb_rmw(regs->fbb_sel_mask | regs->rbb_sel_mask, 0, abb->setup_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) switch (info->opp_sel) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) case TI_ABB_SLOW_OPP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) ti_abb_rmw(regs->rbb_sel_mask, 1, abb->setup_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) case TI_ABB_FAST_OPP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) ti_abb_rmw(regs->fbb_sel_mask, 1, abb->setup_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) /* program next state of ABB ldo */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ti_abb_rmw(regs->opp_sel_mask, info->opp_sel, abb->control_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * program LDO VBB vset override if needed for !bypass mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * XXX: Do not switch sequence - for !bypass, LDO override reset *must*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * be performed *before* switch to bias mode else VBB glitches.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if (abb->ldo_base && info->opp_sel != TI_ABB_NOMINAL_OPP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) ti_abb_program_ldovbb(dev, abb, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) /* Initiate ABB ldo change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ti_abb_rmw(regs->opp_change_mask, 1, abb->control_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /* Wait for ABB LDO to complete transition to new Bias setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) ret = ti_abb_wait_txdone(dev, abb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) ret = ti_abb_clear_all_txdone(dev, abb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * Reset LDO VBB vset override bypass mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * XXX: Do not switch sequence - for bypass, LDO override reset *must*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) * be performed *after* switch to bypass else VBB glitches.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) if (abb->ldo_base && info->opp_sel == TI_ABB_NOMINAL_OPP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) ti_abb_program_ldovbb(dev, abb, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) * ti_abb_set_voltage_sel() - regulator accessor function to set ABB LDO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * @rdev: regulator device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) * @sel: selector to index into required ABB LDO settings (maps to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) * regulator descriptor's volt_table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) * Return: 0 on success or appropriate error value when fails
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static int ti_abb_set_voltage_sel(struct regulator_dev *rdev, unsigned sel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) const struct regulator_desc *desc = rdev->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) struct ti_abb *abb = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct device *dev = &rdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) struct ti_abb_info *info, *oinfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) if (!abb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) dev_err_ratelimited(dev, "%s: No regulator drvdata\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) if (!desc->n_voltages || !abb->info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) dev_err_ratelimited(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) "%s: No valid voltage table entries?\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (sel >= desc->n_voltages) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) dev_err(dev, "%s: sel idx(%d) >= n_voltages(%d)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) sel, desc->n_voltages);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /* If we are in the same index as we were, nothing to do here! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (sel == abb->current_info_idx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) dev_dbg(dev, "%s: Already at sel=%d\n", __func__, sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) info = &abb->info[sel];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) * When Linux kernel is starting up, we are'nt sure of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) * Bias configuration that bootloader has configured.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) * So, we get to know the actual setting the first time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) * we are asked to transition.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (abb->current_info_idx == -EINVAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) goto just_set_abb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) /* If data is exactly the same, then just update index, no change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) oinfo = &abb->info[abb->current_info_idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (!memcmp(info, oinfo, sizeof(*info))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) dev_dbg(dev, "%s: Same data new idx=%d, old idx=%d\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) sel, abb->current_info_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) just_set_abb:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) ret = ti_abb_set_opp(rdev, abb, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) abb->current_info_idx = sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) dev_err_ratelimited(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) "%s: Volt[%d] idx[%d] mode[%d] Fail(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) __func__, desc->volt_table[sel], sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) info->opp_sel, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * ti_abb_get_voltage_sel() - Regulator accessor to get current ABB LDO setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * @rdev: regulator device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) * Return: 0 on success or appropriate error value when fails
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static int ti_abb_get_voltage_sel(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) const struct regulator_desc *desc = rdev->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) struct ti_abb *abb = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) struct device *dev = &rdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (!abb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) dev_err_ratelimited(dev, "%s: No regulator drvdata\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) if (!desc->n_voltages || !abb->info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) dev_err_ratelimited(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) "%s: No valid voltage table entries?\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (abb->current_info_idx >= (int)desc->n_voltages) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) dev_err(dev, "%s: Corrupted data? idx(%d) >= n_voltages(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) __func__, abb->current_info_idx, desc->n_voltages);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) return abb->current_info_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) * ti_abb_init_timings() - setup ABB clock timing for the current platform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) * @dev: device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) * @abb: pointer to the abb instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * Return: 0 if timing is updated, else returns error result.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) static int ti_abb_init_timings(struct device *dev, struct ti_abb *abb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) u32 clock_cycles;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) u32 clk_rate, sr2_wt_cnt_val, cycle_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) const struct ti_abb_reg *regs = abb->regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) char *pname = "ti,settling-time";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) /* read device tree properties */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) ret = of_property_read_u32(dev->of_node, pname, &abb->settling_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) dev_err(dev, "Unable to get property '%s'(%d)\n", pname, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) /* ABB LDO cannot be settle in 0 time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (!abb->settling_time) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) dev_err(dev, "Invalid property:'%s' set as 0!\n", pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) pname = "ti,clock-cycles";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) ret = of_property_read_u32(dev->of_node, pname, &clock_cycles);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) dev_err(dev, "Unable to get property '%s'(%d)\n", pname, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) /* ABB LDO cannot be settle in 0 clock cycles */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (!clock_cycles) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) dev_err(dev, "Invalid property:'%s' set as 0!\n", pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) abb->clk = devm_clk_get(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (IS_ERR(abb->clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) ret = PTR_ERR(abb->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) dev_err(dev, "%s: Unable to get clk(%d)\n", __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) * SR2_WTCNT_VALUE is the settling time for the ABB ldo after a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) * transition and must be programmed with the correct time at boot.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) * The value programmed into the register is the number of SYS_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) * clock cycles that match a given wall time profiled for the ldo.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) * This value depends on:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) * settling time of ldo in micro-seconds (varies per OMAP family)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) * # of clock cycles per SYS_CLK period (varies per OMAP family)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) * the SYS_CLK frequency in MHz (varies per board)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) * The formula is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) * ldo settling time (in micro-seconds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) * SR2_WTCNT_VALUE = ------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) * (# system clock cycles) * (sys_clk period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) * Put another way:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) * SR2_WTCNT_VALUE = settling time / (# SYS_CLK cycles / SYS_CLK rate))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) * To avoid dividing by zero multiply both "# clock cycles" and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) * "settling time" by 10 such that the final result is the one we want.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) /* Convert SYS_CLK rate to MHz & prevent divide by zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) clk_rate = DIV_ROUND_CLOSEST(clk_get_rate(abb->clk), 1000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) /* Calculate cycle rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) cycle_rate = DIV_ROUND_CLOSEST(clock_cycles * 10, clk_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) /* Calulate SR2_WTCNT_VALUE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) sr2_wt_cnt_val = DIV_ROUND_CLOSEST(abb->settling_time * 10, cycle_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) dev_dbg(dev, "%s: Clk_rate=%ld, sr2_cnt=0x%08x\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) clk_get_rate(abb->clk), sr2_wt_cnt_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) ti_abb_rmw(regs->sr2_wtcnt_value_mask, sr2_wt_cnt_val, abb->setup_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) * ti_abb_init_table() - Initialize ABB table from device tree
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) * @dev: device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) * @abb: pointer to the abb instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) * @rinit_data: regulator initdata
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) * Return: 0 on success or appropriate error value when fails
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) static int ti_abb_init_table(struct device *dev, struct ti_abb *abb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) struct regulator_init_data *rinit_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) struct ti_abb_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) const u32 num_values = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) char *pname = "ti,abb_info";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) u32 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) unsigned int *volt_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) int num_entries, min_uV = INT_MAX, max_uV = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) struct regulation_constraints *c = &rinit_data->constraints;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) * Each abb_info is a set of n-tuple, where n is num_values, consisting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) * of voltage and a set of detection logic for ABB information for that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) * voltage to apply.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) num_entries = of_property_count_u32_elems(dev->of_node, pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) if (num_entries < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) dev_err(dev, "No '%s' property?\n", pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) return num_entries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) if (!num_entries || (num_entries % num_values)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) dev_err(dev, "All '%s' list entries need %d vals\n", pname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) num_values);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) num_entries /= num_values;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) info = devm_kcalloc(dev, num_entries, sizeof(*info), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) if (!info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) abb->info = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) volt_table = devm_kcalloc(dev, num_entries, sizeof(unsigned int),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) if (!volt_table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) abb->rdesc.n_voltages = num_entries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) abb->rdesc.volt_table = volt_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) /* We do not know where the OPP voltage is at the moment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) abb->current_info_idx = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) for (i = 0; i < num_entries; i++, info++, volt_table++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) u32 efuse_offset, rbb_mask, fbb_mask, vset_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) u32 efuse_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) /* NOTE: num_values should equal to entries picked up here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) of_property_read_u32_index(dev->of_node, pname, i * num_values,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) volt_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) of_property_read_u32_index(dev->of_node, pname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) i * num_values + 1, &info->opp_sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) of_property_read_u32_index(dev->of_node, pname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) i * num_values + 2, &efuse_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) of_property_read_u32_index(dev->of_node, pname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) i * num_values + 3, &rbb_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) of_property_read_u32_index(dev->of_node, pname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) i * num_values + 4, &fbb_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) of_property_read_u32_index(dev->of_node, pname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) i * num_values + 5, &vset_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) dev_dbg(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) "[%d]v=%d ABB=%d ef=0x%x rbb=0x%x fbb=0x%x vset=0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) i, *volt_table, info->opp_sel, efuse_offset, rbb_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) fbb_mask, vset_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) /* Find min/max for voltage set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) if (min_uV > *volt_table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) min_uV = *volt_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) if (max_uV < *volt_table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) max_uV = *volt_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) if (!abb->efuse_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) /* Ignore invalid data, but warn to help cleanup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (efuse_offset || rbb_mask || fbb_mask || vset_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) dev_err(dev, "prop '%s': v=%d,bad efuse/mask\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) pname, *volt_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) goto check_abb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) efuse_val = readl(abb->efuse_base + efuse_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) /* Use ABB recommendation from Efuse */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) if (efuse_val & rbb_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) info->opp_sel = TI_ABB_SLOW_OPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) else if (efuse_val & fbb_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) info->opp_sel = TI_ABB_FAST_OPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) else if (rbb_mask || fbb_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) info->opp_sel = TI_ABB_NOMINAL_OPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) dev_dbg(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) "[%d]v=%d efusev=0x%x final ABB=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) i, *volt_table, efuse_val, info->opp_sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) /* Use recommended Vset bits from Efuse */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) if (!abb->ldo_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) if (vset_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) dev_err(dev, "prop'%s':v=%d vst=%x LDO base?\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) pname, *volt_table, vset_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) info->vset = (efuse_val & vset_mask) >> __ffs(vset_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) dev_dbg(dev, "[%d]v=%d vset=%x\n", i, *volt_table, info->vset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) check_abb:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) switch (info->opp_sel) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) case TI_ABB_NOMINAL_OPP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) case TI_ABB_FAST_OPP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) case TI_ABB_SLOW_OPP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) /* Valid values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) dev_err(dev, "%s:[%d]v=%d, ABB=%d is invalid! Abort!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) __func__, i, *volt_table, info->opp_sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) /* Setup the min/max voltage constraints from the supported list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) c->min_uV = min_uV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) c->max_uV = max_uV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) static const struct regulator_ops ti_abb_reg_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) .list_voltage = regulator_list_voltage_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) .set_voltage_sel = ti_abb_set_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) .get_voltage_sel = ti_abb_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) /* Default ABB block offsets, IF this changes in future, create new one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) static const struct ti_abb_reg abb_regs_v1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) /* WARNING: registers are wrongly documented in TRM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) .setup_off = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) .control_off = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) .sr2_wtcnt_value_mask = (0xff << 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) .fbb_sel_mask = (0x01 << 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) .rbb_sel_mask = (0x01 << 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) .sr2_en_mask = (0x01 << 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) .opp_change_mask = (0x01 << 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) .opp_sel_mask = (0x03 << 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) static const struct ti_abb_reg abb_regs_v2 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) .setup_off = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) .control_off = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) .sr2_wtcnt_value_mask = (0xff << 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) .fbb_sel_mask = (0x01 << 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) .rbb_sel_mask = (0x01 << 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) .sr2_en_mask = (0x01 << 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) .opp_change_mask = (0x01 << 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) .opp_sel_mask = (0x03 << 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) static const struct ti_abb_reg abb_regs_generic = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) .sr2_wtcnt_value_mask = (0xff << 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) .fbb_sel_mask = (0x01 << 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) .rbb_sel_mask = (0x01 << 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) .sr2_en_mask = (0x01 << 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) .opp_change_mask = (0x01 << 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) .opp_sel_mask = (0x03 << 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) static const struct of_device_id ti_abb_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) {.compatible = "ti,abb-v1", .data = &abb_regs_v1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) {.compatible = "ti,abb-v2", .data = &abb_regs_v2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) {.compatible = "ti,abb-v3", .data = &abb_regs_generic},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) MODULE_DEVICE_TABLE(of, ti_abb_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) * ti_abb_probe() - Initialize an ABB ldo instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) * @pdev: ABB platform device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) * Initializes an individual ABB LDO for required Body-Bias. ABB is used to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) * addional bias supply to SoC modules for power savings or mandatory stability
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) * configuration at certain Operating Performance Points(OPPs).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) * Return: 0 on success or appropriate error value when fails
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) static int ti_abb_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) const struct of_device_id *match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) struct ti_abb *abb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) struct regulator_init_data *initdata = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) struct regulator_dev *rdev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) struct regulator_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) struct regulation_constraints *c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) char *pname;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) match = of_match_device(ti_abb_of_match, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) if (!match) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) /* We do not expect this to happen */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) dev_err(dev, "%s: Unable to match device\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) if (!match->data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) dev_err(dev, "%s: Bad data in match\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) abb = devm_kzalloc(dev, sizeof(struct ti_abb), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) if (!abb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) abb->regs = match->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) /* Map ABB resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) if (abb->regs->setup_off || abb->regs->control_off) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) pname = "base-address";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) res = platform_get_resource_byname(pdev, IORESOURCE_MEM, pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) abb->base = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) if (IS_ERR(abb->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) return PTR_ERR(abb->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) abb->setup_reg = abb->base + abb->regs->setup_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) abb->control_reg = abb->base + abb->regs->control_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) pname = "control-address";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) res = platform_get_resource_byname(pdev, IORESOURCE_MEM, pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) abb->control_reg = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) if (IS_ERR(abb->control_reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) return PTR_ERR(abb->control_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) pname = "setup-address";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) res = platform_get_resource_byname(pdev, IORESOURCE_MEM, pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) abb->setup_reg = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) if (IS_ERR(abb->setup_reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) return PTR_ERR(abb->setup_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) pname = "int-address";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) res = platform_get_resource_byname(pdev, IORESOURCE_MEM, pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) if (!res) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) dev_err(dev, "Missing '%s' IO resource\n", pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) * We may have shared interrupt register offsets which are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) * write-1-to-clear between domains ensuring exclusivity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) abb->int_base = devm_ioremap(dev, res->start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) resource_size(res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) if (!abb->int_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) dev_err(dev, "Unable to map '%s'\n", pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) /* Map Optional resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) pname = "efuse-address";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) res = platform_get_resource_byname(pdev, IORESOURCE_MEM, pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) if (!res) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) dev_dbg(dev, "Missing '%s' IO resource\n", pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) goto skip_opt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) * We may have shared efuse register offsets which are read-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) * between domains
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) abb->efuse_base = devm_ioremap(dev, res->start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) resource_size(res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) if (!abb->efuse_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) dev_err(dev, "Unable to map '%s'\n", pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) pname = "ldo-address";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) res = platform_get_resource_byname(pdev, IORESOURCE_MEM, pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) if (!res) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) dev_dbg(dev, "Missing '%s' IO resource\n", pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) goto skip_opt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) abb->ldo_base = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) if (IS_ERR(abb->ldo_base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) return PTR_ERR(abb->ldo_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) /* IF ldo_base is set, the following are mandatory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) pname = "ti,ldovbb-override-mask";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) ret =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) of_property_read_u32(pdev->dev.of_node, pname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) &abb->ldovbb_override_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) dev_err(dev, "Missing '%s' (%d)\n", pname, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) if (!abb->ldovbb_override_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) dev_err(dev, "Invalid property:'%s' set as 0!\n", pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) pname = "ti,ldovbb-vset-mask";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) ret =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) of_property_read_u32(pdev->dev.of_node, pname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) &abb->ldovbb_vset_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) dev_err(dev, "Missing '%s' (%d)\n", pname, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) if (!abb->ldovbb_vset_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) dev_err(dev, "Invalid property:'%s' set as 0!\n", pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) skip_opt:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) pname = "ti,tranxdone-status-mask";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) ret =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) of_property_read_u32(pdev->dev.of_node, pname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) &abb->txdone_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) dev_err(dev, "Missing '%s' (%d)\n", pname, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) if (!abb->txdone_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) dev_err(dev, "Invalid property:'%s' set as 0!\n", pname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) initdata = of_get_regulator_init_data(dev, pdev->dev.of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) &abb->rdesc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) if (!initdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) dev_err(dev, "%s: Unable to alloc regulator init data\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) /* init ABB opp_sel table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) ret = ti_abb_init_table(dev, abb, initdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) /* init ABB timing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) ret = ti_abb_init_timings(dev, abb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) desc = &abb->rdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) desc->name = dev_name(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) desc->owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) desc->type = REGULATOR_VOLTAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) desc->ops = &ti_abb_reg_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) c = &initdata->constraints;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) if (desc->n_voltages > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) c->valid_ops_mask |= REGULATOR_CHANGE_VOLTAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) c->always_on = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) config.dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) config.init_data = initdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) config.driver_data = abb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) config.of_node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) rdev = devm_regulator_register(dev, desc, &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) ret = PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) dev_err(dev, "%s: failed to register regulator(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) platform_set_drvdata(pdev, rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) /* Enable the ldo if not already done by bootloader */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) ti_abb_rmw(abb->regs->sr2_en_mask, 1, abb->setup_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) MODULE_ALIAS("platform:ti_abb");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) static struct platform_driver ti_abb_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) .probe = ti_abb_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) .name = "ti_abb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) .of_match_table = of_match_ptr(ti_abb_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) module_platform_driver(ti_abb_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) MODULE_DESCRIPTION("Texas Instruments ABB LDO regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) MODULE_AUTHOR("Texas Instruments Inc.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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