^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Regulator driver for syr82x DCDC chip for rk32xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2010, 2011 ROCKCHIP, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Based on syr82x.c that is work by zhangqing<zhangqing@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * it under the terms of the GNU General Public License version 2 as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * published by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/bug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define syr82x_NUM_REGULATORS 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct syr82x {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct mutex io_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct i2c_client *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int num_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct regulator_dev **rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) int irq_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int chip_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) int sleep_gpio; /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) unsigned int dcdc_slp_voltage[3]; /* buckx_voltage in uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) bool pmic_sleep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct syr82x_regulator {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct regulator_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct syr82x_board {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int irq_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct regulator_init_data *syr82x_init_data[syr82x_NUM_REGULATORS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct device_node *of_node[syr82x_NUM_REGULATORS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int sleep_gpio; /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) unsigned int dcdc_slp_voltage[3]; /* buckx_voltage in uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) bool sleep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct syr82x_regulator_subdev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct regulator_init_data *initdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct device_node *reg_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct syr82x_platform_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int ono;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) int num_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct syr82x_regulator_subdev *regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) int sleep_gpio; /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) unsigned int dcdc_slp_voltage[3]; /* buckx_voltage in uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) bool sleep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct syr82x *g_syr82x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define SYR82X_BUCK1_SET_VOL_BASE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define SYR82X_BUCK1_SLP_VOL_BASE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define SYR82X_CONTR_REG1 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define SYR82X_ID1_REG 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define SYR82X_ID2_REG 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define SYR82X_CONTR_REG2 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define BUCK_VOL_MASK 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define VOL_MIN_IDX 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define VOL_MAX_IDX 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct syr82x_reg_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) int addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) int mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) int value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static const struct regmap_config syr82x_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .max_register = SYR82X_CONTR_REG2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) const static int buck_voltage_map[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 712500, 725000, 737500,750000, 762500,775000,787500,800000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 812500, 825000, 837500,850000, 862500,875000,887500,900000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 912500, 925000, 937500,950000, 962500,975000,987500,1000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 1012500, 1025000, 1037500,1050000, 1062500,1075000,1087500,1100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 1112500, 1125000, 1137500,1150000, 1162500,1175000,1187500,1200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 1212500, 1225000, 1237500,1250000, 1262500,1275000,1287500,1300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 1312500, 1325000, 1337500,1350000, 1362500,1375000,1387500,1400000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 1412500, 1425000, 1437500,1450000, 1462500,1475000,1487500,1500000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static int syr82x_dcdc_list_voltage(struct regulator_dev *dev, unsigned index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (index >= ARRAY_SIZE(buck_voltage_map))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return buck_voltage_map[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static int syr82x_dcdc_is_enabled(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct syr82x *syr82x = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) u16 mask = 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) ret = regmap_read(syr82x->regmap, SYR82X_BUCK1_SET_VOL_BASE, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) val &= (~0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (val & mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static int syr82x_dcdc_enable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct syr82x *syr82x = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) u16 mask = 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) ret = regmap_update_bits(syr82x->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) SYR82X_BUCK1_SET_VOL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) mask, 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static int syr82x_dcdc_disable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct syr82x *syr82x = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) u16 mask = 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) ret = regmap_update_bits(syr82x->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) SYR82X_BUCK1_SET_VOL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) mask, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static int syr82x_dcdc_get_voltage(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct syr82x *syr82x = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) ret = regmap_read(syr82x->regmap, SYR82X_BUCK1_SET_VOL_BASE, ®);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) reg &= BUCK_VOL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) val = buck_voltage_map[reg];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static int syr82x_dcdc_set_voltage(struct regulator_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) int min_uV, int max_uV,unsigned *selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) struct syr82x *syr82x = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) const int *vol_map = buck_voltage_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) u16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) if (min_uV < vol_map[VOL_MIN_IDX] ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) min_uV > vol_map[VOL_MAX_IDX])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) for (val = VOL_MIN_IDX; val <= VOL_MAX_IDX; val++){
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (vol_map[val] >= min_uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (vol_map[val] > max_uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) printk("WARNING:this voltage is not support!voltage set is %d mv\n",vol_map[val]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) ret = regmap_update_bits(syr82x->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) SYR82X_BUCK1_SET_VOL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) BUCK_VOL_MASK, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) printk("###################WARNING:set voltage is error!voltage set is %d mv %d\n",vol_map[val],ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static unsigned int syr82x_dcdc_get_mode(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) struct syr82x *syr82x = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) u16 mask = 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) ret = regmap_read(syr82x->regmap, SYR82X_BUCK1_SET_VOL_BASE, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) val &= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) if (val == mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return REGULATOR_MODE_FAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static int syr82x_dcdc_set_mode(struct regulator_dev *dev, unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct syr82x *syr82x = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) u16 mask = 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) switch(mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) case REGULATOR_MODE_FAST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return regmap_update_bits(syr82x->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) SYR82X_BUCK1_SET_VOL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) mask, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) case REGULATOR_MODE_NORMAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) return regmap_update_bits(syr82x->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) SYR82X_BUCK1_SET_VOL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) mask, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) printk("error:dcdc_syr82x only auto and pwm mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static int syr82x_dcdc_set_voltage_time_sel(struct regulator_dev *dev, unsigned int old_selector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) unsigned int new_selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) int old_volt, new_volt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) old_volt = syr82x_dcdc_list_voltage(dev, old_selector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (old_volt < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return old_volt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) new_volt = syr82x_dcdc_list_voltage(dev, new_selector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (new_volt < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return new_volt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return DIV_ROUND_UP(abs(old_volt - new_volt)*4, 10000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static int syr82x_dcdc_suspend_enable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) struct syr82x *syr82x = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) u16 mask = 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) return regmap_update_bits(syr82x->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) SYR82X_BUCK1_SLP_VOL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) mask, 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static int syr82x_dcdc_suspend_disable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) struct syr82x *syr82x = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) u16 mask=0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return regmap_update_bits(syr82x->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) SYR82X_BUCK1_SLP_VOL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) mask, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static int syr82x_dcdc_set_sleep_voltage(struct regulator_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) int uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) struct syr82x *syr82x = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) const int *vol_map = buck_voltage_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) u16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (uV < vol_map[VOL_MIN_IDX] ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) uV > vol_map[VOL_MAX_IDX])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) for (val = VOL_MIN_IDX; val <= VOL_MAX_IDX; val++){
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) if (vol_map[val] >= uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (vol_map[val] > uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) printk("WARNING:this voltage is not support!voltage set is %d mv\n",vol_map[val]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) ret = regmap_update_bits(syr82x->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) SYR82X_BUCK1_SLP_VOL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) BUCK_VOL_MASK, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static int syr82x_dcdc_set_suspend_mode(struct regulator_dev *dev, unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) struct syr82x *syr82x = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) u16 mask = 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) switch(mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) case REGULATOR_MODE_FAST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return regmap_update_bits(syr82x->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) SYR82X_BUCK1_SLP_VOL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) mask, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) case REGULATOR_MODE_NORMAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return regmap_update_bits(syr82x->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) SYR82X_BUCK1_SLP_VOL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) mask, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) printk("error:dcdc_syr82x only auto and pwm mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static struct regulator_ops syr82x_dcdc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) .set_voltage = syr82x_dcdc_set_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .get_voltage = syr82x_dcdc_get_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .list_voltage= syr82x_dcdc_list_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) .is_enabled = syr82x_dcdc_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .enable = syr82x_dcdc_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .disable = syr82x_dcdc_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) .get_mode = syr82x_dcdc_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) .set_mode = syr82x_dcdc_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .set_suspend_voltage = syr82x_dcdc_set_sleep_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .set_suspend_enable = syr82x_dcdc_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .set_suspend_disable = syr82x_dcdc_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .set_suspend_mode = syr82x_dcdc_set_suspend_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .set_voltage_time_sel = syr82x_dcdc_set_voltage_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) static struct regulator_desc regulators[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .name = "SY_DCDC1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .ops = &syr82x_dcdc_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .n_voltages = ARRAY_SIZE(buck_voltage_map),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static struct of_device_id syr82x_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) { .compatible = "silergy,syr82x"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) MODULE_DEVICE_TABLE(of, syr82x_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) static struct of_regulator_match syr82x_reg_matches[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) { .name = "syr82x_dcdc1" ,.driver_data = (void *)0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) static struct syr82x_board *syr82x_parse_dt(struct syr82x *syr82x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) struct syr82x_board *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) struct device_node *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) struct device_node *syr82x_np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) syr82x_np = of_node_get(syr82x->dev->of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (!syr82x_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) printk("could not find pmic sub-node\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) regs = of_find_node_by_name(syr82x_np, "regulators");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) if (!regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) count = of_regulator_match(syr82x->dev, regs, syr82x_reg_matches,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) syr82x_NUM_REGULATORS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) of_node_put(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) pdata = devm_kzalloc(syr82x->dev, sizeof(*pdata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (!pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) pdata->syr82x_init_data[0] = syr82x_reg_matches[0].init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) pdata->of_node[0] = syr82x_reg_matches[0].of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) return pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) static int syr82x_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) struct syr82x *syr82x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) struct syr82x_board *pdev ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) const struct of_device_id *match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) struct regulator_dev *sy_rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) struct regulator_init_data *reg_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) const char *rail_name = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) if (i2c->dev.of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) match = of_match_device(syr82x_of_match, &i2c->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) if (!match) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) printk("Failed to find matching dt id\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) syr82x = devm_kzalloc(&i2c->dev,sizeof(struct syr82x), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) if (syr82x == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) syr82x->regmap = devm_regmap_init_i2c(i2c, &syr82x_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) if (IS_ERR(syr82x->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) dev_err(&i2c->dev, "regmap initialization failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) return PTR_ERR(syr82x->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) syr82x->i2c = i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) syr82x->dev = &i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) i2c_set_clientdata(i2c, syr82x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) g_syr82x = syr82x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) mutex_init(&syr82x->io_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) ret = regmap_read(syr82x->regmap, SYR82X_ID1_REG, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) if ((ret < 0) || (val == 0xff) || (val == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) dev_err(&i2c->dev, "The device is not syr82x\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) ret = regmap_update_bits(syr82x->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) SYR82X_CONTR_REG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) (1 << 6), (1 << 6));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) if (syr82x->dev->of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) pdev = syr82x_parse_dt(syr82x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) if (pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) syr82x->num_regulators = syr82x_NUM_REGULATORS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) syr82x->rdev = kcalloc(syr82x_NUM_REGULATORS,sizeof(struct regulator_dev *), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (!syr82x->rdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) /* Instantiate the regulators */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) reg_data = pdev->syr82x_init_data[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) config.dev = syr82x->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) config.driver_data = syr82x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) if (syr82x->dev->of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) config.of_node = pdev->of_node[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) if (reg_data && reg_data->constraints.name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) rail_name = reg_data->constraints.name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) rail_name = regulators[0].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) reg_data->supply_regulator = rail_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) config.init_data =reg_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) sy_rdev = regulator_register(®ulators[0],&config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (IS_ERR(sy_rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) printk("failed to register regulator\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) syr82x->rdev[0] = sy_rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static int syr82x_i2c_remove(struct i2c_client *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) struct syr82x *syr82x = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) if (syr82x->rdev[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) regulator_unregister(syr82x->rdev[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) i2c_set_clientdata(i2c, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) static const struct i2c_device_id syr82x_i2c_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) { "syr82x", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) MODULE_DEVICE_TABLE(i2c, syr82x_i2c_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) static struct i2c_driver syr82x_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) .name = "syr82x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) .of_match_table =of_match_ptr(syr82x_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) .probe = syr82x_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) .remove = syr82x_i2c_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) .id_table = syr82x_i2c_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static int __init syr82x_module_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) ret = i2c_add_driver(&syr82x_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) pr_err("Failed to register I2C driver: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) subsys_initcall_sync(syr82x_module_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static void __exit syr82x_module_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) i2c_del_driver(&syr82x_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) module_exit(syr82x_module_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) MODULE_AUTHOR("zhangqing <zhangqing@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) MODULE_DESCRIPTION("syr82x PMIC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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