^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define RT4801_REG_VOP 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define RT4801_REG_VON 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define RT4801_REG_APPS 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define VOUT_MASK 0x1F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define MIN_UV 4000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define STEP_UV 100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define MAX_UV 6000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define N_VOLTAGES ((MAX_UV - MIN_UV) / STEP_UV + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define DSV_OUT_POS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define DSV_OUT_NEG 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DSV_OUT_MAX 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DSVP_ENABLE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define DSVN_ENABLE BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define DSVALL_ENABLE (DSVP_ENABLE | DSVN_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct rt4801_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct gpio_descs *enable_gpios;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned int enable_flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) unsigned int volt_sel[DSV_OUT_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static int rt4801_set_voltage_sel(struct regulator_dev *rdev, unsigned int selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct rt4801_priv *priv = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int id = rdev_get_id(rdev), ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) if (priv->enable_flag & BIT(id)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ret = regulator_set_voltage_sel_regmap(rdev, selector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) priv->volt_sel[id] = selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static int rt4801_get_voltage_sel(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct rt4801_priv *priv = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (priv->enable_flag & BIT(id))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return regulator_get_voltage_sel_regmap(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return priv->volt_sel[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static int rt4801_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct rt4801_priv *priv = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct gpio_descs *gpios = priv->enable_gpios;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int id = rdev_get_id(rdev), ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (!gpios || gpios->ndescs <= id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) dev_warn(&rdev->dev, "no dedicated gpio can control\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) goto bypass_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) gpiod_set_value(gpios->desc[id], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) bypass_gpio:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) ret = regmap_write(rdev->regmap, rdev->desc->vsel_reg, priv->volt_sel[id]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) priv->enable_flag |= BIT(id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static int rt4801_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct rt4801_priv *priv = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct gpio_descs *gpios = priv->enable_gpios;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (!gpios || gpios->ndescs <= id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) dev_warn(&rdev->dev, "no dedicated gpio can control\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) goto bypass_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) gpiod_set_value(gpios->desc[id], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) bypass_gpio:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) priv->enable_flag &= ~BIT(id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int rt4801_is_enabled(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct rt4801_priv *priv = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return !!(priv->enable_flag & BIT(id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static const struct regulator_ops rt4801_regulator_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .set_voltage_sel = rt4801_set_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .get_voltage_sel = rt4801_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .enable = rt4801_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .disable = rt4801_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .is_enabled = rt4801_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static const struct regulator_desc rt4801_regulator_descs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .name = "DSVP",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .ops = &rt4801_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .of_match = of_match_ptr("DSVP"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .id = DSV_OUT_POS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .min_uV = MIN_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .uV_step = STEP_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .n_voltages = N_VOLTAGES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .vsel_reg = RT4801_REG_VOP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .vsel_mask = VOUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .name = "DSVN",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .ops = &rt4801_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .of_match = of_match_ptr("DSVN"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .id = DSV_OUT_NEG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .min_uV = MIN_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .uV_step = STEP_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .n_voltages = N_VOLTAGES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .vsel_reg = RT4801_REG_VON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .vsel_mask = VOUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static const struct regmap_config rt4801_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .max_register = RT4801_REG_APPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static int rt4801_probe(struct i2c_client *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct rt4801_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) priv->dev = &i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /* bootloader will on, driver only reconfigure enable to all output high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) priv->enable_flag = DSVALL_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) regmap = devm_regmap_init_i2c(i2c, &rt4801_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) dev_err(&i2c->dev, "Failed to init regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) priv->enable_gpios = devm_gpiod_get_array_optional(&i2c->dev, "enable", GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (IS_ERR(priv->enable_gpios)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) dev_err(&i2c->dev, "Failed to get gpios\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return PTR_ERR(priv->enable_gpios);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) for (i = 0; i < DSV_OUT_MAX; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) const struct regulator_desc *desc = rt4801_regulator_descs + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct regulator_config config = { .dev = &i2c->dev, .driver_data = priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .regmap = regmap, };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) /* initialize volt_sel variable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) ret = regmap_read(regmap, desc->vsel_reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) priv->volt_sel[i] = val & desc->vsel_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) rdev = devm_regulator_register(&i2c->dev, desc, &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) dev_err(&i2c->dev, "Failed to register [%d] regulator\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static const struct of_device_id __maybe_unused rt4801_of_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) { .compatible = "richtek,rt4801", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) MODULE_DEVICE_TABLE(of, rt4801_of_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static struct i2c_driver rt4801_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .name = "rt4801",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .of_match_table = of_match_ptr(rt4801_of_id),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .probe_new = rt4801_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) module_i2c_driver(rt4801_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) MODULE_AUTHOR("ChiYuan Hwang <cy_huang@richtek.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) MODULE_DESCRIPTION("Richtek RT4801 Display Bias Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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