^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Regulator driver for Ricoh RN5T618 PMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/mfd/rn5t618.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) static const struct regulator_ops rn5t618_reg_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define REG(rid, ereg, emask, vreg, vmask, min, max, step) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .name = #rid, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .of_match = of_match_ptr(#rid), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .regulators_node = of_match_ptr("regulators"), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .id = RN5T618_##rid, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .ops = &rn5t618_reg_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .n_voltages = ((max) - (min)) / (step) + 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .min_uV = (min), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .uV_step = (step), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .enable_reg = RN5T618_##ereg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .enable_mask = (emask), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .vsel_reg = RN5T618_##vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .vsel_mask = (vmask), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static const struct regulator_desc rn5t567_regulators[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* DCDC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) REG(DCDC1, DC1CTL, BIT(0), DC1DAC, 0xff, 600000, 3500000, 12500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) REG(DCDC2, DC2CTL, BIT(0), DC2DAC, 0xff, 600000, 3500000, 12500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) REG(DCDC3, DC3CTL, BIT(0), DC3DAC, 0xff, 600000, 3500000, 12500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) REG(DCDC4, DC4CTL, BIT(0), DC4DAC, 0xff, 600000, 3500000, 12500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* LDO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) REG(LDO1, LDOEN1, BIT(0), LDO1DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) REG(LDO2, LDOEN1, BIT(1), LDO2DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) REG(LDO3, LDOEN1, BIT(2), LDO3DAC, 0x7f, 600000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) REG(LDO4, LDOEN1, BIT(3), LDO4DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) REG(LDO5, LDOEN1, BIT(4), LDO5DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* LDO RTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) REG(LDORTC1, LDOEN2, BIT(4), LDORTCDAC, 0x7f, 1200000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) REG(LDORTC2, LDOEN2, BIT(5), LDORTC2DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static const struct regulator_desc rn5t618_regulators[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* DCDC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) REG(DCDC1, DC1CTL, BIT(0), DC1DAC, 0xff, 600000, 3500000, 12500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) REG(DCDC2, DC2CTL, BIT(0), DC2DAC, 0xff, 600000, 3500000, 12500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) REG(DCDC3, DC3CTL, BIT(0), DC3DAC, 0xff, 600000, 3500000, 12500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* LDO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) REG(LDO1, LDOEN1, BIT(0), LDO1DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) REG(LDO2, LDOEN1, BIT(1), LDO2DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) REG(LDO3, LDOEN1, BIT(2), LDO3DAC, 0x7f, 600000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) REG(LDO4, LDOEN1, BIT(3), LDO4DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) REG(LDO5, LDOEN1, BIT(4), LDO5DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* LDO RTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) REG(LDORTC1, LDOEN2, BIT(4), LDORTCDAC, 0x7f, 1700000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) REG(LDORTC2, LDOEN2, BIT(5), LDORTC2DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static const struct regulator_desc rc5t619_regulators[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* DCDC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) REG(DCDC1, DC1CTL, BIT(0), DC1DAC, 0xff, 600000, 3500000, 12500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) REG(DCDC2, DC2CTL, BIT(0), DC2DAC, 0xff, 600000, 3500000, 12500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) REG(DCDC3, DC3CTL, BIT(0), DC3DAC, 0xff, 600000, 3500000, 12500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) REG(DCDC4, DC4CTL, BIT(0), DC4DAC, 0xff, 600000, 3500000, 12500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) REG(DCDC5, DC5CTL, BIT(0), DC5DAC, 0xff, 600000, 3500000, 12500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* LDO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) REG(LDO1, LDOEN1, BIT(0), LDO1DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) REG(LDO2, LDOEN1, BIT(1), LDO2DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) REG(LDO3, LDOEN1, BIT(2), LDO3DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) REG(LDO4, LDOEN1, BIT(3), LDO4DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) REG(LDO5, LDOEN1, BIT(4), LDO5DAC, 0x7f, 600000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) REG(LDO6, LDOEN1, BIT(5), LDO6DAC, 0x7f, 600000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) REG(LDO7, LDOEN1, BIT(6), LDO7DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) REG(LDO8, LDOEN1, BIT(7), LDO8DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) REG(LDO9, LDOEN2, BIT(0), LDO9DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) REG(LDO10, LDOEN2, BIT(1), LDO10DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* LDO RTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) REG(LDORTC1, LDOEN2, BIT(4), LDORTCDAC, 0x7f, 1700000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) REG(LDORTC2, LDOEN2, BIT(5), LDORTC2DAC, 0x7f, 900000, 3500000, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static int rn5t618_regulator_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct rn5t618 *rn5t618 = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) const struct regulator_desc *regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) int num_regulators = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) switch (rn5t618->variant) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) case RN5T567:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) regulators = rn5t567_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) num_regulators = ARRAY_SIZE(rn5t567_regulators);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) case RN5T618:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) regulators = rn5t618_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) num_regulators = ARRAY_SIZE(rn5t618_regulators);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) case RC5T619:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) regulators = rc5t619_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) num_regulators = ARRAY_SIZE(rc5t619_regulators);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) config.dev = pdev->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) config.regmap = rn5t618->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) for (i = 0; i < num_regulators; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) rdev = devm_regulator_register(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) ®ulators[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) dev_err(&pdev->dev, "failed to register %s regulator\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) regulators[i].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static struct platform_driver rn5t618_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .probe = rn5t618_regulator_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .name = "rn5t618-regulator",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) module_platform_driver(rn5t618_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) MODULE_ALIAS("platform:rn5t618-regulator");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) MODULE_DESCRIPTION("RN5T618 regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) MODULE_LICENSE("GPL v2");