^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2021 Fuzhou Rockchip Electronics Co., Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/param.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* Voltage setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define RK860X_VSEL0_A 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define RK860X_VSEL1_A 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define RK860X_VSEL0_B 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define RK860X_VSEL1_B 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define RK860X_MAX_SET 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* Control register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define RK860X_CONTROL 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* IC Type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define RK860X_ID1 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* IC mask version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define RK860X_ID2 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* Monitor register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define RK860X_MONITOR 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* VSEL bit definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define VSEL_BUCK_EN BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define VSEL_MODE BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define VSEL_A_NSEL_MASK 0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define VSEL_B_NSEL_MASK 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* Chip ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define DIE_ID 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define DIE_REV 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* Control bit definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define CTL_OUTPUT_DISCHG BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define CTL_SLEW_MASK (0x7 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define CTL_SLEW_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define CTL_RESET BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define RK860X_NVOLTAGES_64 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define RK860X_NVOLTAGES_160 160
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* IC Type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) RK860X_CHIP_ID_00 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) RK860X_CHIP_ID_01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) RK860X_CHIP_ID_02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) RK860X_CHIP_ID_03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct rk860x_platform_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct regulator_init_data *regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned int slew_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* Sleep VSEL ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) unsigned int sleep_vsel_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int limit_volt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct gpio_desc *vsel_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct rk860x_device_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct regulator_desc desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct regulator_init_data *regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* IC Type and Rev */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int chip_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* Voltage setting register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned int vol_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned int sleep_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned int en_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) unsigned int sleep_en_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) unsigned int mode_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned int vol_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned int mode_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unsigned int slew_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) unsigned int slew_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) unsigned int slew_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* Voltage range and step(linear) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) unsigned int vsel_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) unsigned int vsel_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) unsigned int n_voltages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* Voltage slew rate limiting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) unsigned int slew_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct gpio_desc *vsel_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) unsigned int sleep_vsel_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static unsigned int rk860x_map_mode(unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return mode == REGULATOR_MODE_FAST ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static int rk860x_get_voltage(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct rk860x_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ret = regmap_read(di->regmap, RK860X_MAX_SET, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) ret = regulator_get_voltage_sel_regmap(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (ret > val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int rk860x_set_suspend_voltage(struct regulator_dev *rdev, int uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct rk860x_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) ret = regulator_map_voltage_linear(rdev, uV, uV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) ret = regmap_update_bits(di->regmap, di->sleep_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) di->vol_mask, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int rk860x_set_suspend_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct rk860x_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return regmap_update_bits(di->regmap, di->sleep_en_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) VSEL_BUCK_EN, VSEL_BUCK_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static int rk860x_set_suspend_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct rk860x_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return regmap_update_bits(di->regmap, di->sleep_en_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) VSEL_BUCK_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static int rk860x_resume(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (!rdev->constraints->state_mem.changeable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) ret = rk860x_set_suspend_enable(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return regulator_suspend_enable(rdev, PM_SUSPEND_MEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static int rk860x_set_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) struct rk860x_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (di->vsel_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) gpiod_set_raw_value(di->vsel_gpio, !di->sleep_vsel_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return regmap_update_bits(di->regmap, di->en_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) VSEL_BUCK_EN, VSEL_BUCK_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static int rk860x_set_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct rk860x_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (di->vsel_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) gpiod_set_raw_value(di->vsel_gpio, di->sleep_vsel_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return regmap_update_bits(di->regmap, di->en_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) VSEL_BUCK_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static int rk860x_is_enabled(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) struct rk860x_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (di->vsel_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (di->sleep_vsel_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) return !gpiod_get_raw_value(di->vsel_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) return gpiod_get_raw_value(di->vsel_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) ret = regmap_read(di->regmap, di->en_reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (val & VSEL_BUCK_EN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static int rk860x_set_mode(struct regulator_dev *rdev, unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) struct rk860x_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) case REGULATOR_MODE_FAST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) regmap_update_bits(di->regmap, di->mode_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) di->mode_mask, di->mode_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) case REGULATOR_MODE_NORMAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) regmap_update_bits(di->regmap, di->mode_reg, di->mode_mask, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static unsigned int rk860x_get_mode(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct rk860x_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) ret = regmap_read(di->regmap, di->mode_reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (val & di->mode_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return REGULATOR_MODE_FAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static const int slew_rates[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 64000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 32000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 16000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 4000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 2000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static int rk860x_set_ramp(struct regulator_dev *rdev, int ramp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) struct rk860x_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) int regval = -1, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) const int *slew_rate_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) int slew_rate_n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) slew_rate_t = slew_rates;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) slew_rate_n = ARRAY_SIZE(slew_rates);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) for (i = 0; i < slew_rate_n; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) if (ramp <= slew_rate_t[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) regval = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if (regval < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) dev_err(di->dev, "unsupported ramp value %d\n", ramp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return regmap_update_bits(di->regmap, di->slew_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) di->slew_mask, regval << di->slew_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static const struct regulator_ops rk860x_regulator_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .get_voltage_sel = rk860x_get_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .set_voltage_time_sel = regulator_set_voltage_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .map_voltage = regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .set_suspend_voltage = rk860x_set_suspend_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .enable = rk860x_set_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .disable = rk860x_set_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .is_enabled = rk860x_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) .set_mode = rk860x_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) .get_mode = rk860x_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .set_ramp_delay = rk860x_set_ramp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .set_suspend_enable = rk860x_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .set_suspend_disable = rk860x_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .resume = rk860x_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) /* For 00,01 options:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) * VOUT = 0.7125V + NSELx * 12.5mV, from 0.7125 to 1.5V.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * For 02,03 options:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) * VOUT = 0.5V + NSELx * 6.25mV, from 0.5 to 1.5V.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static int rk860x_device_setup(struct rk860x_device_info *di,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) struct rk860x_platform_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) u32 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) switch (di->chip_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) case RK860X_CHIP_ID_00:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) case RK860X_CHIP_ID_01:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) di->vsel_min = 712500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) di->vsel_step = 12500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) di->n_voltages = RK860X_NVOLTAGES_64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) di->vol_mask = VSEL_A_NSEL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) if (di->sleep_vsel_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) di->sleep_reg = RK860X_VSEL1_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) di->vol_reg = RK860X_VSEL0_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) di->mode_reg = RK860X_VSEL0_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) di->en_reg = RK860X_VSEL0_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) di->sleep_en_reg = RK860X_VSEL1_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) di->sleep_reg = RK860X_VSEL0_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) di->vol_reg = RK860X_VSEL1_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) di->mode_reg = RK860X_VSEL1_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) di->en_reg = RK860X_VSEL1_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) di->sleep_en_reg = RK860X_VSEL0_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) case RK860X_CHIP_ID_02:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) case RK860X_CHIP_ID_03:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) di->vsel_min = 500000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) di->vsel_step = 6250;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) di->n_voltages = RK860X_NVOLTAGES_160;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) di->vol_mask = VSEL_B_NSEL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) if (di->sleep_vsel_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) di->sleep_reg = RK860X_VSEL1_B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) di->vol_reg = RK860X_VSEL0_B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) di->mode_reg = RK860X_VSEL0_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) di->en_reg = RK860X_VSEL0_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) di->sleep_en_reg = RK860X_VSEL1_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) di->sleep_reg = RK860X_VSEL0_B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) di->vol_reg = RK860X_VSEL1_B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) di->mode_reg = RK860X_VSEL1_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) di->en_reg = RK860X_VSEL1_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) di->sleep_en_reg = RK860X_VSEL0_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) dev_err(di->dev, "Chip ID %d not supported!\n", di->chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) di->mode_mask = VSEL_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) di->slew_reg = RK860X_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) di->slew_mask = CTL_SLEW_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) di->slew_shift = CTL_SLEW_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (pdata->limit_volt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) if (pdata->limit_volt < di->vsel_min ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) pdata->limit_volt > 1500000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) pdata->limit_volt = 1500000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) val = (pdata->limit_volt - di->vsel_min) / di->vsel_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) ret = regmap_write(di->regmap, RK860X_MAX_SET, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) dev_err(di->dev, "Failed to set limit voltage!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) static int rk860x_regulator_register(struct rk860x_device_info *di,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) struct regulator_config *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) struct regulator_desc *rdesc = &di->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) rdesc->name = "rk860x-reg";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) rdesc->supply_name = "vin";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) rdesc->ops = &rk860x_regulator_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) rdesc->type = REGULATOR_VOLTAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) rdesc->n_voltages = di->n_voltages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) rdesc->enable_reg = di->en_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) rdesc->enable_mask = VSEL_BUCK_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) rdesc->min_uV = di->vsel_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) rdesc->uV_step = di->vsel_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) rdesc->vsel_reg = di->vol_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) rdesc->vsel_mask = di->vol_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) rdesc->owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) rdesc->enable_time = 400;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) di->rdev = devm_regulator_register(di->dev, &di->desc, config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) return PTR_ERR_OR_ZERO(di->rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static const struct regmap_config rk860x_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) static struct rk860x_platform_data *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) rk860x_parse_dt(struct device *dev, struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) const struct regulator_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) struct rk860x_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) int ret, flag, limit_volt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) u32 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) if (!pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) pdata->regulator = of_get_regulator_init_data(dev, np, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) pdata->regulator->constraints.initial_state = PM_SUSPEND_MEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) if (!(of_property_read_u32(np, "limit-microvolt", &limit_volt)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) pdata->limit_volt = limit_volt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) ret = of_property_read_u32(np, "rockchip,suspend-voltage-selector",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) &tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) pdata->sleep_vsel_id = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (pdata->sleep_vsel_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) flag = GPIOD_OUT_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) flag = GPIOD_OUT_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) pdata->vsel_gpio = devm_gpiod_get_index_optional(dev, "vsel", 0, flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) if (IS_ERR(pdata->vsel_gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) ret = PTR_ERR(pdata->vsel_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) dev_err(dev, "failed to get vesl gpio (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) pdata->vsel_gpio = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) return pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) static const struct of_device_id rk860x_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .compatible = "rockchip,rk8600",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .data = (void *)RK860X_CHIP_ID_00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) .compatible = "rockchip,rk8601",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) .data = (void *)RK860X_CHIP_ID_01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) .compatible = "rockchip,rk8602",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) .data = (void *)RK860X_CHIP_ID_02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) .compatible = "rockchip,rk8603",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) .data = (void *)RK860X_CHIP_ID_03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) MODULE_DEVICE_TABLE(of, rk860x_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) static int rk860x_regulator_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) struct device_node *np = client->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) struct rk860x_device_info *di;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) struct rk860x_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) di = devm_kzalloc(&client->dev, sizeof(*di), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) if (!di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) di->desc.of_map_mode = rk860x_map_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) pdata = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (!pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) pdata = rk860x_parse_dt(&client->dev, np, &di->desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) if (!pdata || !pdata->regulator) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) dev_err(&client->dev, "Platform data not found!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) di->vsel_gpio = pdata->vsel_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) di->sleep_vsel_id = pdata->sleep_vsel_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) di->regulator = pdata->regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) if (client->dev.of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) di->chip_id =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) (unsigned long)of_device_get_match_data(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) /* if no ramp constraint set, get the pdata ramp_delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) if (!di->regulator->constraints.ramp_delay) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) int slew_idx = (pdata->slew_rate & 0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) ? pdata->slew_rate : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) di->regulator->constraints.ramp_delay =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) slew_rates[slew_idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) di->chip_id = id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) di->regmap = devm_regmap_init_i2c(client, &rk860x_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) if (IS_ERR(di->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) dev_err(&client->dev, "Failed to allocate regmap!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) return PTR_ERR(di->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) di->dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) i2c_set_clientdata(client, di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) /* Get chip ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) ret = regmap_read(di->regmap, RK860X_ID1, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) dev_err(&client->dev, "Failed to get chip ID!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) switch (di->chip_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) case RK860X_CHIP_ID_00:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) case RK860X_CHIP_ID_01:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if ((val & DIE_ID) != 0x8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) dev_err(&client->dev, "Failed to match chip ID!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) case RK860X_CHIP_ID_02:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) case RK860X_CHIP_ID_03:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) if ((val & DIE_ID) != 0xa) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) dev_err(&client->dev, "Failed to match chip ID!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) /* Device init */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) ret = rk860x_device_setup(di, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) dev_err(&client->dev, "Failed to setup device!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) /* Register regulator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) config.dev = di->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) config.init_data = di->regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) config.regmap = di->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) config.driver_data = di;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) config.of_node = np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) ret = rk860x_regulator_register(di, &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) dev_err(&client->dev, "Failed to register regulator!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) static void rk860x_regulator_shutdown(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) struct rk860x_device_info *di;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) di = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) dev_info(di->dev, "rk860..... reset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) ret = regmap_update_bits(di->regmap, di->slew_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) CTL_RESET, CTL_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) dev_err(di->dev, "force rk860x_reset error! ret=%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) dev_info(di->dev, "force rk860x_reset ok!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) static const struct i2c_device_id rk860x_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) { .name = "rk8600", .driver_data = RK860X_CHIP_ID_00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) { .name = "rk8601", .driver_data = RK860X_CHIP_ID_01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) { .name = "rk8602", .driver_data = RK860X_CHIP_ID_02 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) { .name = "rk8603", .driver_data = RK860X_CHIP_ID_03 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) MODULE_DEVICE_TABLE(i2c, rk860x_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static struct i2c_driver rk860x_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) .name = "rk860-regulator",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) .of_match_table = of_match_ptr(rk860x_dt_ids),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) .probe = rk860x_regulator_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) .shutdown = rk860x_regulator_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) .id_table = rk860x_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) module_i2c_driver(rk860x_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) MODULE_AUTHOR("Elaine Zhang <zhangqing@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) MODULE_DESCRIPTION("rk860x regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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