^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Regulator driver for Rockchip RK805/RK808/RK818
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Chris Zhong <zyw@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Author: Zhang Qing <zhangqing@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2016 PHYTEC Messtechnik GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Author: Wadim Egorov <w.egorov@phytec.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/mfd/rk808.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* Field Definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define RK808_BUCK_VSEL_MASK 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define RK808_BUCK4_VSEL_MASK 0xf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define RK808_LDO_VSEL_MASK 0x1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define RK809_BUCK5_VSEL_MASK 0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define RK817_LDO_VSEL_MASK 0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define RK817_BOOST_VSEL_MASK 0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define RK817_BUCK_VSEL_MASK 0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define RK816_DCDC_SLP_EN_REG_OFFSET 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define RK816_SWITCH_SLP_EN_REG_OFFSET 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define RK816_LDO1_4_SLP_EN_REG_OFFSET 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define RK816_LDO5_6_SLP_EN_REG_OFFSET 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define RK818_BUCK_VSEL_MASK 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define RK818_BUCK4_VSEL_MASK 0x1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define RK818_LDO_VSEL_MASK 0x1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define RK818_LDO3_ON_VSEL_MASK 0xf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define RK818_BOOST_ON_VSEL_MASK 0xe0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* Ramp rate definitions for buck1 / buck2 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define RK808_RAMP_RATE_OFFSET 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define RK808_RAMP_RATE_MASK (3 << RK808_RAMP_RATE_OFFSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define RK808_RAMP_RATE_2MV_PER_US (0 << RK808_RAMP_RATE_OFFSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define RK808_RAMP_RATE_4MV_PER_US (1 << RK808_RAMP_RATE_OFFSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define RK808_RAMP_RATE_6MV_PER_US (2 << RK808_RAMP_RATE_OFFSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define RK808_RAMP_RATE_10MV_PER_US (3 << RK808_RAMP_RATE_OFFSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define RK808_DVS2_POL BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define RK808_DVS1_POL BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* Offset from XXX_ON_VSEL to XXX_SLP_VSEL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define RK808_SLP_REG_OFFSET 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* Offset from XXX_ON_VSEL to XXX_DVS_VSEL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define RK808_DVS_REG_OFFSET 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* Offset from XXX_EN_REG to SLEEP_SET_OFF_XXX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define RK808_SLP_SET_OFF_REG_OFFSET 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* max steps for increase voltage of Buck1/2, equal 25mv*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define MAX_STEPS_ONE_TIME 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define ENABLE_MASK(id) (BIT(id) | BIT(4 + (id)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define DISABLE_VAL(id) (BIT(4 + (id)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define RK817_BOOST_DESC(_id, _match, _supply, _min, _max, _step, _vreg,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) _vmask, _ereg, _emask, _enval, _disval, _etime, m_drop) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .name = (_match), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .supply_name = (_supply), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .of_match = of_match_ptr(_match), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .regulators_node = of_match_ptr("regulators"), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .id = (_id), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .n_voltages = (((_max) - (_min)) / (_step) + 1), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .min_uV = (_min) * 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .uV_step = (_step) * 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .vsel_reg = (_vreg), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .vsel_mask = (_vmask), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .enable_reg = (_ereg), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .enable_mask = (_emask), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .enable_val = (_enval), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .disable_val = (_disval), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .enable_time = (_etime), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .min_dropout_uV = (m_drop) * 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .ops = &rk817_boost_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) _vmask, _ereg, _emask, _enval, _disval, _etime, _ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .name = (_match), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .supply_name = (_supply), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .of_match = of_match_ptr(_match), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .regulators_node = of_match_ptr("regulators"), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .id = (_id), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .n_voltages = (((_max) - (_min)) / (_step) + 1), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .min_uV = (_min) * 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .uV_step = (_step) * 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .vsel_reg = (_vreg), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .vsel_mask = (_vmask), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .enable_reg = (_ereg), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .enable_mask = (_emask), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .enable_val = (_enval), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .disable_val = (_disval), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .enable_time = (_etime), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .ops = _ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define RK816_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) _vmask, _ereg, _emask, _disval, _etime) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) _vmask, _ereg, _emask, _emask, _disval, _etime, &rk808_reg_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define RK805_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) _vmask, _ereg, _emask, _disval, _etime) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) _vmask, _ereg, _emask, _emask, _disval, _etime, &rk808_reg_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define RK8XX_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) _vmask, _ereg, _emask, _etime) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) _vmask, _ereg, _emask, 0, 0, _etime, &rk808_reg_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define RK817_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) _vmask, _ereg, _emask, _enval, _disval, _etime) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) _vmask, _ereg, _emask, _enval, _disval, _etime, &rk817_reg_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) _enval, _disval, _ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .name = (_match), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .supply_name = (_supply), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .of_match = of_match_ptr(_match), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .regulators_node = of_match_ptr("regulators"), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .id = (_id), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .enable_reg = (_ereg), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .enable_mask = (_emask), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .enable_val = (_enval), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .disable_val = (_disval), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .ops = _ops \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define RK817_DESC_SWITCH(_id, _match, _supply, _ereg, _emask, _enval, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) _disval) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) _enval, _disval, &rk817_switch_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define RK8XX_DESC_SWITCH(_id, _match, _supply, _ereg, _emask) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 0, 0, &rk808_switch_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct rk808_regulator_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) struct gpio_desc *dvs_gpio[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static const int rk808_buck_config_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) RK808_BUCK1_CONFIG_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) RK808_BUCK2_CONFIG_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) RK808_BUCK3_CONFIG_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) RK808_BUCK4_CONFIG_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static const struct linear_range rk805_buck_1_2_voltage_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) REGULATOR_LINEAR_RANGE(712500, 0, 59, 12500), /* 0.7125v - 1.45v */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) REGULATOR_LINEAR_RANGE(1800000, 60, 62, 200000),/* 1.8v - 2.2v */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) REGULATOR_LINEAR_RANGE(2300000, 63, 63, 0), /* 2.3v - 2.3v */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static const struct linear_range rk805_buck4_voltage_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) REGULATOR_LINEAR_RANGE(800000, 0, 26, 100000), /* 0.8v - 3.4v */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) REGULATOR_LINEAR_RANGE(3500000, 27, 31, 0), /* 3.5v */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static const struct linear_range rk808_ldo3_voltage_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) REGULATOR_LINEAR_RANGE(800000, 0, 13, 100000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) REGULATOR_LINEAR_RANGE(2500000, 15, 15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static const struct linear_range rk816_buck_voltage_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) REGULATOR_LINEAR_RANGE(712500, 0, 59, 12500), /* 0.7125v - 1.45v */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) REGULATOR_LINEAR_RANGE(1800000, 60, 62, 200000),/* 1.8v - 2.2v */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) REGULATOR_LINEAR_RANGE(2300000, 63, 63, 0), /* 2.3v - 2.3v */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static const struct linear_range rk816_buck4_voltage_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) REGULATOR_LINEAR_RANGE(800000, 0, 26, 100000), /* 0.8v - 3.4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) REGULATOR_LINEAR_RANGE(3500000, 27, 31, 0), /* 3.5v */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define RK809_BUCK5_SEL_CNT (8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static const struct linear_range rk809_buck5_voltage_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) REGULATOR_LINEAR_RANGE(1500000, 0, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) REGULATOR_LINEAR_RANGE(1800000, 1, 3, 200000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) REGULATOR_LINEAR_RANGE(2800000, 4, 5, 200000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) REGULATOR_LINEAR_RANGE(3300000, 6, 7, 300000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define RK817_BUCK1_MIN0 500000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #define RK817_BUCK1_MAX0 1500000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define RK817_BUCK1_MIN1 1600000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #define RK817_BUCK1_MAX1 2400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define RK817_BUCK3_MAX1 3400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define RK817_BUCK1_STP0 12500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define RK817_BUCK1_STP1 100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #define RK817_BUCK1_SEL0 ((RK817_BUCK1_MAX0 - RK817_BUCK1_MIN0) /\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) RK817_BUCK1_STP0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) #define RK817_BUCK1_SEL1 ((RK817_BUCK1_MAX1 - RK817_BUCK1_MIN1) /\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) RK817_BUCK1_STP1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #define RK817_BUCK3_SEL1 ((RK817_BUCK3_MAX1 - RK817_BUCK1_MIN1) /\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) RK817_BUCK1_STP1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #define RK817_BUCK1_SEL_CNT (RK817_BUCK1_SEL0 + RK817_BUCK1_SEL1 + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #define RK817_BUCK3_SEL_CNT (RK817_BUCK1_SEL0 + RK817_BUCK3_SEL1 + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static const struct linear_range rk817_buck1_voltage_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) RK817_BUCK1_SEL0, RK817_BUCK1_STP0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN1, RK817_BUCK1_SEL0 + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) RK817_BUCK1_SEL_CNT, RK817_BUCK1_STP1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static const struct linear_range rk817_buck3_voltage_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) RK817_BUCK1_SEL0, RK817_BUCK1_STP0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN1, RK817_BUCK1_SEL0 + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) RK817_BUCK3_SEL_CNT, RK817_BUCK1_STP1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static int rk808_buck1_2_get_voltage_sel_regmap(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) struct gpio_desc *gpio = pdata->dvs_gpio[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (!gpio || gpiod_get_value(gpio) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return regulator_get_voltage_sel_regmap(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) ret = regmap_read(rdev->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) rdev->desc->vsel_reg + RK808_DVS_REG_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) val &= rdev->desc->vsel_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) val >>= ffs(rdev->desc->vsel_mask) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static int rk808_buck1_2_i2c_set_voltage_sel(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) unsigned sel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) int ret, delta_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) unsigned int old_sel, tmp, val, mask = rdev->desc->vsel_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) tmp = val & ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) old_sel = val & mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) old_sel >>= ffs(mask) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) delta_sel = sel - old_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) * If directly modify the register to change the voltage, we will face
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) * the risk of overshoot. Put it into a multi-step, can effectively
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) * avoid this problem, a step is 100mv here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) while (delta_sel > MAX_STEPS_ONE_TIME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) old_sel += MAX_STEPS_ONE_TIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) val = old_sel << (ffs(mask) - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) val |= tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) * i2c is 400kHz (2.5us per bit) and we must transmit _at least_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) * 3 bytes (24 bits) plus start and stop so 26 bits. So we've
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * got more than 65 us between each voltage change and thus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * won't ramp faster than ~1500 uV / us.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) ret = regmap_write(rdev->regmap, rdev->desc->vsel_reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) delta_sel = sel - old_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) sel <<= ffs(mask) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) val = tmp | sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) ret = regmap_write(rdev->regmap, rdev->desc->vsel_reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) * When we change the voltage register directly, the ramp rate is about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) * 100000uv/us, wait 1us to make sure the target voltage to be stable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) * so we needn't wait extra time after that.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #ifdef CONFIG_CLK_RK312X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) extern void rkclk_cpuclk_div_setting(int div);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static inline void rkclk_cpuclk_div_setting(int div) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static int rk816_regulator_set_voltage_sel_regmap(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) unsigned int sel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) int ret, real_sel, delay = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) int rk816_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) regmap_read(rdev->regmap, RK816_CHIP_VER_REG, &rk816_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) rk816_type &= RK816_CHIP_VERSION_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) sel <<= ffs(rdev->desc->vsel_mask) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) if ((rk816_type != RK816_TYPE_ES2) && (id == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (sel > 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) rkclk_cpuclk_div_setting(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) rkclk_cpuclk_div_setting(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) ret = regmap_update_bits(rdev->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) rdev->desc->vsel_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) rdev->desc->vsel_mask, sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (rk816_type == RK816_TYPE_ES2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) ret = regmap_update_bits(rdev->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) RK816_DCDC_EN_REG2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) RK816_BUCK_DVS_CONFIRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) RK816_BUCK_DVS_CONFIRM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) regmap_read(rdev->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) rdev->desc->vsel_reg, &real_sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) real_sel &= rdev->desc->vsel_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) delay--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) } while ((sel != real_sel) && (delay > 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) if ((rk816_type != RK816_TYPE_ES2) && (id == 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) rkclk_cpuclk_div_setting(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) static int rk808_buck1_2_set_voltage_sel(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) unsigned sel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) struct gpio_desc *gpio = pdata->dvs_gpio[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) unsigned int reg = rdev->desc->vsel_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) unsigned old_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) int ret, gpio_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (!gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) return rk808_buck1_2_i2c_set_voltage_sel(rdev, sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) gpio_level = gpiod_get_value(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) if (gpio_level == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) reg += RK808_DVS_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &old_sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) ret = regmap_read(rdev->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) reg + RK808_DVS_REG_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) &old_sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) sel <<= ffs(rdev->desc->vsel_mask) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) sel |= old_sel & ~rdev->desc->vsel_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) ret = regmap_write(rdev->regmap, reg, sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) gpiod_set_value(gpio, !gpio_level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) static int rk808_buck1_2_set_voltage_time_sel(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) unsigned int old_selector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) unsigned int new_selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) struct gpio_desc *gpio = pdata->dvs_gpio[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) /* if there is no dvs1/2 pin, we don't need wait extra time here. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) if (!gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) return regulator_set_voltage_time_sel(rdev, old_selector, new_selector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static int rk805_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) unsigned int ramp_value = RK808_RAMP_RATE_10MV_PER_US;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) unsigned int reg = rk808_buck_config_regs[rdev_get_id(rdev)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) switch (ramp_delay) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) case 0 ... 3000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) ramp_value = RK805_RAMP_RATE_3MV_PER_US;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) case 3001 ... 6000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) ramp_value = RK805_RAMP_RATE_6MV_PER_US;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) case 6001 ... 12500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) ramp_value = RK805_RAMP_RATE_12_5MV_PER_US;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) case 12501 ... 25000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) ramp_value = RK805_RAMP_RATE_25MV_PER_US;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) pr_warn("%s ramp_delay: %d not supported\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) rdev->desc->name, ramp_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) return regmap_update_bits(rdev->regmap, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) RK805_RAMP_RATE_MASK, ramp_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) static int rk808_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) unsigned int ramp_value = RK808_RAMP_RATE_10MV_PER_US;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) unsigned int reg = rk808_buck_config_regs[rdev_get_id(rdev)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) switch (ramp_delay) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) case 1 ... 2000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) ramp_value = RK808_RAMP_RATE_2MV_PER_US;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) case 2001 ... 4000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) ramp_value = RK808_RAMP_RATE_4MV_PER_US;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) case 4001 ... 6000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) ramp_value = RK808_RAMP_RATE_6MV_PER_US;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) case 6001 ... 10000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) pr_warn("%s ramp_delay: %d not supported, setting 10000\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) rdev->desc->name, ramp_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) return regmap_update_bits(rdev->regmap, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) RK808_RAMP_RATE_MASK, ramp_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) static int rk8xx_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) struct rk808 *rk808 = dev_get_drvdata(rdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) if (rk808->variant == RK805_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) return rk805_set_ramp_delay(rdev, ramp_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) return rk808_set_ramp_delay(rdev, ramp_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) * RK817 RK809
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) static int rk817_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) unsigned int ramp_value = RK817_RAMP_RATE_25MV_PER_US;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) unsigned int reg = RK817_BUCK_CONFIG_REG(rdev_get_id(rdev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) switch (ramp_delay) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) case 0 ... 3000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) ramp_value = RK817_RAMP_RATE_3MV_PER_US;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) case 3001 ... 6300:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) ramp_value = RK817_RAMP_RATE_6_3MV_PER_US;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) case 6301 ... 12500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) ramp_value = RK817_RAMP_RATE_12_5MV_PER_US;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) case 12501 ... 25000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) dev_warn(&rdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) "%s ramp_delay: %d not supported, setting 25000\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) rdev->desc->name, ramp_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) return regmap_update_bits(rdev->regmap, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) RK817_RAMP_RATE_MASK, ramp_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) static int rk808_set_suspend_voltage(struct regulator_dev *rdev, int uv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) int sel = regulator_map_voltage_linear(rdev, uv, uv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) if (sel < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) return regmap_update_bits(rdev->regmap, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) rdev->desc->vsel_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) static int rk808_set_suspend_voltage_range(struct regulator_dev *rdev, int uv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) int sel = regulator_map_voltage_linear_range(rdev, uv, uv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (sel < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) return regmap_update_bits(rdev->regmap, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) rdev->desc->vsel_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) static int rk805_set_suspend_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) unsigned int reg, offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) if (rdev->desc->id >= RK805_ID_LDO1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) offset = RK805_SLP_LDO_EN_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) offset = RK805_SLP_DCDC_EN_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) reg = rdev->desc->enable_reg + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) return regmap_update_bits(rdev->regmap, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) rdev->desc->enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) rdev->desc->enable_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) static int rk805_set_suspend_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) unsigned int reg, offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) if (rdev->desc->id >= RK805_ID_LDO1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) offset = RK805_SLP_LDO_EN_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) offset = RK805_SLP_DCDC_EN_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) reg = rdev->desc->enable_reg + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) return regmap_update_bits(rdev->regmap, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) rdev->desc->enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) static int rk816_set_suspend_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) unsigned int reg, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) if (rdev->desc->id <= RK816_ID_DCDC4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) reg = rdev->desc->enable_reg +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) RK816_DCDC_SLP_EN_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) val = 1 << rdev->desc->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) } else if ((rdev->desc->id > RK816_ID_DCDC4) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) (rdev->desc->id <= RK816_ID_LDO4)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) reg = rdev->desc->enable_reg -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) RK816_LDO1_4_SLP_EN_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) val = 1 << (rdev->desc->id - RK816_ID_LDO1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) reg = rdev->desc->enable_reg -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) RK816_LDO5_6_SLP_EN_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) val = 1 << (rdev->desc->id - RK816_ID_LDO1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) return regmap_update_bits(rdev->regmap, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) static int rk816_set_suspend_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) unsigned int reg, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) if (rdev->desc->id <= RK816_ID_DCDC4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) reg = rdev->desc->enable_reg +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) RK816_DCDC_SLP_EN_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) val = 1 << rdev->desc->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) } else if ((rdev->desc->id > RK816_ID_DCDC4) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) (rdev->desc->id <= RK816_ID_LDO4)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) reg = rdev->desc->enable_reg -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) RK816_LDO1_4_SLP_EN_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) val = 1 << (rdev->desc->id - RK816_ID_LDO1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) reg = rdev->desc->enable_reg -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) RK816_LDO5_6_SLP_EN_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) val = 1 << (rdev->desc->id - RK816_ID_LDO1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) return regmap_update_bits(rdev->regmap, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) static int rk808_set_suspend_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) struct rk808 *rk808 = dev_get_drvdata(rdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) if (rk808->variant == RK816_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) return rk816_set_suspend_enable(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) else if (rk808->variant == RK805_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) return rk805_set_suspend_enable(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) return regmap_update_bits(rdev->regmap, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) rdev->desc->enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) static int rk808_set_suspend_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) struct rk808 *rk808 = dev_get_drvdata(rdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) if (rk808->variant == RK816_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) return rk816_set_suspend_disable(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) else if (rk808->variant == RK805_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) return rk805_set_suspend_disable(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) return regmap_update_bits(rdev->regmap, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) rdev->desc->enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) rdev->desc->enable_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) static int rk817_set_suspend_enable_ctrl(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) unsigned int en)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) unsigned int id_slp, msk, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) if (id >= RK817_ID_DCDC1 && id <= RK817_ID_DCDC4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) id_slp = id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) else if (id >= RK817_ID_LDO1 && id <= RK817_ID_LDO8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) id_slp = 8 + (id - RK817_ID_LDO1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) else if (id >= RK817_ID_LDO9 && id <= RK809_ID_SW2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) id_slp = 4 + (id - RK817_ID_LDO9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) reg = RK817_POWER_SLP_EN_REG(id_slp / 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) msk = BIT(id_slp % 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) if (en)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) val = msk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) return regmap_update_bits(rdev->regmap, reg, msk, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) static int rk817_set_suspend_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) return rk817_set_suspend_enable_ctrl(rdev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) static int rk817_set_suspend_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) return rk817_set_suspend_enable_ctrl(rdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) static int rk8xx_set_suspend_mode(struct regulator_dev *rdev, unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) case REGULATOR_MODE_FAST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) return regmap_update_bits(rdev->regmap, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) PWM_MODE_MSK, FPWM_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) case REGULATOR_MODE_NORMAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) return regmap_update_bits(rdev->regmap, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) PWM_MODE_MSK, AUTO_PWM_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) dev_err(&rdev->dev, "do not support this mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) static int rk8xx_set_mode(struct regulator_dev *rdev, unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) case REGULATOR_MODE_FAST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) return regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) PWM_MODE_MSK, FPWM_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) case REGULATOR_MODE_NORMAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) return regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) PWM_MODE_MSK, AUTO_PWM_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) dev_err(&rdev->dev, "do not support this mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) static unsigned int rk8xx_get_mode(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) err = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) if (val & FPWM_MODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) return REGULATOR_MODE_FAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) return REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) static int rk8xx_enabled_wmsk_regmap(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) return regmap_update_bits(rdev->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) rdev->desc->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) rdev->desc->enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) rdev->desc->enable_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) static int rk8xx_disabled_wmsk_regmap(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) return regmap_update_bits(rdev->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) rdev->desc->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) rdev->desc->enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) rdev->desc->disable_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) static int rk8xx_is_enabled_wmsk_regmap(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) val &= rdev->desc->enable_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) return val != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) static unsigned int rk8xx_regulator_of_map_mode(unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) return REGULATOR_MODE_FAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) return REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) return REGULATOR_MODE_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) static const struct regulator_ops rk808_buck1_2_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) .map_voltage = regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) .get_voltage_sel = rk808_buck1_2_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) .set_voltage_sel = rk808_buck1_2_set_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) .set_voltage_time_sel = rk808_buck1_2_set_voltage_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) .set_mode = rk8xx_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) .get_mode = rk8xx_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) .set_suspend_mode = rk8xx_set_suspend_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) .set_ramp_delay = rk8xx_set_ramp_delay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) .set_suspend_voltage = rk808_set_suspend_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) .set_suspend_enable = rk808_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) .set_suspend_disable = rk808_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) static const struct regulator_ops rk816_buck1_2_ops_ranges = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) .list_voltage = regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) .map_voltage = regulator_map_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) .set_voltage_sel = rk816_regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) .set_voltage_time_sel = regulator_set_voltage_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) .set_mode = rk8xx_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) .get_mode = rk8xx_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) .set_suspend_mode = rk8xx_set_suspend_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) .set_ramp_delay = rk8xx_set_ramp_delay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) .set_suspend_voltage = rk808_set_suspend_voltage_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) .set_suspend_enable = rk808_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) .set_suspend_disable = rk808_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) static const struct regulator_ops rk808_reg_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) .map_voltage = regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) .set_suspend_voltage = rk808_set_suspend_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) .set_suspend_enable = rk808_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) .set_suspend_disable = rk808_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) static const struct regulator_ops rk808_reg_ops_ranges = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) .list_voltage = regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) .map_voltage = regulator_map_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) .set_mode = rk8xx_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) .get_mode = rk8xx_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) .set_suspend_mode = rk8xx_set_suspend_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) .set_ramp_delay = rk8xx_set_ramp_delay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) .set_suspend_voltage = rk808_set_suspend_voltage_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) .set_suspend_enable = rk808_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) .set_suspend_disable = rk808_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) static const struct regulator_ops rk808_switch_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) .set_mode = rk8xx_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) .get_mode = rk8xx_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) .set_suspend_enable = rk808_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) .set_suspend_disable = rk808_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) static const struct regulator_ops rk809_buck5_ops_range = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) .list_voltage = regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) .map_voltage = regulator_map_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) .set_voltage_time_sel = regulator_set_voltage_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) .enable = rk8xx_enabled_wmsk_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) .disable = rk8xx_disabled_wmsk_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) .is_enabled = rk8xx_is_enabled_wmsk_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) .set_suspend_voltage = rk808_set_suspend_voltage_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) .set_suspend_enable = rk817_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) .set_suspend_disable = rk817_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) static const struct regulator_ops rk817_reg_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) .map_voltage = regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) .enable = rk8xx_enabled_wmsk_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) .disable = rk8xx_disabled_wmsk_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) .is_enabled = rk8xx_is_enabled_wmsk_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) .set_suspend_voltage = rk808_set_suspend_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) .set_suspend_enable = rk817_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) .set_suspend_disable = rk817_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) static const struct regulator_ops rk817_boost_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) .map_voltage = regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) .enable = rk8xx_enabled_wmsk_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) .disable = rk8xx_disabled_wmsk_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) .is_enabled = rk8xx_is_enabled_wmsk_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) .set_suspend_enable = rk817_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) .set_suspend_disable = rk817_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) static const struct regulator_ops rk817_buck_ops_range = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) .list_voltage = regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) .map_voltage = regulator_map_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) .set_voltage_time_sel = regulator_set_voltage_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) .enable = rk8xx_enabled_wmsk_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) .disable = rk8xx_disabled_wmsk_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) .is_enabled = rk8xx_is_enabled_wmsk_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) .set_mode = rk8xx_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) .get_mode = rk8xx_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) .set_suspend_mode = rk8xx_set_suspend_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) .set_ramp_delay = rk817_set_ramp_delay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) .set_suspend_voltage = rk808_set_suspend_voltage_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) .set_suspend_enable = rk817_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) .set_suspend_disable = rk817_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) static const struct regulator_ops rk817_switch_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) .enable = rk8xx_enabled_wmsk_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) .disable = rk8xx_disabled_wmsk_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) .is_enabled = rk8xx_is_enabled_wmsk_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) .set_suspend_enable = rk817_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) .set_suspend_disable = rk817_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) static const struct regulator_desc rk805_reg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) .name = "DCDC_REG1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) .supply_name = "vcc1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) .of_match = of_match_ptr("DCDC_REG1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) .id = RK805_ID_DCDC1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) .ops = &rk808_reg_ops_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) .n_voltages = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) .linear_ranges = rk805_buck_1_2_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) .n_linear_ranges = ARRAY_SIZE(rk805_buck_1_2_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) .vsel_reg = RK805_BUCK1_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) .vsel_mask = RK818_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) .enable_reg = RK805_DCDC_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) .enable_mask = ENABLE_MASK(RK805_ID_DCDC1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) .enable_val = ENABLE_MASK(RK805_ID_DCDC1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) .disable_val = DISABLE_VAL(RK805_ID_DCDC1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) .name = "DCDC_REG2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) .supply_name = "vcc2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) .of_match = of_match_ptr("DCDC_REG2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) .id = RK805_ID_DCDC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) .ops = &rk808_reg_ops_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) .n_voltages = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) .linear_ranges = rk805_buck_1_2_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) .n_linear_ranges = ARRAY_SIZE(rk805_buck_1_2_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) .vsel_reg = RK805_BUCK2_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) .vsel_mask = RK818_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) .enable_reg = RK805_DCDC_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) .enable_mask = ENABLE_MASK(RK805_ID_DCDC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) .enable_val = ENABLE_MASK(RK805_ID_DCDC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) .disable_val = DISABLE_VAL(RK805_ID_DCDC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) .name = "DCDC_REG3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) .supply_name = "vcc3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) .of_match = of_match_ptr("DCDC_REG3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) .id = RK805_ID_DCDC3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) .ops = &rk808_switch_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) .n_voltages = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) .enable_reg = RK805_DCDC_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) .enable_mask = ENABLE_MASK(RK805_ID_DCDC3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) .enable_val = ENABLE_MASK(RK805_ID_DCDC3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) .disable_val = DISABLE_VAL(RK805_ID_DCDC3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) .name = "DCDC_REG4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) .supply_name = "vcc4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) .of_match = of_match_ptr("DCDC_REG4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) .id = RK805_ID_DCDC4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) .ops = &rk808_reg_ops_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) .n_voltages = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) .linear_ranges = rk805_buck4_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) .n_linear_ranges = ARRAY_SIZE(rk805_buck4_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) .vsel_reg = RK805_BUCK4_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) .vsel_mask = RK818_BUCK4_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) .enable_reg = RK805_DCDC_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) .enable_mask = ENABLE_MASK(RK805_ID_DCDC4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) .enable_val = ENABLE_MASK(RK805_ID_DCDC4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) .disable_val = DISABLE_VAL(RK805_ID_DCDC4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) RK805_DESC(RK805_ID_LDO1, "LDO_REG1", "vcc5", 800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) RK805_LDO1_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK805_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) ENABLE_MASK(0), DISABLE_VAL(0), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) RK805_DESC(RK805_ID_LDO2, "LDO_REG2", "vcc5", 800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) RK805_LDO2_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK805_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) ENABLE_MASK(1), DISABLE_VAL(1), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) RK805_DESC(RK805_ID_LDO3, "LDO_REG3", "vcc6", 800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) RK805_LDO3_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK805_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) ENABLE_MASK(2), DISABLE_VAL(2), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) static const struct regulator_desc rk808_reg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) .name = "DCDC_REG1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) .supply_name = "vcc1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) .of_match = of_match_ptr("DCDC_REG1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) .id = RK808_ID_DCDC1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) .ops = &rk808_buck1_2_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) .min_uV = 712500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) .uV_step = 12500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) .n_voltages = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) .vsel_reg = RK808_BUCK1_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) .vsel_mask = RK808_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) .enable_reg = RK808_DCDC_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) .enable_mask = BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) .name = "DCDC_REG2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) .supply_name = "vcc2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) .of_match = of_match_ptr("DCDC_REG2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) .id = RK808_ID_DCDC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) .ops = &rk808_buck1_2_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) .min_uV = 712500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) .uV_step = 12500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) .n_voltages = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) .vsel_reg = RK808_BUCK2_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) .vsel_mask = RK808_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) .enable_reg = RK808_DCDC_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) .enable_mask = BIT(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) .name = "DCDC_REG3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) .supply_name = "vcc3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) .of_match = of_match_ptr("DCDC_REG3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) .id = RK808_ID_DCDC3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) .ops = &rk808_switch_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) .n_voltages = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) .enable_reg = RK808_DCDC_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) .enable_mask = BIT(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) RK8XX_DESC(RK808_ID_DCDC4, "DCDC_REG4", "vcc4", 1800, 3300, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) RK808_BUCK4_ON_VSEL_REG, RK808_BUCK4_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) RK808_DCDC_EN_REG, BIT(3), 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) RK8XX_DESC(RK808_ID_LDO1, "LDO_REG1", "vcc6", 1800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) RK808_LDO1_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) BIT(0), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) RK8XX_DESC(RK808_ID_LDO2, "LDO_REG2", "vcc6", 1800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) RK808_LDO2_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) BIT(1), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) .name = "LDO_REG3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) .supply_name = "vcc7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) .of_match = of_match_ptr("LDO_REG3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) .id = RK808_ID_LDO3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) .ops = &rk808_reg_ops_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) .n_voltages = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) .linear_ranges = rk808_ldo3_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) .n_linear_ranges = ARRAY_SIZE(rk808_ldo3_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) .vsel_reg = RK808_LDO3_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) .vsel_mask = RK808_BUCK4_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) .enable_reg = RK808_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) .enable_mask = BIT(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) .enable_time = 400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) RK8XX_DESC(RK808_ID_LDO4, "LDO_REG4", "vcc9", 1800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) RK808_LDO4_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) BIT(3), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) RK8XX_DESC(RK808_ID_LDO5, "LDO_REG5", "vcc9", 1800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) RK808_LDO5_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) BIT(4), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) RK8XX_DESC(RK808_ID_LDO6, "LDO_REG6", "vcc10", 800, 2500, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) RK808_LDO6_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) BIT(5), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) RK8XX_DESC(RK808_ID_LDO7, "LDO_REG7", "vcc7", 800, 2500, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) RK808_LDO7_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) BIT(6), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) RK8XX_DESC(RK808_ID_LDO8, "LDO_REG8", "vcc11", 1800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) RK808_LDO8_ON_VSEL_REG, RK808_LDO_VSEL_MASK, RK808_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) BIT(7), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) RK8XX_DESC_SWITCH(RK808_ID_SWITCH1, "SWITCH_REG1", "vcc8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) RK808_DCDC_EN_REG, BIT(5)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) RK8XX_DESC_SWITCH(RK808_ID_SWITCH2, "SWITCH_REG2", "vcc12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) RK808_DCDC_EN_REG, BIT(6)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) static const struct regulator_desc rk816_reg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) .name = "DCDC_REG1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) .supply_name = "vcc1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) .of_match = of_match_ptr("DCDC_REG1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) .id = RK816_ID_DCDC1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) .ops = &rk816_buck1_2_ops_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) .n_voltages = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) .linear_ranges = rk816_buck_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) .n_linear_ranges = ARRAY_SIZE(rk816_buck_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) .vsel_reg = RK816_BUCK1_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) .vsel_mask = RK818_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) .enable_reg = RK816_DCDC_EN_REG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) .enable_mask = BIT(4) | BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) .enable_val = BIT(4) | BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) .disable_val = BIT(4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) .name = "DCDC_REG2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) .supply_name = "vcc2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) .of_match = of_match_ptr("DCDC_REG2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) .id = RK816_ID_DCDC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) .ops = &rk816_buck1_2_ops_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) .n_voltages = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) .linear_ranges = rk816_buck_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) .n_linear_ranges = ARRAY_SIZE(rk816_buck_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) .vsel_reg = RK816_BUCK2_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) .vsel_mask = RK818_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) .enable_reg = RK816_DCDC_EN_REG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) .enable_mask = BIT(5) | BIT(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) .enable_val = BIT(5) | BIT(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) .disable_val = BIT(5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) .name = "DCDC_REG3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) .supply_name = "vcc3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) .of_match = of_match_ptr("DCDC_REG3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) .id = RK818_ID_DCDC3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) .ops = &rk808_switch_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) .n_voltages = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) .enable_reg = RK816_DCDC_EN_REG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) .enable_mask = BIT(6) | BIT(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) .enable_val = BIT(6) | BIT(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) .disable_val = BIT(6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) .name = "DCDC_REG4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) .supply_name = "vcc4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) .of_match = of_match_ptr("DCDC_REG4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) .id = RK816_ID_DCDC4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) .ops = &rk808_reg_ops_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) .n_voltages = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) .linear_ranges = rk816_buck4_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) .n_linear_ranges = ARRAY_SIZE(rk816_buck4_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) .vsel_reg = RK816_BUCK4_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) .vsel_mask = RK818_BUCK4_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) .enable_reg = RK816_DCDC_EN_REG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) .enable_mask = BIT(7) | BIT(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) .enable_val = BIT(7) | BIT(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) .disable_val = BIT(7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) RK816_DESC(RK816_ID_LDO1, "LDO_REG1", "vcc5", 800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) RK816_LDO1_ON_VSEL_REG, RK818_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) RK816_LDO_EN_REG1, ENABLE_MASK(0), DISABLE_VAL(0), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) RK816_DESC(RK816_ID_LDO2, "LDO_REG2", "vcc5", 800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) RK816_LDO2_ON_VSEL_REG, RK818_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) RK816_LDO_EN_REG1, ENABLE_MASK(1), DISABLE_VAL(1), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) RK816_DESC(RK816_ID_LDO3, "LDO_REG3", "vcc5", 800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) RK816_LDO3_ON_VSEL_REG, RK818_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) RK816_LDO_EN_REG1, ENABLE_MASK(2), DISABLE_VAL(2), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) RK816_DESC(RK816_ID_LDO4, "LDO_REG4", "vcc6", 800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) RK816_LDO4_ON_VSEL_REG, RK818_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) RK816_LDO_EN_REG1, ENABLE_MASK(3), DISABLE_VAL(3), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) RK816_DESC(RK816_ID_LDO5, "LDO_REG5", "vcc6", 800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) RK816_LDO5_ON_VSEL_REG, RK818_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) RK816_LDO_EN_REG2, ENABLE_MASK(0), DISABLE_VAL(0), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) RK816_DESC(RK816_ID_LDO6, "LDO_REG6", "vcc6", 800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) RK816_LDO6_ON_VSEL_REG, RK818_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) RK816_LDO_EN_REG2, ENABLE_MASK(1), DISABLE_VAL(1), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) static const struct regulator_desc rk809_reg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) .name = "DCDC_REG1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) .supply_name = "vcc1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) .of_match = of_match_ptr("DCDC_REG1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) .id = RK817_ID_DCDC1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) .ops = &rk817_buck_ops_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) .n_voltages = RK817_BUCK1_SEL_CNT + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) .linear_ranges = rk817_buck1_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) .vsel_reg = RK817_BUCK1_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) .vsel_mask = RK817_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) .enable_reg = RK817_POWER_EN_REG(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) .enable_mask = ENABLE_MASK(RK817_ID_DCDC1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) .enable_val = BIT(RK817_ID_DCDC1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) .disable_val = DISABLE_VAL(RK817_ID_DCDC1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) .name = "DCDC_REG2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) .supply_name = "vcc2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) .of_match = of_match_ptr("DCDC_REG2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) .id = RK817_ID_DCDC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) .ops = &rk817_buck_ops_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) .n_voltages = RK817_BUCK1_SEL_CNT + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) .linear_ranges = rk817_buck1_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) .vsel_reg = RK817_BUCK2_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) .vsel_mask = RK817_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) .enable_reg = RK817_POWER_EN_REG(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) .enable_mask = ENABLE_MASK(RK817_ID_DCDC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) .enable_val = BIT(RK817_ID_DCDC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) .disable_val = DISABLE_VAL(RK817_ID_DCDC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) .name = "DCDC_REG3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) .supply_name = "vcc3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) .of_match = of_match_ptr("DCDC_REG3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) .id = RK817_ID_DCDC3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) .ops = &rk817_buck_ops_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) .n_voltages = RK817_BUCK1_SEL_CNT + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) .linear_ranges = rk817_buck1_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) .vsel_reg = RK817_BUCK3_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) .vsel_mask = RK817_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) .enable_reg = RK817_POWER_EN_REG(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) .enable_mask = ENABLE_MASK(RK817_ID_DCDC3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) .enable_val = BIT(RK817_ID_DCDC3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) .disable_val = DISABLE_VAL(RK817_ID_DCDC3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) .name = "DCDC_REG4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) .supply_name = "vcc4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) .of_match = of_match_ptr("DCDC_REG4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) .id = RK817_ID_DCDC4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) .ops = &rk817_buck_ops_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) .n_voltages = RK817_BUCK3_SEL_CNT + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) .linear_ranges = rk817_buck3_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) .n_linear_ranges = ARRAY_SIZE(rk817_buck3_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) .vsel_reg = RK817_BUCK4_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) .vsel_mask = RK817_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) .enable_reg = RK817_POWER_EN_REG(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) .enable_mask = ENABLE_MASK(RK817_ID_DCDC4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) .enable_val = BIT(RK817_ID_DCDC4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) .disable_val = DISABLE_VAL(RK817_ID_DCDC4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) .name = "DCDC_REG5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) .supply_name = "vcc9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) .of_match = of_match_ptr("DCDC_REG5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) .id = RK809_ID_DCDC5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) .ops = &rk809_buck5_ops_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) .n_voltages = RK809_BUCK5_SEL_CNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) .linear_ranges = rk809_buck5_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) .n_linear_ranges = ARRAY_SIZE(rk809_buck5_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) .vsel_reg = RK809_BUCK5_CONFIG(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) .vsel_mask = RK809_BUCK5_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) .enable_reg = RK817_POWER_EN_REG(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) .enable_mask = ENABLE_MASK(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) .enable_val = BIT(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) .disable_val = DISABLE_VAL(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) RK817_DESC(RK817_ID_LDO1, "LDO_REG1", "vcc5", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) RK817_LDO_ON_VSEL_REG(0), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) RK817_POWER_EN_REG(1), ENABLE_MASK(0), BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) DISABLE_VAL(0), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) RK817_DESC(RK817_ID_LDO2, "LDO_REG2", "vcc5", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) RK817_LDO_ON_VSEL_REG(1), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) RK817_POWER_EN_REG(1), ENABLE_MASK(1), BIT(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) DISABLE_VAL(1), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) RK817_DESC(RK817_ID_LDO3, "LDO_REG3", "vcc5", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) RK817_LDO_ON_VSEL_REG(2), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) RK817_POWER_EN_REG(1), ENABLE_MASK(2), BIT(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) DISABLE_VAL(2), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) RK817_DESC(RK817_ID_LDO4, "LDO_REG4", "vcc6", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) RK817_LDO_ON_VSEL_REG(3), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) RK817_POWER_EN_REG(1), ENABLE_MASK(3), BIT(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) DISABLE_VAL(3), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) RK817_DESC(RK817_ID_LDO5, "LDO_REG5", "vcc6", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) RK817_LDO_ON_VSEL_REG(4), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) RK817_POWER_EN_REG(2), ENABLE_MASK(0), BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) DISABLE_VAL(0), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) RK817_DESC(RK817_ID_LDO6, "LDO_REG6", "vcc6", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) RK817_LDO_ON_VSEL_REG(5), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) RK817_POWER_EN_REG(2), ENABLE_MASK(1), BIT(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) DISABLE_VAL(1), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) RK817_DESC(RK817_ID_LDO7, "LDO_REG7", "vcc7", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) RK817_LDO_ON_VSEL_REG(6), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) RK817_POWER_EN_REG(2), ENABLE_MASK(2), BIT(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) DISABLE_VAL(2), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) RK817_DESC(RK817_ID_LDO8, "LDO_REG8", "vcc7", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) RK817_LDO_ON_VSEL_REG(7), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) RK817_POWER_EN_REG(2), ENABLE_MASK(3), BIT(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) DISABLE_VAL(3), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) RK817_DESC(RK817_ID_LDO9, "LDO_REG9", "vcc7", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) RK817_LDO_ON_VSEL_REG(8), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) RK817_POWER_EN_REG(3), ENABLE_MASK(0), BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) DISABLE_VAL(0), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) RK817_DESC_SWITCH(RK809_ID_SW1, "SWITCH_REG1", "vcc9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) RK817_POWER_EN_REG(3), ENABLE_MASK(2), BIT(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) DISABLE_VAL(2)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) RK817_DESC_SWITCH(RK809_ID_SW2, "SWITCH_REG2", "vcc8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) RK817_POWER_EN_REG(3), ENABLE_MASK(3), BIT(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) DISABLE_VAL(3)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) static const struct regulator_desc rk817_reg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) .name = "DCDC_REG1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) .supply_name = "vcc1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) .of_match = of_match_ptr("DCDC_REG1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) .id = RK817_ID_DCDC1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) .ops = &rk817_buck_ops_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) .n_voltages = RK817_BUCK1_SEL_CNT + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) .linear_ranges = rk817_buck1_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) .vsel_reg = RK817_BUCK1_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) .vsel_mask = RK817_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) .enable_reg = RK817_POWER_EN_REG(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) .enable_mask = ENABLE_MASK(RK817_ID_DCDC1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) .enable_val = ENABLE_MASK(RK817_ID_DCDC1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) .disable_val = DISABLE_VAL(RK817_ID_DCDC1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) .name = "DCDC_REG2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) .supply_name = "vcc2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) .of_match = of_match_ptr("DCDC_REG2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) .id = RK817_ID_DCDC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) .ops = &rk817_buck_ops_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) .n_voltages = RK817_BUCK1_SEL_CNT + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) .linear_ranges = rk817_buck1_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) .vsel_reg = RK817_BUCK2_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) .vsel_mask = RK817_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) .enable_reg = RK817_POWER_EN_REG(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) .enable_mask = ENABLE_MASK(RK817_ID_DCDC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) .enable_val = ENABLE_MASK(RK817_ID_DCDC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) .disable_val = DISABLE_VAL(RK817_ID_DCDC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) .name = "DCDC_REG3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) .supply_name = "vcc3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) .of_match = of_match_ptr("DCDC_REG3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) .id = RK817_ID_DCDC3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) .ops = &rk817_buck_ops_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) .n_voltages = RK817_BUCK1_SEL_CNT + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) .linear_ranges = rk817_buck1_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) .vsel_reg = RK817_BUCK3_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) .vsel_mask = RK817_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) .enable_reg = RK817_POWER_EN_REG(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) .enable_mask = ENABLE_MASK(RK817_ID_DCDC3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) .enable_val = ENABLE_MASK(RK817_ID_DCDC3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) .disable_val = DISABLE_VAL(RK817_ID_DCDC3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) .name = "DCDC_REG4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) .supply_name = "vcc4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) .of_match = of_match_ptr("DCDC_REG4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) .id = RK817_ID_DCDC4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) .ops = &rk817_buck_ops_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) .n_voltages = RK817_BUCK3_SEL_CNT + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) .linear_ranges = rk817_buck3_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) .n_linear_ranges = ARRAY_SIZE(rk817_buck3_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) .vsel_reg = RK817_BUCK4_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) .vsel_mask = RK817_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) .enable_reg = RK817_POWER_EN_REG(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) .enable_mask = ENABLE_MASK(RK817_ID_DCDC4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) .enable_val = ENABLE_MASK(RK817_ID_DCDC4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) .disable_val = DISABLE_VAL(RK817_ID_DCDC4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) .of_map_mode = rk8xx_regulator_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) RK817_DESC(RK817_ID_LDO1, "LDO_REG1", "vcc5", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) RK817_LDO_ON_VSEL_REG(0), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) RK817_POWER_EN_REG(1), ENABLE_MASK(0), BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) DISABLE_VAL(0), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) RK817_DESC(RK817_ID_LDO2, "LDO_REG2", "vcc5", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) RK817_LDO_ON_VSEL_REG(1), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) RK817_POWER_EN_REG(1), ENABLE_MASK(1), BIT(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) DISABLE_VAL(1), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) RK817_DESC(RK817_ID_LDO3, "LDO_REG3", "vcc5", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) RK817_LDO_ON_VSEL_REG(2), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) RK817_POWER_EN_REG(1), ENABLE_MASK(2), BIT(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) DISABLE_VAL(2), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) RK817_DESC(RK817_ID_LDO4, "LDO_REG4", "vcc6", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) RK817_LDO_ON_VSEL_REG(3), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) RK817_POWER_EN_REG(1), ENABLE_MASK(3), BIT(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) DISABLE_VAL(3), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) RK817_DESC(RK817_ID_LDO5, "LDO_REG5", "vcc6", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) RK817_LDO_ON_VSEL_REG(4), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) RK817_POWER_EN_REG(2), ENABLE_MASK(0), BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) DISABLE_VAL(0), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) RK817_DESC(RK817_ID_LDO6, "LDO_REG6", "vcc6", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) RK817_LDO_ON_VSEL_REG(5), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) RK817_POWER_EN_REG(2), ENABLE_MASK(1), BIT(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) DISABLE_VAL(1), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) RK817_DESC(RK817_ID_LDO7, "LDO_REG7", "vcc7", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) RK817_LDO_ON_VSEL_REG(6), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) RK817_POWER_EN_REG(2), ENABLE_MASK(2), BIT(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) DISABLE_VAL(2), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) RK817_DESC(RK817_ID_LDO8, "LDO_REG8", "vcc7", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) RK817_LDO_ON_VSEL_REG(7), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) RK817_POWER_EN_REG(2), ENABLE_MASK(3), BIT(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) DISABLE_VAL(3), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) RK817_DESC(RK817_ID_LDO9, "LDO_REG9", "vcc7", 600, 3400, 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) RK817_LDO_ON_VSEL_REG(8), RK817_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) RK817_POWER_EN_REG(3), ENABLE_MASK(0), BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) DISABLE_VAL(0), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) RK817_BOOST_DESC(RK817_ID_BOOST, "BOOST", "vcc8", 4700, 5400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) RK817_BOOST_OTG_CFG, RK817_BOOST_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) RK817_POWER_EN_REG(3), ENABLE_MASK(1), BIT(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) DISABLE_VAL(1), 400, 3500 - 5400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) RK817_DESC_SWITCH(RK817_ID_BOOST_OTG_SW, "OTG_SWITCH", "vcc9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) RK817_POWER_EN_REG(3), ENABLE_MASK(2), BIT(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) DISABLE_VAL(2)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) static const struct regulator_desc rk818_reg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) .name = "DCDC_REG1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) .supply_name = "vcc1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) .of_match = of_match_ptr("DCDC_REG1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) .id = RK818_ID_DCDC1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) .ops = &rk808_reg_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) .min_uV = 712500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) .uV_step = 12500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) .n_voltages = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) .vsel_reg = RK818_BUCK1_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) .vsel_mask = RK818_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) .enable_reg = RK818_DCDC_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) .enable_mask = BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) .name = "DCDC_REG2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) .supply_name = "vcc2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) .of_match = of_match_ptr("DCDC_REG2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) .id = RK818_ID_DCDC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) .ops = &rk808_reg_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) .min_uV = 712500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) .uV_step = 12500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) .n_voltages = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) .vsel_reg = RK818_BUCK2_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) .vsel_mask = RK818_BUCK_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) .enable_reg = RK818_DCDC_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) .enable_mask = BIT(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) .name = "DCDC_REG3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) .supply_name = "vcc3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) .of_match = of_match_ptr("DCDC_REG3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) .id = RK818_ID_DCDC3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) .ops = &rk808_switch_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) .n_voltages = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) .enable_reg = RK818_DCDC_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) .enable_mask = BIT(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) RK8XX_DESC(RK818_ID_DCDC4, "DCDC_REG4", "vcc4", 1800, 3600, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) RK818_BUCK4_ON_VSEL_REG, RK818_BUCK4_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) RK818_DCDC_EN_REG, BIT(3), 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) RK8XX_DESC(RK818_ID_BOOST, "DCDC_BOOST", "boost", 4700, 5400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) RK818_BOOST_LDO9_ON_VSEL_REG, RK818_BOOST_ON_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) RK818_DCDC_EN_REG, BIT(4), 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) RK8XX_DESC(RK818_ID_LDO1, "LDO_REG1", "vcc6", 1800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) RK818_LDO1_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) BIT(0), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) RK8XX_DESC(RK818_ID_LDO2, "LDO_REG2", "vcc6", 1800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) RK818_LDO2_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) BIT(1), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) .name = "LDO_REG3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) .supply_name = "vcc7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) .of_match = of_match_ptr("LDO_REG3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) .id = RK818_ID_LDO3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) .ops = &rk808_reg_ops_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) .n_voltages = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) .linear_ranges = rk808_ldo3_voltage_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) .n_linear_ranges = ARRAY_SIZE(rk808_ldo3_voltage_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) .vsel_reg = RK818_LDO3_ON_VSEL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) .vsel_mask = RK818_LDO3_ON_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) .enable_reg = RK818_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) .enable_mask = BIT(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) .enable_time = 400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) RK8XX_DESC(RK818_ID_LDO4, "LDO_REG4", "vcc8", 1800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) RK818_LDO4_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) BIT(3), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) RK8XX_DESC(RK818_ID_LDO5, "LDO_REG5", "vcc7", 1800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) RK818_LDO5_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) BIT(4), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) RK8XX_DESC(RK818_ID_LDO6, "LDO_REG6", "vcc8", 800, 2500, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) RK818_LDO6_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) BIT(5), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) RK8XX_DESC(RK818_ID_LDO7, "LDO_REG7", "vcc7", 800, 2500, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) RK818_LDO7_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) BIT(6), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) RK8XX_DESC(RK818_ID_LDO8, "LDO_REG8", "vcc8", 1800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) RK818_LDO8_ON_VSEL_REG, RK818_LDO_VSEL_MASK, RK818_LDO_EN_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) BIT(7), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) RK8XX_DESC(RK818_ID_LDO9, "LDO_REG9", "vcc9", 1800, 3400, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) RK818_BOOST_LDO9_ON_VSEL_REG, RK818_LDO_VSEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) RK818_DCDC_EN_REG, BIT(5), 400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) RK8XX_DESC_SWITCH(RK818_ID_SWITCH, "SWITCH_REG", "vcc9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) RK818_DCDC_EN_REG, BIT(6)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) RK8XX_DESC_SWITCH(RK818_ID_HDMI_SWITCH, "HDMI_SWITCH", "h_5v",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) RK818_H5V_EN_REG, BIT(0)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) RK8XX_DESC_SWITCH(RK818_ID_OTG_SWITCH, "OTG_SWITCH", "usb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) RK818_DCDC_EN_REG, BIT(7)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) static int rk808_regulator_dt_parse_pdata(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) struct device *client_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) struct regmap *map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) struct rk808_regulator_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) int tmp, ret = 0, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) np = of_get_child_by_name(client_dev->of_node, "regulators");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) if (!np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) for (i = 0; i < ARRAY_SIZE(pdata->dvs_gpio); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) pdata->dvs_gpio[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) devm_gpiod_get_index_optional(client_dev, "dvs", i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) if (IS_ERR(pdata->dvs_gpio[i])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) ret = PTR_ERR(pdata->dvs_gpio[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) dev_err(dev, "failed to get dvs%d gpio (%d)\n", i, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) goto dt_parse_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) if (!pdata->dvs_gpio[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) dev_info(dev, "there is no dvs%d gpio\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) tmp = i ? RK808_DVS2_POL : RK808_DVS1_POL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) ret = regmap_update_bits(map, RK808_IO_POL_REG, tmp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) gpiod_is_active_low(pdata->dvs_gpio[i]) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) 0 : tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) dt_parse_end:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) static int rk808_regulator_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) struct i2c_client *client = rk808->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) struct regulator_config config = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) struct regulator_dev *rk808_rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) struct rk808_regulator_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) const struct regulator_desc *regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) int ret, i, nregulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) if (!pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) ret = rk808_regulator_dt_parse_pdata(&pdev->dev, &client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) rk808->regmap, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) platform_set_drvdata(pdev, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) switch (rk808->variant) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) case RK805_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) regulators = rk805_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) nregulators = RK805_NUM_REGULATORS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) case RK808_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) regulators = rk808_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) nregulators = RK808_NUM_REGULATORS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) case RK809_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) regulators = rk809_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) nregulators = RK809_NUM_REGULATORS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) case RK816_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) regulators = rk816_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) nregulators = RK816_NUM_REGULATORS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) case RK817_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) regulators = rk817_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) nregulators = RK817_NUM_REGULATORS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) case RK818_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) regulators = rk818_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) nregulators = RK818_NUM_REGULATORS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) dev_err(&client->dev, "unsupported RK8XX ID %lu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) rk808->variant);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) config.dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) config.driver_data = pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) config.regmap = rk808->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) /* Instantiate the regulators */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) for (i = 0; i < nregulators; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) rk808_rdev = devm_regulator_register(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) ®ulators[i], &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) if (IS_ERR(rk808_rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) "failed to register %d regulator\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) return PTR_ERR(rk808_rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) static struct platform_driver rk808_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) .probe = rk808_regulator_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) .name = "rk808-regulator"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) #ifdef CONFIG_ROCKCHIP_THUNDER_BOOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) static int __init rk808_regulator_driver_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) return platform_driver_register(&rk808_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) subsys_initcall(rk808_regulator_driver_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) static void __exit rk808_regulator_driver_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) platform_driver_unregister(&rk808_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) module_exit(rk808_regulator_driver_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) module_platform_driver(rk808_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) MODULE_DESCRIPTION("regulator driver for the RK805/RK808/RK816/RK818 series PMICs");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) MODULE_AUTHOR("Tony xie <tony.xie@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) MODULE_AUTHOR("Zhang Qing <zhangqing@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) MODULE_AUTHOR("Wadim Egorov <w.egorov@phytec.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) MODULE_ALIAS("platform:rk808-regulator");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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