^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) // Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #define pr_fmt(fmt) "%s: " fmt, __func__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <soc/qcom/cmd-db.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <soc/qcom/rpmh.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * enum rpmh_regulator_type - supported RPMh accelerator types
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * @VRM: RPMh VRM accelerator which supports voting on enable, voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * and mode of LDO, SMPS, and BOB type PMIC regulators.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * @XOB: RPMh XOB accelerator which supports voting on the enable state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * of PMIC regulators.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) enum rpmh_regulator_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) VRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) XOB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define RPMH_REGULATOR_REG_VRM_VOLTAGE 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define RPMH_REGULATOR_REG_ENABLE 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define RPMH_REGULATOR_REG_VRM_MODE 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define PMIC4_LDO_MODE_RETENTION 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define PMIC4_LDO_MODE_LPM 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define PMIC4_LDO_MODE_HPM 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define PMIC4_SMPS_MODE_RETENTION 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define PMIC4_SMPS_MODE_PFM 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define PMIC4_SMPS_MODE_AUTO 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define PMIC4_SMPS_MODE_PWM 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define PMIC4_BOB_MODE_PASS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define PMIC4_BOB_MODE_PFM 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define PMIC4_BOB_MODE_AUTO 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define PMIC4_BOB_MODE_PWM 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define PMIC5_LDO_MODE_RETENTION 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define PMIC5_LDO_MODE_LPM 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define PMIC5_LDO_MODE_HPM 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define PMIC5_SMPS_MODE_RETENTION 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define PMIC5_SMPS_MODE_PFM 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define PMIC5_SMPS_MODE_AUTO 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define PMIC5_SMPS_MODE_PWM 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define PMIC5_BOB_MODE_PASS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define PMIC5_BOB_MODE_PFM 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define PMIC5_BOB_MODE_AUTO 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define PMIC5_BOB_MODE_PWM 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * @regulator_type: RPMh accelerator type used to manage this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * @ops: Pointer to regulator ops callback structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * @voltage_range: The single range of voltages supported by this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * PMIC regulator type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * @n_voltages: The number of unique voltage set points defined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * by voltage_range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * @hpm_min_load_uA: Minimum load current in microamps that requires
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * high power mode (HPM) operation. This is used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * for LDO hardware type regulators only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * @pmic_mode_map: Array indexed by regulator framework mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * containing PMIC hardware modes. Must be large
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * enough to index all framework modes supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * by this regulator hardware type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * @of_map_mode: Maps an RPMH_REGULATOR_MODE_* mode value defined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * in device tree to a regulator framework mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct rpmh_vreg_hw_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) enum rpmh_regulator_type regulator_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) const struct regulator_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) const struct linear_range voltage_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) int n_voltages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) int hpm_min_load_uA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) const int *pmic_mode_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) unsigned int (*of_map_mode)(unsigned int mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * struct rpmh_vreg - individual RPMh regulator data structure encapsulating a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * single regulator device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * @dev: Device pointer for the top-level PMIC RPMh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * regulator parent device. This is used as a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * handle in RPMh write requests.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * @addr: Base address of the regulator resource within
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * an RPMh accelerator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * @rdesc: Regulator descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * @hw_data: PMIC regulator configuration data for this RPMh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * @always_wait_for_ack: Boolean flag indicating if a request must always
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * wait for an ACK from RPMh before continuing even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * if it corresponds to a strictly lower power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * state (e.g. enabled --> disabled).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * @enabled: Flag indicating if the regulator is enabled or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * @bypassed: Boolean indicating if the regulator is in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * bypass (pass-through) mode or not. This is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * only used by BOB rpmh-regulator resources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * @voltage_selector: Selector used for get_voltage_sel() and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * set_voltage_sel() callbacks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * @mode: RPMh VRM regulator current framework mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct rpmh_vreg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) u32 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct regulator_desc rdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) const struct rpmh_vreg_hw_data *hw_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) bool always_wait_for_ack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) bool bypassed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int voltage_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) unsigned int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * struct rpmh_vreg_init_data - initialization data for an RPMh regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * @name: Name for the regulator which also corresponds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * to the device tree subnode name of the regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * @resource_name: RPMh regulator resource name format string.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * This must include exactly one field: '%s' which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * is filled at run-time with the PMIC ID provided
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * by device tree property qcom,pmic-id. Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * "ldo%s1" for RPMh resource "ldoa1".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * @supply_name: Parent supply regulator name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * @hw_data: Configuration data for this PMIC regulator type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct rpmh_vreg_init_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) const char *resource_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) const char *supply_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) const struct rpmh_vreg_hw_data *hw_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * rpmh_regulator_send_request() - send the request to RPMh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * @vreg: Pointer to the RPMh regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * @cmd: Pointer to the RPMh command to send
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * @wait_for_ack: Boolean indicating if execution must wait until the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * request has been acknowledged as complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * Return: 0 on success, errno on failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static int rpmh_regulator_send_request(struct rpmh_vreg *vreg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) struct tcs_cmd *cmd, bool wait_for_ack)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (wait_for_ack || vreg->always_wait_for_ack)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) ret = rpmh_write(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ret = rpmh_write_async(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static int _rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) unsigned int selector, bool wait_for_ack)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) struct tcs_cmd cmd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /* VRM voltage control register is set with voltage in millivolts. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) cmd.data = DIV_ROUND_UP(regulator_list_voltage_linear_range(rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) selector), 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) ret = rpmh_regulator_send_request(vreg, &cmd, wait_for_ack);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) vreg->voltage_selector = selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static int rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) unsigned int selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (vreg->enabled == -EINVAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * Cache the voltage and send it later when the regulator is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * enabled or disabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) vreg->voltage_selector = selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return _rpmh_regulator_vrm_set_voltage_sel(rdev, selector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) selector > vreg->voltage_selector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static int rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) return vreg->voltage_selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static int rpmh_regulator_is_enabled(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return vreg->enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static int rpmh_regulator_set_enable_state(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) struct tcs_cmd cmd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .addr = vreg->addr + RPMH_REGULATOR_REG_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .data = enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (vreg->enabled == -EINVAL &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) vreg->voltage_selector != -ENOTRECOVERABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ret = _rpmh_regulator_vrm_set_voltage_sel(rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) vreg->voltage_selector, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) ret = rpmh_regulator_send_request(vreg, &cmd, enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) vreg->enabled = enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static int rpmh_regulator_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return rpmh_regulator_set_enable_state(rdev, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static int rpmh_regulator_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return rpmh_regulator_set_enable_state(rdev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static int rpmh_regulator_vrm_set_mode_bypass(struct rpmh_vreg *vreg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) unsigned int mode, bool bypassed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) struct tcs_cmd cmd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) int pmic_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (mode > REGULATOR_MODE_STANDBY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) pmic_mode = vreg->hw_data->pmic_mode_map[mode];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) if (pmic_mode < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return pmic_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if (bypassed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) cmd.data = PMIC4_BOB_MODE_PASS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) cmd.data = pmic_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return rpmh_regulator_send_request(vreg, &cmd, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static int rpmh_regulator_vrm_set_mode(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (mode == vreg->mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) ret = rpmh_regulator_vrm_set_mode_bypass(vreg, mode, vreg->bypassed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) vreg->mode = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static unsigned int rpmh_regulator_vrm_get_mode(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) return vreg->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) * rpmh_regulator_vrm_set_load() - set the regulator mode based upon the load
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) * current requested
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) * @rdev: Regulator device pointer for the rpmh-regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) * @load_uA: Aggregated load current in microamps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) * This function is used in the regulator_ops for VRM type RPMh regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) * devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * Return: 0 on success, errno on failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static int rpmh_regulator_vrm_set_load(struct regulator_dev *rdev, int load_uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) unsigned int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (load_uA >= vreg->hw_data->hpm_min_load_uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) mode = REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) mode = REGULATOR_MODE_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) return rpmh_regulator_vrm_set_mode(rdev, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static int rpmh_regulator_vrm_set_bypass(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (vreg->bypassed == enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) ret = rpmh_regulator_vrm_set_mode_bypass(vreg, vreg->mode, enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) vreg->bypassed = enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) static int rpmh_regulator_vrm_get_bypass(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) bool *enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) *enable = vreg->bypassed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static const struct regulator_ops rpmh_regulator_vrm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .enable = rpmh_regulator_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .disable = rpmh_regulator_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .is_enabled = rpmh_regulator_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .list_voltage = regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .set_mode = rpmh_regulator_vrm_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) .get_mode = rpmh_regulator_vrm_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static const struct regulator_ops rpmh_regulator_vrm_drms_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .enable = rpmh_regulator_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .disable = rpmh_regulator_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .is_enabled = rpmh_regulator_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .list_voltage = regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .set_mode = rpmh_regulator_vrm_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .get_mode = rpmh_regulator_vrm_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) .set_load = rpmh_regulator_vrm_set_load,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) static const struct regulator_ops rpmh_regulator_vrm_bypass_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) .enable = rpmh_regulator_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) .disable = rpmh_regulator_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) .is_enabled = rpmh_regulator_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) .list_voltage = regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .set_mode = rpmh_regulator_vrm_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .get_mode = rpmh_regulator_vrm_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .set_bypass = rpmh_regulator_vrm_set_bypass,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .get_bypass = rpmh_regulator_vrm_get_bypass,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static const struct regulator_ops rpmh_regulator_xob_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) .enable = rpmh_regulator_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) .disable = rpmh_regulator_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .is_enabled = rpmh_regulator_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * rpmh_regulator_init_vreg() - initialize all attributes of an rpmh-regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * @vreg: Pointer to the individual rpmh-regulator resource
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) * @dev: Pointer to the top level rpmh-regulator PMIC device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) * @node: Pointer to the individual rpmh-regulator resource
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * device node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) * @pmic_id: String used to identify the top level rpmh-regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) * PMIC device on the board
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) * @pmic_rpmh_data: Pointer to a null-terminated array of rpmh-regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) * resources defined for the top level PMIC device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * Return: 0 on success, errno on failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) static int rpmh_regulator_init_vreg(struct rpmh_vreg *vreg, struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) struct device_node *node, const char *pmic_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) const struct rpmh_vreg_init_data *pmic_rpmh_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) struct regulator_config reg_config = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) char rpmh_resource_name[20] = "";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) const struct rpmh_vreg_init_data *rpmh_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) struct regulator_init_data *init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) vreg->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) for (rpmh_data = pmic_rpmh_data; rpmh_data->name; rpmh_data++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) if (of_node_name_eq(node, rpmh_data->name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) if (!rpmh_data->name) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) dev_err(dev, "Unknown regulator %pOFn\n", node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) rpmh_data->resource_name, pmic_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) vreg->addr = cmd_db_read_addr(rpmh_resource_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (!vreg->addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) dev_err(dev, "%pOFn: could not find RPMh address for resource %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) node, rpmh_resource_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) vreg->rdesc.name = rpmh_data->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) vreg->rdesc.supply_name = rpmh_data->supply_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) vreg->hw_data = rpmh_data->hw_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) vreg->enabled = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) vreg->voltage_selector = -ENOTRECOVERABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) vreg->mode = REGULATOR_MODE_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) if (rpmh_data->hw_data->n_voltages) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) vreg->rdesc.linear_ranges = &rpmh_data->hw_data->voltage_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) vreg->rdesc.n_linear_ranges = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) vreg->rdesc.n_voltages = rpmh_data->hw_data->n_voltages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) vreg->always_wait_for_ack = of_property_read_bool(node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) "qcom,always-wait-for-ack");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) vreg->rdesc.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) vreg->rdesc.type = REGULATOR_VOLTAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) vreg->rdesc.ops = vreg->hw_data->ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) vreg->rdesc.of_map_mode = vreg->hw_data->of_map_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) init_data = of_get_regulator_init_data(dev, node, &vreg->rdesc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) if (!init_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) if (rpmh_data->hw_data->regulator_type == XOB &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) init_data->constraints.min_uV &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) init_data->constraints.min_uV == init_data->constraints.max_uV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) vreg->rdesc.fixed_uV = init_data->constraints.min_uV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) vreg->rdesc.n_voltages = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) reg_config.dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) reg_config.init_data = init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) reg_config.of_node = node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) reg_config.driver_data = vreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) rdev = devm_regulator_register(dev, &vreg->rdesc, ®_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) ret = PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) node, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) dev_dbg(dev, "%pOFn regulator registered for RPMh resource %s @ 0x%05X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) node, rpmh_resource_name, vreg->addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static const int pmic_mode_map_pmic4_ldo[REGULATOR_MODE_STANDBY + 1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) [REGULATOR_MODE_INVALID] = -EINVAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) [REGULATOR_MODE_STANDBY] = PMIC4_LDO_MODE_RETENTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) [REGULATOR_MODE_IDLE] = PMIC4_LDO_MODE_LPM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) [REGULATOR_MODE_NORMAL] = PMIC4_LDO_MODE_HPM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) [REGULATOR_MODE_FAST] = -EINVAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) static const int pmic_mode_map_pmic5_ldo[REGULATOR_MODE_STANDBY + 1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) [REGULATOR_MODE_INVALID] = -EINVAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) [REGULATOR_MODE_STANDBY] = PMIC5_LDO_MODE_RETENTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) [REGULATOR_MODE_IDLE] = PMIC5_LDO_MODE_LPM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) [REGULATOR_MODE_NORMAL] = PMIC5_LDO_MODE_HPM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) [REGULATOR_MODE_FAST] = -EINVAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) unsigned int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) switch (rpmh_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) case RPMH_REGULATOR_MODE_HPM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) mode = REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) case RPMH_REGULATOR_MODE_LPM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) mode = REGULATOR_MODE_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) case RPMH_REGULATOR_MODE_RET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) mode = REGULATOR_MODE_STANDBY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) mode = REGULATOR_MODE_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) return mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) static const int pmic_mode_map_pmic4_smps[REGULATOR_MODE_STANDBY + 1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) [REGULATOR_MODE_INVALID] = -EINVAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) [REGULATOR_MODE_STANDBY] = PMIC4_SMPS_MODE_RETENTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) [REGULATOR_MODE_IDLE] = PMIC4_SMPS_MODE_PFM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) [REGULATOR_MODE_NORMAL] = PMIC4_SMPS_MODE_AUTO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) [REGULATOR_MODE_FAST] = PMIC4_SMPS_MODE_PWM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) static const int pmic_mode_map_pmic5_smps[REGULATOR_MODE_STANDBY + 1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) [REGULATOR_MODE_INVALID] = -EINVAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) [REGULATOR_MODE_STANDBY] = PMIC5_SMPS_MODE_RETENTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) [REGULATOR_MODE_IDLE] = PMIC5_SMPS_MODE_PFM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) [REGULATOR_MODE_NORMAL] = PMIC5_SMPS_MODE_AUTO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) [REGULATOR_MODE_FAST] = PMIC5_SMPS_MODE_PWM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) static unsigned int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) rpmh_regulator_pmic4_smps_of_map_mode(unsigned int rpmh_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) unsigned int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) switch (rpmh_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) case RPMH_REGULATOR_MODE_HPM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) mode = REGULATOR_MODE_FAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) case RPMH_REGULATOR_MODE_AUTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) mode = REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) case RPMH_REGULATOR_MODE_LPM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) mode = REGULATOR_MODE_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) case RPMH_REGULATOR_MODE_RET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) mode = REGULATOR_MODE_STANDBY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) mode = REGULATOR_MODE_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) return mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) static const int pmic_mode_map_pmic4_bob[REGULATOR_MODE_STANDBY + 1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) [REGULATOR_MODE_INVALID] = -EINVAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) [REGULATOR_MODE_STANDBY] = -EINVAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) [REGULATOR_MODE_IDLE] = PMIC4_BOB_MODE_PFM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) [REGULATOR_MODE_NORMAL] = PMIC4_BOB_MODE_AUTO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) [REGULATOR_MODE_FAST] = PMIC4_BOB_MODE_PWM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) static const int pmic_mode_map_pmic5_bob[REGULATOR_MODE_STANDBY + 1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) [REGULATOR_MODE_INVALID] = -EINVAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) [REGULATOR_MODE_STANDBY] = -EINVAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) [REGULATOR_MODE_IDLE] = PMIC5_BOB_MODE_PFM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) [REGULATOR_MODE_NORMAL] = PMIC5_BOB_MODE_AUTO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) [REGULATOR_MODE_FAST] = PMIC5_BOB_MODE_PWM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static unsigned int rpmh_regulator_pmic4_bob_of_map_mode(unsigned int rpmh_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) unsigned int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) switch (rpmh_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) case RPMH_REGULATOR_MODE_HPM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) mode = REGULATOR_MODE_FAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) case RPMH_REGULATOR_MODE_AUTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) mode = REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) case RPMH_REGULATOR_MODE_LPM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) mode = REGULATOR_MODE_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) mode = REGULATOR_MODE_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) return mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) static const struct rpmh_vreg_hw_data pmic4_pldo = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) .regulator_type = VRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) .ops = &rpmh_regulator_vrm_drms_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) .voltage_range = REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) .n_voltages = 256,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) .hpm_min_load_uA = 10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) .pmic_mode_map = pmic_mode_map_pmic4_ldo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) static const struct rpmh_vreg_hw_data pmic4_pldo_lv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) .regulator_type = VRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) .ops = &rpmh_regulator_vrm_drms_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) .voltage_range = REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) .n_voltages = 128,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) .hpm_min_load_uA = 10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) .pmic_mode_map = pmic_mode_map_pmic4_ldo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) static const struct rpmh_vreg_hw_data pmic4_nldo = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) .regulator_type = VRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) .ops = &rpmh_regulator_vrm_drms_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) .voltage_range = REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) .n_voltages = 128,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) .hpm_min_load_uA = 30000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) .pmic_mode_map = pmic_mode_map_pmic4_ldo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) static const struct rpmh_vreg_hw_data pmic4_hfsmps3 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) .regulator_type = VRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) .ops = &rpmh_regulator_vrm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) .n_voltages = 216,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) .pmic_mode_map = pmic_mode_map_pmic4_smps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) static const struct rpmh_vreg_hw_data pmic4_ftsmps426 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) .regulator_type = VRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) .ops = &rpmh_regulator_vrm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) .n_voltages = 259,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) .pmic_mode_map = pmic_mode_map_pmic4_smps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) static const struct rpmh_vreg_hw_data pmic4_bob = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) .regulator_type = VRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) .ops = &rpmh_regulator_vrm_bypass_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) .voltage_range = REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) .n_voltages = 84,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) .pmic_mode_map = pmic_mode_map_pmic4_bob,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) static const struct rpmh_vreg_hw_data pmic4_lvs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) .regulator_type = XOB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) .ops = &rpmh_regulator_xob_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) /* LVS hardware does not support voltage or mode configuration. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) static const struct rpmh_vreg_hw_data pmic5_pldo = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) .regulator_type = VRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) .ops = &rpmh_regulator_vrm_drms_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) .voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) .n_voltages = 256,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) .hpm_min_load_uA = 10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) .pmic_mode_map = pmic_mode_map_pmic5_ldo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) static const struct rpmh_vreg_hw_data pmic5_pldo_lv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) .regulator_type = VRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) .ops = &rpmh_regulator_vrm_drms_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) .voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) .n_voltages = 63,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) .hpm_min_load_uA = 10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) .pmic_mode_map = pmic_mode_map_pmic5_ldo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) static const struct rpmh_vreg_hw_data pmic5_nldo = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) .regulator_type = VRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) .ops = &rpmh_regulator_vrm_drms_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) .n_voltages = 124,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) .hpm_min_load_uA = 30000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) .pmic_mode_map = pmic_mode_map_pmic5_ldo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) .regulator_type = VRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) .ops = &rpmh_regulator_vrm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) .n_voltages = 216,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) .pmic_mode_map = pmic_mode_map_pmic5_smps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) static const struct rpmh_vreg_hw_data pmic5_ftsmps510 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) .regulator_type = VRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) .ops = &rpmh_regulator_vrm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) .voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) .n_voltages = 264,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) .pmic_mode_map = pmic_mode_map_pmic5_smps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) .regulator_type = VRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) .ops = &rpmh_regulator_vrm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) .n_voltages = 236,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) .pmic_mode_map = pmic_mode_map_pmic5_smps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) static const struct rpmh_vreg_hw_data pmic5_hfsmps515_1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) .regulator_type = VRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) .ops = &rpmh_regulator_vrm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) .voltage_range = REGULATOR_LINEAR_RANGE(900000, 0, 4, 16000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) .n_voltages = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) .pmic_mode_map = pmic_mode_map_pmic5_smps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) static const struct rpmh_vreg_hw_data pmic5_bob = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) .regulator_type = VRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) .ops = &rpmh_regulator_vrm_bypass_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) .voltage_range = REGULATOR_LINEAR_RANGE(3000000, 0, 31, 32000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) .n_voltages = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) .pmic_mode_map = pmic_mode_map_pmic5_bob,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) #define RPMH_VREG(_name, _resource_name, _hw_data, _supply_name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) .name = _name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) .resource_name = _resource_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) .hw_data = _hw_data, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) .supply_name = _supply_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) static const struct rpmh_vreg_init_data pm8998_vreg_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) RPMH_VREG("smps3", "smp%s3", &pmic4_hfsmps3, "vdd-s3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) RPMH_VREG("smps6", "smp%s6", &pmic4_ftsmps426, "vdd-s6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) RPMH_VREG("smps7", "smp%s7", &pmic4_ftsmps426, "vdd-s7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) RPMH_VREG("smps8", "smp%s8", &pmic4_ftsmps426, "vdd-s8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) RPMH_VREG("smps9", "smp%s9", &pmic4_ftsmps426, "vdd-s9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) RPMH_VREG("smps10", "smp%s10", &pmic4_ftsmps426, "vdd-s10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) RPMH_VREG("smps11", "smp%s11", &pmic4_ftsmps426, "vdd-s11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) RPMH_VREG("smps12", "smp%s12", &pmic4_ftsmps426, "vdd-s12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) RPMH_VREG("smps13", "smp%s13", &pmic4_ftsmps426, "vdd-s13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l27"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l8-l17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l3-l11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) RPMH_VREG("ldo4", "ldo%s4", &pmic4_nldo, "vdd-l4-l5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l4-l5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) RPMH_VREG("ldo8", "ldo%s8", &pmic4_nldo, "vdd-l2-l8-l17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo, "vdd-l9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo, "vdd-l10-l23-l25"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) RPMH_VREG("ldo11", "ldo%s11", &pmic4_nldo, "vdd-l3-l11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo, "vdd-l13-l19-l21"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l16-l28"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) RPMH_VREG("ldo17", "ldo%s17", &pmic4_nldo, "vdd-l2-l8-l17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l18-l22"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l13-l19-l21"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) RPMH_VREG("ldo20", "ldo%s20", &pmic4_pldo, "vdd-l20-l24"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) RPMH_VREG("ldo21", "ldo%s21", &pmic4_pldo, "vdd-l13-l19-l21"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) RPMH_VREG("ldo22", "ldo%s22", &pmic4_pldo, "vdd-l18-l22"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) RPMH_VREG("ldo23", "ldo%s23", &pmic4_pldo, "vdd-l10-l23-l25"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) RPMH_VREG("ldo24", "ldo%s24", &pmic4_pldo, "vdd-l20-l24"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) RPMH_VREG("ldo25", "ldo%s25", &pmic4_pldo, "vdd-l10-l23-l25"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) RPMH_VREG("ldo26", "ldo%s26", &pmic4_nldo, "vdd-l26"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) RPMH_VREG("ldo27", "ldo%s27", &pmic4_nldo, "vdd-l1-l27"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) RPMH_VREG("ldo28", "ldo%s28", &pmic4_pldo, "vdd-l16-l28"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) RPMH_VREG("lvs1", "vs%s1", &pmic4_lvs, "vin-lvs-1-2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) RPMH_VREG("lvs2", "vs%s2", &pmic4_lvs, "vin-lvs-1-2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) static const struct rpmh_vreg_init_data pm8005_vreg_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) RPMH_VREG("smps4", "smp%s4", &pmic4_ftsmps426, "vdd-s4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) static const struct rpmh_vreg_init_data pm8150_vreg_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l12-l14-l15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l1-l8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) static const struct rpmh_vreg_init_data pm8009_vreg_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515, "vdd-s2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515_1, "vdd-s2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) RPMH_VREG("ldo7", "ldo%s6", &pmic5_pldo_lv, "vdd-l7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) static const struct rpmh_vreg_init_data pm6150_vreg_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l7-l8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l4-l7-l8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l4-l7-l8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, "vdd-l1-l8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) static int rpmh_regulator_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) const struct rpmh_vreg_init_data *vreg_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) struct device_node *node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) struct rpmh_vreg *vreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) const char *pmic_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) vreg_data = of_device_get_match_data(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) if (!vreg_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) ret = of_property_read_string(dev->of_node, "qcom,pmic-id", &pmic_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) dev_err(dev, "qcom,pmic-id missing in DT node\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) for_each_available_child_of_node(dev->of_node, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) if (!vreg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) of_node_put(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) ret = rpmh_regulator_init_vreg(vreg, dev, node, pmic_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) vreg_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) of_node_put(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) .compatible = "qcom,pm8005-rpmh-regulators",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) .data = pm8005_vreg_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) .compatible = "qcom,pm8009-rpmh-regulators",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) .data = pm8009_vreg_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) .compatible = "qcom,pm8009-1-rpmh-regulators",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) .data = pm8009_1_vreg_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) .compatible = "qcom,pm8150-rpmh-regulators",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) .data = pm8150_vreg_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) .compatible = "qcom,pm8150l-rpmh-regulators",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) .data = pm8150l_vreg_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) .compatible = "qcom,pm8998-rpmh-regulators",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) .data = pm8998_vreg_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) .compatible = "qcom,pmi8998-rpmh-regulators",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) .data = pmi8998_vreg_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) .compatible = "qcom,pm6150-rpmh-regulators",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) .data = pm6150_vreg_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) .compatible = "qcom,pm6150l-rpmh-regulators",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) .data = pm6150l_vreg_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) MODULE_DEVICE_TABLE(of, rpmh_regulator_match_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) static struct platform_driver rpmh_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) .name = "qcom-rpmh-regulator",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) .of_match_table = of_match_ptr(rpmh_regulator_match_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) .probe = rpmh_regulator_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) module_platform_driver(rpmh_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) MODULE_DESCRIPTION("Qualcomm RPMh regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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